Re: [casper] ADC16x250-8 coax rev 2 noise

[Jason Manley]

And if you're wondering why it's only ever toggling between -1 and 0, it's 
because most ADCs are biased centred around -0.5, not 0. This is so that 
they're symmetrical in positive and negative swing (remember two's complement 
for an 8 bit number will be -128 to +127). Some will let you adjust this offset.

Jason 

On 20 Sep 2016, at 23:52, dana whitlow  wrote:

> On 9/20/2016 3:55 PM, David MacMahon wrote:
> 
> Hi Adam,
> 
> A little bit of noise (a step or several rms) is a cure for many ADC ills, 
> and is widely practiced under
> the term "dithering".  It's usually nicest if the dithering waveform can be 
> arranged to fall outside the
> signal band of interest (yet still have reasonably wide bandwidth in its own 
> right), but not essential.
> 
> In the early days of CDs the advent of effective dithering saved the format 
> from probable (IMO) doom,
> arising from the nasty forms of distortion that accrued from signal levels 
> that exercised only the few
> lowest order bits of the ADCs.
> 
> Dana Whitlow
> Arecibo Observatory
> 
> 
>> Hi, Adam,
>> 
>> I haven't looked at the spectral content of a terminated input before so I 
>> don’t have any comparative results, but I think the spikes you are seeing 
>> are caused by mismatched gains and/or offsets of the ADC’s interleaved cores 
>> (I think there are a total of 8 cores, also called "branches" in the 
>> datasheet).  Have you tried sampling band limited noise (e.g. low pass at 
>> Fs/20)?  I think the severity of the spikes will be less in the presence of 
>> a signal.  In the worst case you will have to ignore the 8 frequency 
>> channels with these spikes, but you might be able to improve things by 
>> tweaking the coarse gain and/or fine gain registers in the ADC.
>> 
>> HTH,
>> Dave
>> 
>>> On Sep 20, 2016, at 11:46 AM, Schoenwald, Adam (GSFC-564.0)[AS and D, Inc.] 
>>>  wrote:
>>> 
>>> Hi All,
>>> I have a question regarding the ADC16x250-8 coax rev 2 running in demux by 
>>> 4 mode. When I terminate the inputs with a 50 ohm connector and collect 
>>> data using a basic snapshot block design, I get a little bit of noise on 
>>> the LSB. I export the data to a csv file and find that it is a collection 
>>> of 0’s and -1’s, indicating that the level being converted by the adc is 
>>> sitting between these two values and there is some sort of internal noise 
>>> causing us to jump between values. What is alarming is that when I 
>>> collected 2^18 samples and run spectral analysis I see large spikes at 
>>> intervals of FS/16 (See Attached, pwelch(x,1024,256,[],800)).
>>>  
>>> I am running the ADC at 800MHZ and the FPGA at 200MHZ. I am using one of 
>>> the more recent casper builds after the bitslipping commit on Mar 25th. I 
>>> also tried to use the ruby script located 
>>> athttps://github.com/jack-h/casper_adc16/tree/master/ruby/lib.
>>>  
>>> I run the bof file with “adc16_init.rb --reg=0x3a=0x0202,0x3b=0x0202 -d 4 
>>> roach_ip boffile”, where I change the ic inputs. We only connected 8 of the 
>>> 16 coax cables to the board and I had to switch off the default.
>>>  
>>> Has anyone else had a similar experience or ideas? 
>>> 
>>> Adam Schoenwald
>>> 
>>>  
>>> 
>> 
> 

Re: [casper] ADC16x250-8 coax rev 2 noise

[dana whitlow]

On 9/20/2016 3:55 PM, David MacMahon wrote:

Hi Adam,

A little bit of noise (a step or several rms) is a cure for many ADC 
ills, and is widely practiced under
the term "dithering".  It's usually nicest if the dithering waveform can 
be arranged to fall outside the
signal band of interest (yet still have reasonably wide bandwidth in its 
own right), but not essential.


In the early days of CDs the advent of effective dithering saved the 
format from probable (IMO) doom,
arising from the nasty forms of distortion that accrued from signal 
levels that exercised only the few

lowest order bits of the ADCs.

Dana Whitlow
Arecibo Observatory



Hi, Adam,

I haven't looked at the spectral content of a terminated input before 
so I don’t have any comparative results, but I think the spikes you 
are seeing are caused by mismatched gains and/or offsets of the ADC’s 
interleaved cores (I think there are a total of 8 cores, also called 
"branches" in the datasheet).  Have you tried sampling band limited 
noise (e.g. low pass at Fs/20)?  I think the severity of the spikes 
will be less in the presence of a signal.  In the worst case you will 
have to ignore the 8 frequency channels with these spikes, but you 
might be able to improve things by tweaking the coarse gain and/or 
fine gain registers in the ADC.


HTH,
Dave

On Sep 20, 2016, at 11:46 AM, Schoenwald, Adam (GSFC-564.0)[AS and D, 
Inc.] > wrote:


Hi All,
I have a question regarding the ADC16x250-8 coax rev 2 running in 
demux by 4 mode. When I terminate the inputs with a 50 ohm connector 
and collect data using a basic snapshot block design, I get a little 
bit of noise on the LSB. I export the data to a csv file and find 
that it is a collection of 0’s and -1’s, indicating that the level 
being converted by the adc is sitting between these two values and 
there is some sort of internal noise causing us to jump between 
values. What is alarming is that when I collected 2^18 samples and 
run spectral analysis I see large spikes at intervals of FS/16 (See 
Attached, pwelch(x,1024,256,[],800)).
I am running the ADC at 800MHZ and the FPGA at 200MHZ. I am using one 
of the more recent casper builds after the bitslipping commit on Mar 
25^th . I also tried to use the ruby script located 
athttps://github.com/jack-h/casper_adc16/tree/master/ruby/lib.
I run the bof file with “adc16_init.rb --reg=0x3a=0x0202,0x3b=0x0202 
-d 4 roach_ip boffile”, where I change the ic inputs. We only 
connected 8 of the 16 coax cables to the board and I had to switch 
off the default.

Has anyone else had a similar experience or ideas?

Adam Schoenwald

Re: [casper] ADC16x250-8 coax rev 2 noise

[Dan Werthimer]

hi adam,

the effect you are seeing is visible on many adc's - some digital noise
gets into the analog input,
and is often easy to see when there is no signal input, especially when the
adc's DC offset
happens to lie near the boundry of two ADC steps (then any noise will cause
the ADC to toggle).

if you test the adc is a more realistic situation, by injecting wideband
noise with an RMS about
about 20 ADC units, the spikes will likely still be there, but they will be
very small
and you'll have to integrate for a long time to see them.

best wishes,

dan




On Tue, Sep 20, 2016 at 11:46 AM, Schoenwald, Adam (GSFC-564.0)[AS and D,
Inc.]  wrote:

> Hi All,
>
> I have a question regarding the ADC16x250-8 coax rev 2 running in demux by
> 4 mode. When I terminate the inputs with a 50 ohm connector and collect
> data using a basic snapshot block design, I get a little bit of noise on
> the LSB. I export the data to a csv file and find that it is a collection
> of 0’s and -1’s, indicating that the level being converted by the adc is
> sitting between these two values and there is some sort of internal noise
> causing us to jump between values. What is alarming is that when I
> collected 2^18 samples and run spectral analysis I see large spikes at
> intervals of FS/16 (See Attached, pwelch(x,1024,256,[],800)).
>
>
>
> I am running the ADC at 800MHZ and the FPGA at 200MHZ. I am using one of
> the more recent casper builds after the bitslipping commit on Mar 25th. I
> also tried to use the ruby script located at https://github.com/jack-h/
> casper_adc16/tree/master/ruby/lib.
>
>
>
> I run the bof file with “adc16_init.rb --reg=0x3a=0x0202,0x3b=0x0202 -d 4
> roach_ip boffile”, where I change the ic inputs. We only connected 8 of the
> 16 coax cables to the board and I had to switch off the default.
>
>
>
> Has anyone else had a similar experience or ideas?
>
> 
>
> Adam Schoenwald
>
> 
>
>
>

Re: [casper] ADC16x250-8 coax rev 2 noise

[David MacMahon]

Hi, Adam,

I haven't looked at the spectral content of a terminated input before so I 
don’t have any comparative results, but I think the spikes you are seeing are 
caused by mismatched gains and/or offsets of the ADC’s interleaved cores (I 
think there are a total of 8 cores, also called "branches" in the datasheet).  
Have you tried sampling band limited noise (e.g. low pass at Fs/20)?  I think 
the severity of the spikes will be less in the presence of a signal.  In the 
worst case you will have to ignore the 8 frequency channels with these spikes, 
but you might be able to improve things by tweaking the coarse gain and/or fine 
gain registers in the ADC.

HTH,
Dave

> On Sep 20, 2016, at 11:46 AM, Schoenwald, Adam (GSFC-564.0)[AS and D, Inc.] 
>  wrote:
> 
> Hi All,
> I have a question regarding the ADC16x250-8 coax rev 2 running in demux by 4 
> mode. When I terminate the inputs with a 50 ohm connector and collect data 
> using a basic snapshot block design, I get a little bit of noise on the LSB. 
> I export the data to a csv file and find that it is a collection of 0’s and 
> -1’s, indicating that the level being converted by the adc is sitting between 
> these two values and there is some sort of internal noise causing us to jump 
> between values. What is alarming is that when I collected 2^18 samples and 
> run spectral analysis I see large spikes at intervals of FS/16 (See Attached, 
> pwelch(x,1024,256,[],800)).
>  
> I am running the ADC at 800MHZ and the FPGA at 200MHZ. I am using one of the 
> more recent casper builds after the bitslipping commit on Mar 25th. I also 
> tried to use the ruby script located 
> athttps://github.com/jack-h/casper_adc16/tree/master/ruby/lib 
> .
>  
> I run the bof file with “adc16_init.rb --reg=0x3a=0x0202,0x3b=0x0202 -d 4 
> roach_ip boffile”, where I change the ic inputs. We only connected 8 of the 
> 16 coax cables to the board and I had to switch off the default.
>  
> Has anyone else had a similar experience or ideas? 
> 
> Adam Schoenwald
> 
>  
>