https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/2] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -54,3 +56,289 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static constexpr Builtin::Info BuiltinInfo[] = {
+#define BUILTIN(ID, TYPE, ATTRS)
jhuber6 wrote:
> That's not a bad idea but I _suspect_ we'll run into a physical design issue
> since there doesn't seem to be a natural place to put the shared base -
> unless you were thinking about a place in particular? We'd probably have to
> relocate this to the AMDGCN side, and then
AlexVlx wrote:
> > > How much of this is actually different from the existing target info for
> > > AMDGCN? Seems like we're doing a lot of redundant stuff like defining
> > > macros or features.
> >
> >
> > That's part of the point, it's not actually supposed to differ in those
> >
jhuber6 wrote:
> > How much of this is actually different from the existing target info for
> > AMDGCN? Seems like we're doing a lot of redundant stuff like defining
> > macros or features.
>
> That's part of the point, it's not actually supposed to differ in those
> particular regards, up
@@ -54,3 +56,289 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static constexpr Builtin::Info BuiltinInfo[] = {
+#define BUILTIN(ID, TYPE, ATTRS)
AlexVlx wrote:
> How much of this is actually different from the existing target info for
> AMDGCN? Seems like we're doing a lot of redundant stuff like defining macros
> or features.
That's part of the point, it's not actually supposed to differ in those
particular regards, up to the point
@@ -0,0 +1,294 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -x hip \
+// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN: -o - | FileCheck %s
+
+// RUN:
https://github.com/jhuber6 commented:
How much of this is actually different from the existing target info for
AMDGCN? Seems like we're doing a lot of redundant stuff like defining macros or
features.
https://github.com/llvm/llvm-project/pull/89796
@@ -54,3 +56,289 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static constexpr Builtin::Info BuiltinInfo[] = {
+#define BUILTIN(ID, TYPE, ATTRS)
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/2] Add initial support for AMDGCN flavoured SPIRV.
---
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff c793f4a4dab058cee4f283100946a1bb8e465f59
662f160418c704f45e57e751168903d774b74303 --
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Alex Voicu (AlexVlx)
Changes
This change seeks to add support for vendor flavoured SPIRV - more
specifically, AMDGCN flavoured SPIRV. The aim is to generate SPIRV that carries
some extra bits of information that are only usable
https://github.com/AlexVlx created
https://github.com/llvm/llvm-project/pull/89796
This change seeks to add support for vendor flavoured SPIRV - more
specifically, AMDGCN flavoured SPIRV. The aim is to generate SPIRV that carries
some extra bits of information that are only usable by AMDGCN
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