Re: 5x speedup for AES using SSE5?

2008-08-25 Thread Brian Gladman
Eric Young wrote: Eric Young wrote: I've not looked at it enough yet, but currently I'm doing an AES round in about 140 cycles a block (call it 13 per round plus overhead) on a AMD64, (220e6 bytes/sec on a 2ghz cpu) using normal instructions. Urk, correction, I forgot I've recently upgraded

multicore hash functions (was: 5x speedup for AES using SSE5?)

2008-08-25 Thread zooko
Hello Peter Gutmann. I'm working on a contribution to the SHA-3 process, and I've been using exactly the sort of abstraction that you describe -- counting one computation of a hash compression function as a unit of work which could be computed concurrently by some sort of parallel

Re: [cryptography] 5x speedup for AES using SSE5?

2008-08-25 Thread Kevin Brock
Peter Gutmann wrote: Is there some feature of multicore CPUs that I'm missing, or is it a case of cryptographers abstracting a bit too much away? And if it's the latter, should someone tell them that multicore CPUs don't actually work that way? I can't speak to the former issue, but I seem

Re: [cryptography] 5x speedup for AES using SSE5?

2008-08-25 Thread Hovav Shacham
On Aug 24, 2008, at 5:20 AM, Peter Gutmann wrote: Speaking of CPU-specific optimisations, I've seen a few algorithm proposals from the last few years that assume that an algorithm can be scaled linearly in the number of CPU cores, treating a multicore CPU as some kind of SIMD engine with