On the Other Other Hand, I vaguely remember a neat paper by Matt Blaze
some years ago that shows that certain classes of back doors, like
good back doors in conventional crypto systems, are equivalent in
difficulty to building a public key system. Anyone remember the name
of the paper
On Fri, 25 May 2001, Matt Blaze wrote:
That's it. I vaguely recall paper about a year or two ago by, I think,
Bart Preenel, that expanded on a similar idea. I don't think it cited
our MKCS tech report, so I presume he wasn't aware of it and took a slightly
different direction.
That is
David Honig wrote:
Under an assumed name
SOP pp. 5-7.
Both Altera and Xilinx have their own FPGA-embeddable soft CPUs,
as well as supporting other popular CPU designs (e.g., ARM) which are also
available in HDLs.
Unfortunately, I think here's another nucleus for future bloat growth,
and
It is nearly impossible to be absolutely sure.
Look at it from a couple of different angles:
The usual situation is that one must trust the reputation and
competence of the manufacturer. This is suboptimal, as many
tamper-resistant devices, especially unpowered tamper
resistant devices, have
On Fri, 25 May 2001, Enzo Michelangeli wrote:
On the Other Other Hand, I vaguely remember a neat paper by Matt Blaze
some years ago that shows that certain classes of back doors, like
good back doors in conventional crypto systems, are equivalent in
difficulty to building a public key
On another mailing list, someone posted an interesting question: how to
ascertain that a tamperproof device (e.g., a smartcard) contains no hidden
backdoors? By definition, anything open to inspection is not tamperproof. Of
course, one can ask the manufacturer to disclose the design, but there is
