Hi, all.
I change davincifb driver DMA buffer allocation from
dma_alloc_coherent() into using ioremap() to reserver FB
memory.
If the reserve memory resides between 120M-126M, it works fine,while
larger than 126M, its output is lines instead of linux tux.
phys memory of my board is 256M, and pass
Hi,
I have a doubt in DMA channel configuration. Is destination address or
source address increments by the element index after ACPY3_start()?
If so, is the increment is same as the element index?
Plz reply ASAP.
Regards,
Padma
___
Hi,
I want to capture video from PAL cemera (4:2:2 format) by V4L2,and
resize the video to 4:2:0 CIF format,there are two questions:
1,How to de-interlace two field as one frame and convert it to be CIF
frame? I saw the EncodeDecode demo, which de-interlace directly with
V4L2_FIELD_INTERLACED
[Cc'ing Sergey who has been here before and might know more...]
Troy Kisky wrote:
Not only are the ECC bytes stored in different locations in the spare
area, but the ECC value stored is also different. (davinci-git vs U-boot)
I've modified both the linux kernel, and u-boot to store the ecc at
Bernard Blackham wrote:
[Cc'ing Sergey who has been here before and might know more...]
Troy Kisky wrote:
Not only are the ECC bytes stored in different locations in the spare
area, but the ECC value stored is also different. (davinci-git vs U-boot)
I've modified both the linux kernel, and
Thomas Lange wrote:
Bernard Blackham wrote:
Maybe I don't understand it fully, but the current u-boot ECC
implementation for large page NAND devices looks rather broken to me -
it appears to generate a 12 byte ECC from the four NANDFnECC registers
for a 2048 byte page read. But the NANDFnECC
Bernard Blackham wrote:
I just found that Troy has actually submitted a fix for this
previously[1], but it was amalgamated with other changes that led to it
being nacked. A bit of a shame, because it was good work!
Thanks, but I actually stopped pushing the patch because I agreed
that the
Are you using CMEM? Typically, CMEM is configured (during 'insmod',
usually from the loadmodules.sh script) to use 120MB - 128 MB.
Regards,
- Rob
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
] On Behalf Of steven.zhang
Sent: Thursday, June 26, 2008 1:33 AM
Sorry but I'm extremely new to Linux and DaVinci but would this have
anything to do with me not booting the new kernel after I built it and
rebuilt the DVEVM software for the target?
Tivy, Robert wrote:
This sounds like you need to rebuild dm350mmap.ko against the kernel
that you're booting.
Has anyone tried this product, mentioned here?
http://focus.ti.com/apps/docs/mrktgenpage.tsp?contentId=41246appId=79DCMP=DSP_IPNetcamHQS=Other+OT+ipnetcampr
Our main interest is in white balance/exposure controls. Does anyone
have any pointers for these?
Chris
Andy Ngo,Andrew Armstrong，你好
really? I will do more test.
[EMAIL PROTECTED]
2008-06-27
- Original Message -
From: Andy Ngo
To: jp_liu,Andrew Armstrong
Sent: 2008-06-26, 10:25:07
Subject: Re: Re: Re: RE: Buggy Audio Driver
JP,
I tried your fix and the write stall still occurs under
Thanks Rob. But I am afraid not. You know, when FB driver is loading(on
kernel booting), CMEM is not insmod(after kernel boot up) at all.
Regards,
Steven
On Thu, 2008-06-26 at 16:41 -0500, Tivy, Robert wrote:
Are you using CMEM? Typically, CMEM is configured (during 'insmod',
usually from the
There's a silicon errata that may be applicable - not sure.
Advisory 1.3.1 here:
http://focus.ti.com/lit/er/sprz241k/sprz241k.pdf
... states that the OSD window addressing is limited to 128 MB.
Chris
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
] On Behalf Of
U-boot's HW ECC support for large page NAND on Davinci is completely
broken. Some kernels, such as the 2.6.10 one supported by
MontaVista for Davinci, rely upon this broken behaviour as they
share the same code for ECCs. In the existing scheme, error
detection *might* work on large page, but
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