Sergei,
Queue and Buffer managers were required because the list management
functions were taken into the controller. That is covered as part of item 1 I
mentioned.
Regards
swami
-Original Message-
From: Sergei Shtylyov [mailto:sshtyl...@ru.mvista.com]
Sent: Sunday, March
Zhang,
Please keep the mailing list in the loop, someone might have a solution
or could use your solution.
On Mon, 2009-03-23 at 11:18 +0800, shaofeng zhang wrote:
Dear Sir,
Sorry, let me introduce myself, my name is Philby.
I am sorry to reply your email lately. Because we were
Hi, is the tvp7002 driver updated for 1080p? so far I can see only 1080i
supported in the release. Thanks.
___
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Davinci-linux-open-source@linux.davincidsp.com
Clock and Pin Mux definitions for video on DM646x SoC
Add clock defintions and pin mux definitions for Video Port Interface(VPIF).
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
arch/arm/mach-davinci/dm646x.c | 38 ++
Hello,
I have a couple of CE-based applications/processes that I wish to run in
parallel. Both have different DSP server engines.
App1: App1.x64P
App2: App2.x64P
I follow the procedure listed on the wiki page and add the necessary lines to
the CE configuration script of both applications
TI THS7303 video amplifier driver code
This patch adds driver for TI THS7303 video amplifier. This driver is
implemented as a v4l2 sub device. Tested on TI DM646x EVM.
This patch applies on top of the ADV7343 driver patch submitted prior to
this. The dependency is due to the modification of the
Analog Devices ADV7343 video encoder driver
Add ADV7343 I2C based video encoder driver. This follows the v4l2-subdev
framework.This driver has been tested on TI DM646x EVM. It has been tested for
Composite and Component outputs.
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Adds support for MMC/SD on TI's DA830 architecture.
On TI's DA830, the DMATRIG bit should be set for CPU transfers.
If MMC is being used for both CPU and EDMA based transfers, then
it is likely that, an extra MMC EVENT is latched in the EDMA Event
register even when just the CPU and MMC are in
The DSP can only be loaded with one image (Server) at a time. The first app
loads the DSP with App1.x64P. When the 2nd app tries to load the DSP with
App2.x64P, LAD denies the request (error code 3 == LAD_ACCESSDENIED) since the
DSP is already loaded with App1.x64P.
If you need to run App1
Hello.
Sudhakar Rajashekhara wrote:
Adds support for MMC/SD on TI's DA830 architecture.
On TI's DA830, the DMATRIG bit should be set for CPU transfers.
Could you call them PIO transfers for clarity?
If MMC is being used for both CPU and EDMA based transfers, then
it is likely that,
Hi
I have been looking for a way to download the uboot and ubl to the DM355 using
the JTAG connection. I searched the wiki and found this article dealing with
debugging the DM355 using the Amontec JTAG Key
On Monday 23 March 2009, Sergei Shtylyov wrote:
I was just trying to outline the large difference between 3.0 and 4.1
that warrants a new driver, so I'm not sure why TI people started to argue...
I think the pushback was on your statement that they're
so different as to be incompatible through
On Monday 23 March 2009, Sudhakar Rajashekhara wrote:
Adds support for MMC/SD on TI's DA830 architecture.
Also known as OMAP-L137? Regardless, if that chip
has the same issue, please update comments accordingly.
Likewise on the EDMA patch.
This looks like *partial* support for at least the
On Wednesday 18 March 2009, Purushotam Kumar wrote:
From: Purshotam Kumar purusho...@ti.com
This patch adds support for MMC/SD controller driver for DaVinci family SoC.
This patch will work for SoC like DM6446 and DM355. SoC like DM365 and
DA830 also has same controller with small variations
On Monday 23 March 2009 13:38:15 Chaithrika U S wrote:
TI THS7303 video amplifier driver code
This patch adds driver for TI THS7303 video amplifier. This driver is
implemented as a v4l2 sub device. Tested on TI DM646x EVM.
This patch applies on top of the ADV7343 driver patch submitted prior
From: davinci-linux-open-source-boun...@linux.davincidsp.com
[mailto:davinci-linux-open-source-boun...@linux.davincidsp.com] On Behalf Of
Prabhaharan R-TLS,Chennai
Sent: Sunday, March 22, 2009 2:08 AM
To: davinci-linux-open-source
Subject: CMEM Issue in Decode
On Monday 23 March 2009 13:38:04 Chaithrika U S wrote:
Analog Devices ADV7343 video encoder driver
Add ADV7343 I2C based video encoder driver. This follows the v4l2-subdev
framework.This driver has been tested on TI DM646x EVM. It has been tested for
Composite and Component outputs.
As reported a few days ago, my DVEVM was producing a kernel panic with
kernel version 2.6.25-davinci1, 2.6.26-rc5 and 2.6.27-davinci1. It was
consistently in net_rx_action. It would happen after anything from a
few seconds up to about 4 hours of operation. A copy of the console log
is attached
The Davinci EMAC driver does two things incorrectly:
1. it does not use the budget value during transmission, so it can
process more than the allowed number of packets. It should either honour
the budget, or lie about the number of packets that it processed.
2. it manipulates the NAPI list
David Brownell davi...@pacbell.net writes:
On Monday 23 March 2009, Sergei Shtylyov wrote:
I was just trying to outline the large difference between 3.0 and 4.1
that warrants a new driver, so I'm not sure why TI people started to argue...
I think the pushback was on your statement that
I am using DM355 EVM board for AE and AWB study ,
using device driver dm355_aew.c and dm355_aew_hw.c suppling fuctions for
setting 3A engine registers.
My frame size is 1280 x 720.
Now i wanna do AE and AWB statistic ,
parameters for 3A engine is as following:
window_width = 100,
Philby,
I modified the nand_bbt.c like u-boot 1.2.0. the modification is only just
about the function create_bbt() :
*=Partition line===*
*the Italic is the Original and the bold is the modifictaion : *
static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct
Kevin,
As I pointed out the queuing model has changed between the existing CPPI3.0 DMA
implementation in the kernel and the new CPPI4.1 DMA implementation. There are
associated changes relating to initialization sequence.
Given this I think we can go ahead with the existing implementation
Sergei,
Thanks for your comments.
Hello.
Sudhakar Rajashekhara wrote:
Adds support for MMC/SD on TI's DA830 architecture.
On TI's DA830, the DMATRIG bit should be set for CPU transfers.
Could you call them PIO transfers for clarity?
I agree with this. Will change it to PIO.
Dave,
On Monday 23 March 2009, David Brownell wrote:
This looks like *partial* support for at least the
OMAP-L137. It omits the HSMMC/eMMC support for 8-bit
parallel I/O. So $SUBJECT might usefully reference
EDMA too ... :)
Make that: reference PIO.
Isn't EDMA support going to
Dave,
On Monday 23 March 2009, Sudhakar Rajashekhara wrote:
Adds support for MMC/SD on TI's DA830 architecture.
Also known as OMAP-L137? Regardless, if that chip
has the same issue, please update comments accordingly.
Likewise on the EDMA patch.
This behavior is seen both on DA830 and
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