So, are you saying the bus is locked up until another message is transmitted.
That doesn't sound good to me. If a signal stops a master transmit
transaction, we
should not wait for another master transaction before releasing the bus. We
should
play nicely with other masters.
Troy
This patch addes i2c slave functionality to git-davinci-2.6.24 and
fixes wrong register writing during DAVINCI_I2C_IVR_RDR interupt.
For example, we use mouse and keyboard on i2c as masters.
The module, which want process i2c slave interrupts, should call
int i2c_davinci_add_client(struct
Hello,
I want to use EDMA during booting. So i am testing data transfer from
ARM RAM to DRR2. Copying from DRR to arm goes fine. But during copying
from arm to ddr2, every (29-31)th bytes are broken. Any ideas?
As the base application i use spraai0-application. Here is the patch for it:
diff
Hi,
I have only one partition of nand-flash mtd0. But, as we want to store
u-boot, uImage and filesystem on the nand-flash, it would be better
to have many partitions.
So, how can I make at least 2 partitions there?
Best regards, Alexander.
___
Hi,
I'm trying to write different yhings on nand-flash, but i have some
problems of locating them, cause i don't understand:
How does u-boot know where something like uImage is located on nand-flash?
Particulary, I can't understand:
What are the parameters of nboot, especialy third?
How does
