Re: Filesystem Optimization

Probably you don't have /dev/console in your HDD copy. Probably you missed some flags to the 'cp' command or your original filesystem doesn't have /dev/console at all. yang shaobo wrote: I made a small filesystem by Devrocket ( follow this article :

Re: How to cancle the DHCP request when DVEVM boots

Use ip=board_ipaddress:nfs_server_addess or ip=none if you want to disable kernel IP autoconfiguration at all. See Documentation/nfsroot.txt: ip=client-ip:server-ip:gw-ip:netmask:hostname:device:autoconf This parameter tells the kernel how to configure IP addresses of devices and also how

Re: compiling applications with MV toolchain

No luck,shared libraries are also giving same issue. is there any other compilation option which forces strict alignment? If the sources you are trying to use have been written without alignment in mind, I guess you won't be able to 'fix' things by only setting a compilation switch.

Re: compiling applications with MV toolchain

Hi ashok, See this page: http://www.nslu2-linux.org/wiki/Info/Alignment Ivan [EMAIL PROTECTED] wrote: Hi, i have some apllication which are running on x86 without any issue. But if i cross compile those application for davinci board with MV toolchain, it is getting segmentation fault.

Re: Translating kernel virtual address to physical address

Hi Robert, However, vmlist is not exported, and I would expect that there is a helper function somewhere for traversing vmlist, but I can't find anything. Probably you can consider splitting CMEM in a always-bult-in and built-in-or-module part? For user-to-phys address translation, I

Re: codec engine, cache coherency problem

Hi Brian, I'm not a Codec Engine expert, but recently I ran into a similar problem. For one of our projects we had one physical area in memory readable and writable from: Kernel Userspace EDMA The mappings of Kernel and Userspace used different virtual addresses (and thus occupied

Re: RAMDISK - nand_write_ecc: Attempt to write not page aligned data

Align your ramdisk size to a multiple of 512 (the page size of your NAND) 0x16cbcc -- 0x16cc00 == nand write 0x8070 0x104000 0x16CC00 Ivan ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: Subject: Booting DaVinci with uImage and filesystem on NAND

Hi Ruiyu, 1. Your erase command is not correct. 2. You didn't enable MTD block device support in kernel config JFFS2 needs the so-called cleanmarkers written to empty blocks. For NAND, these are special markers written in spare area. Instead of flash_eraseall, use flash_eraseall -j. And for

Re: about nand flash writing

Hi, DaVinci RBL expects ECC to be placed in a non-standard format. See sprue14a.pdf, page 131 for ECC format description. You can also see code from TI UBL or one of its opensource replacements (see [1]). Ivan [1] http://wiki.davincidsp.com/index.php?title=RBL_UBL_and_host_program

Re: DVFlasher/TI UBL replacement, how to go on?

Hi Lloyd, Personally, I am more interested in SOURCE portability than executable portability. My development tools are written in C or CPP - these are the gold standard of Linux. I have seen little that .NET offers that provides anything at this low a level. Frankly, downloaders are trivial

RE: TMS320DM355 Processors

Hi Thom, Do you think this low cost DaVinci unit will be powerful enough to play H.264 video? BR, Ivan Maughan, Thomas wrote: Dirk, This is indeed a low cost DaVinci processor. The DM355 DVEVM (board + dvsdk + 'demonstration version' of montavista pro v4.0 + beta 2.6.10 lsp) cost is $495

DaVinci Opensource Firmware Tools

Hi all, We are already discussing UBLs and their flashing. I think that we can extend this topic and start talking about complete firmware flashing and upgrade. By complete firmware I mean UBL, Tertiary Bootloader, Kernel, Userspace, FPGA Configuration and so on. What do you think? BR, Ivan

Re: DaVinci Opensource Firmware Tools

Hi Lloyd, U-Boot can load kernel images from JFFS2. Unfortunately JFFS2 mount (scan) speed is VERY poor even with the read-only option turned on. I can't give you concrete figures, but as far as I remember, on a 2 MB uncompressed, read-only JFFS2 partition with only one file -- the kernel,

Re: TI DaVinci Initial Bootloader, tar.gz

Hi Dirk, I think we should take a two step approach here: 1) Have *one* functional, flexible, extensible, under public source control (...) open source replacement for TI DaVinci bootloader. 2) Try to use this then golden bootloader to start a basic discussion about the above topics on

BOOTME

Hi Daniel, I am developing a DVFlasher/TI UBL replacement for our boards. I need some help regarding RBL UART bootmode. Is it possible, from NAND UBL, to jump to some address (0x4xxx) and have RBL start UART boot (BOOTME BOOTME BOOTME BOOTME)? I need this in case regular NAND UBL fails to

Re: Framebuffer Console

Do you have /dev/console in your rootfs? Andrew Armstrong wrote: I have managed to set the framebuffer as a virtual terminal output, so I can see all my kernel messages, however I get an unable to open an initial console message. In this particular example I have disabled the serial port as I

Re: Framebuffer Console

Hi Anrew, mknod /dev/console c 5 1 BR, Ivan ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: Framebuffer Console

Cool :) By the way, did you patch framebuffer driver to get the right FB console output? (By right I mean -- with correct colors) BR, Ivan Andrew Armstrong wrote: Ivan, That does the trick nicely!! Regards, Andrew On Thu, 2007-08-30 at 15:57 +0300, Ivan Tonchev wrote: Hi Anrew

Re: Framebuffer Console

Hi Andrew, I did not, is that why I am missing the first few characters of the screen as well? If you are talking about the black messages on black background - yes. can you point me in the right direction of the patch!? I am using OSD0 in 8 bit mode with OSD1 disabled. Colors are

Re: DVFlasher/TI UBL replacement, was: BOOTME

Dirk Behme wrote: Dirk Behme wrote: Ivans mail: Ivan Tonchev wrote: Hi Dirk, Thanks for posting your sources. Unfortunately I am very pressed on time and I can't look at them now. Very happy to hear about yours and Sergey's work! What I have is a somewhat complete flashing toolchain

Re: Vector table for Davinci

Meher, ARM9 vectors may be located either at addresses 0x (low) or 0x (high). I guess your vector setting is high and your NOR flash is also visible at 0x. AFAIK, vector table location is controlled by 1. CP15 (ARM core coprocessor 15) 2. ARM core HIVECS pin I

Re: Vector table for Davinci

Where is this mapping information available? I don't know. Ask TI people about it. Or prove/unprove my suggestion with CCS yourself! Connect with JTAG and compare memory regions 0x and 0x0200, size 0x1 Good luck, Ivan ___

Re: Vector table for Davinci

Hi Meher, I am not sure how to intrepet this.. Also why should the exceptions go to the 0x0200 location instead of 0x? They don't go to 0x0200 -- this is impossible with standard ARM9 cores. Do you mean 0x is mapped to NOR Flash at 0x0200? I guess the first

Re: STM NAND512R3A boot problem: RBLUBLECC

Hi Vitaly, I have faced the situation here. We are doing the custom design on the base of Davinci EVM. Previous revision had the Samsung K9F1208 nand and the configuration worked just fine with our current DVFlasher, UBL and u-boot SW. Another revision based on STM NAND512R3A flash (which

Re: STM NAND512R3A boot problem: RBLUBLECC

Hi Vitaly, Don't worry about bad blocks after 0x03FF. SW-managed BBT (bad block table) is stored there. They are marked bad, because MTD guys don't want us to erase BBT by mistake. Good luck with TI people. The delay you are talking about is huge. I guess RBL is doing something

Re: STM NAND512R3A boot problem: RBLUBLECC

Hi Vitaly, Talking about delay that is weird if RBL tries to fix the ECC errors because the flash is empty and filled with 0xFF as I can see it from the u-boot. I misunderstood you. I thought that on the STM board, when the flash was empty, you saw no delay. But obviously you were talking

Re: STM NAND512R3A boot problem: RBLUBLECC

Hi Vitaly, Chasing this nasty problem starts to get real fun :) As another test I run the new board connected with JTAG to the CSS and tried to debug the RBL. And got wierd results: if I do step-by-step execution for the code in ARM memory from address 0x4000 to address 0x403C allowing about

Re: SD card support in U-Boot?

Hi Eric, Is anyone working on adding SD card support to U-Boot for the 644x? I have ported the SD card project from DaVinci CCS examples. Unfortunately this project is not GPL and I cannot disclose my work. Speaking with TI about this was on my list, but noone showed interest for the SD card

Re: AW: U-Boot-1.2.0 and NAND_Flash

Hi Scott, Dirk and Ivan, Being a newbie to linux and u-boot, and having discovered, actually been directed to this list, belatedly, I am sure I have not done things in the most efficient method. I started with u-boot-1.1.3. After a lot of thrashing, I am now able to write the UBL and

Re: AW: U-Boot-1.2.0 and NAND_Flash

Hi Scott Is there any other way to write this fs from within the kernel without access to nandwrite? Any other formatting I need to do on the nand? You have to erase nand and write the so-called cleanmarkers in block spare areas. Under Linux, flash_eraseall -j will do the job. Under

Re: AW: U-Boot-1.2.0 and NAND_Flash

Thanks! NP :) And one thing I missed: You can write your image with u-boot's nand write, as long as you have nand erase clean-ed the desired area in NAND. And of course your ECC implementations in u-boot and kernel are compatible. If you use u-boot for flashing, you will not need

Re: U-Boot-1.2.0 and NAND_Flash

Hi Dirk, Thank you for contributing! - It does the above stuff (1 2) and therefore makes your patch more generic. Have a look to board/davinci/nand.c part of patch in attachment. There, it introduces an additional #define ENABLE_DAVINCI_NAND_HW_ECC which can be used to switch between

Re: [Fwd: [U-Boot-Users] Starting a patch for TI Davinci support]

OK, I'll check with Roger and answer your thread in the u-boot mailing list. BR, Ivan Philip Balister wrote: Ivan Tonchev wrote: The patch is against git. I am very interested in structural comments, like the best way to support similar, but different boards. My patch is against u-boot 1.2

Re: Wi-fi support on Davinci board?

Hi Lewis, I think that ZD1211 based devices should work. We've used such a USB device with another TI SoC running ARM9 Linux. BR, Ivan Lewis Liu wrote: Hi, Friends, I'm planning to use the USB wireless card on the Davinci board. Does anyone know if there is any special model that works?

Re: MMC/SD driver problem from git tree!

Hi Yogesh, I haven't tested this on GIT tree, but on 2.6.10 it works. At least for SD :) BR, Ivan Yogesh Kumar M wrote: Hi all, I use Git kernel 2.6.20 version,when compile the mmc/sd driver, error likes: error: 'struct mmc_data' has no member named 'req' error: 'struct mmc_data' has no

DaVinci MMC/SD driver -- no MMC support?

Hi all, Do you know whether DaVinci MMC/SD supports MMC? I have tested with with SD and MMC cards and it works fine with the SDs, but doesn't detect the MMCs. Do I have to change something to make it work with MMC? BR, Ivan ___

Re: DaVinci 2.6.20 Development Forum = What about a Wiki/FAQ ?

Hi Huy, What's the status of the Wiki/FAQ proposal. Over the past few days I collected valuable information about DaVinci RBL ECC/Bad block (non)handling and I'd like to share it. Is there an official place for such content already? BR, Ivan Pham, Huy wrote: Jean, We're looking at the

Re: [Fwd: [U-Boot-Users] Starting a patch for TI Davinci support]

Hi Philip, I am trying to get a patch together to add support for the TI Davinci processor into u-boot. I have started with one of the patches floating around the internet and am in the process of modifying to support the Lyrtech SFF SDR board. Currently, this patch will boot on the board and

Re: DaVinci SPI over EDMA

Hi Uthappa, We were working on an SPI EDMA driver, but our buffers were less than a kilobyte. Unfortunately we found that when programmed with EDMA, DaVinci SPI controller does not always send the first byte. Sometimes it sent it, sometimes it started from the second byte... Did you

Re: mmap issue

Hi Andy, Thanks, but how do I set the range uncacheable? I don't see such an option for mmap. Please advise. Thanks! Have you tried with pgprot_noncached()? I haven't used it myself, but found it in some framebuffer mmap handling code. For example see linux/drivers/video/sa1100fb.c

Re: UBL on custom board

Hi Suba, You can find a u-boot port for DM320 here: http://svn.neurostechnology.com/svn/neuros-bsp/trunk/bootloader/ The interesting file is board/dm320/nand.c. One thing that needs mentioning is that this source code uses software ECC, which is not compatible with the DM320 RBL. I don't know

Re: UBL on custom board

My u-boot compilation seems to go well. But during ld, there are errors like this: _udivSi3.oS: warning: duplicate section .note.gnu.arm.ident has different contents. And the map file is created, but no .bin or .srec. Any ideas? Which version of u-boot are you compiling and with

Re: UBL on custom board

Hi Suba, Why would you want the gel file? I just wanted to compare it with the GEL files I use. I see that you modified PLL, DDR2 and AEMIF initializations. When using this gel file and the JTAG, there are no ECC errors and the UBL and u-boot are flashed correctly using that.

Re: UBL on custom board

[mailto:[EMAIL PROTECTED] Sent: Friday, April 27, 2007 7:40 AM To: Ivan Tonchev; Allred, Daniel Cc: Linux DaVinci; Subashini Ravindran Subject: Re: UBL on custom board Hi All, We implemented the patch provided by Ivon Tonchev. But the problem still persists. There is no change

Re: UBL on custom board

How much RAM do you have on your board? Is it 256M? ketan deshpande wrote: Hi, We are trying the DVFlasher_1_12 with the custom designed board with NAND Flash. The NAND flash chip we are using is a big block device.When we try to flash the UBL we get the following messages.

Re: 180Mhz is minimal ARM clock required for USB 2.0

Hi Andy, Constantine, We're interested in this item too. Is this Kconfig change sufficient for what we want? I'm not sure, but I think there is more to be changed. It seems to me that Host/Peripheral mode is selected by Kconfig and hardcoded in kernel image. See

Re: UART0 help

, no software flow control 2. Then I read serial port with cat /dev/ttyS0 3. And I write to it with echo something /dev/ttyS0 You can achieve 1) with other tools, of which stty is a possible example... Ivan Tonchev wrote: And if you're OK with implementing your application in bash, you can use

UBL for 128MB DDR

It'd be also great if you make the UBL more straightforward to port for boards with less than 256 MB memory. For current implementation I had to change: .ddrram2 starting address in ubl_davinci.lds, MAX_IMAGE_SIZE in ubl.h and RAM_END_ADDR in ubl.h For my memory map (128 mb), I set

Re: UBL for 128MB DDR

Daniel J. Allred Software Applications Catalog DSP / Emerging End Equipment *From:* Ivan Tonchev [mailto:[EMAIL PROTECTED] *Sent:* Thursday, March 15, 2007 11:04 AM *To:* Allred, Daniel *Cc:* Monk, Roger; Linux DaVinci *Subject

Re: UBL for 128MB DDR

:* Ivan Tonchev [mailto:[EMAIL PROTECTED] *Sent:* Thursday, March 15, 2007 11:53 AM *To:* Allred, Daniel *Cc:* Monk, Roger; Linux DaVinci *Subject:* Re: UBL for 128MB DDR Great to hear that you'd be dropping the s-rec format. It's bloats images quite a bit and makes downloads over the UART more

Is UDMA4 possible?

Hi all, I want to access my HDD in UDMA4 mode (ATA 66). Unfortunately it seems that with current davinci driver, this isn't possible. Am I wrong? hdparm tells me that I'm in udma2 and when I try to set udma4, I receive this message: ide0: Speed warnings UDMA 3/4/5 is not functional. If I'm

FIQ support

Hi DaVinci experts, Has anyone of you used FIQs with DaVinci? Is this possible with the current MV codebases (GIT and stable)? If not does anyone has pointers to what modifications have to be applied? Any kind of examples would be greatly appreciated! Please help me. I'm a noob :) Thanks,

Re: New UBL source and DVFlasher App on DVEVM update site

Hi Daniel, Link is up. I peeked at UBL source code and it seems that it has the soft reset fix integrated. I haven't tested it yet though. Ivan Allred, Daniel wrote: The link on the DVEVM update site has been fixed. Sorry for that! Daniel Daniel J. Allred Software Applications

Re: Using boundary scan tool to program NOR flash

Hi Andy, You can load u-boot to your board via JTAG. You'd need a JTAG and a working GEL file for your board which you probably already have. Code Composer Studio can load elf files, so assuming that your DDR is initialized correctly (by the GEL file), you can load a compiled u-boot

Re: New UBL source and DVFlasher App on DVEVM update site

*From:* Ivan Tonchev [mailto:[EMAIL PROTECTED] *Sent:* Monday, March 12, 2007 5:22 AM *To:* Allred, Daniel *Cc:* Arie Muijnck; Carlos Ojea; Linux DaVinci *Subject:* Re: New UBL source and DVFlasher App on DVEVM update site Hi Daniel, Link is up. I peeked at UBL source code and it seems that it has

Re: New UBL source and DVFlasher App on DVEVM update site

*From:* Ivan Tonchev [mailto:[EMAIL PROTECTED] *Sent:* Monday, March 12, 2007 5:22 AM *To:* Allred, Daniel *Cc:* Arie Muijnck; Carlos Ojea; Linux DaVinci *Subject:* Re: New UBL source and DVFlasher App on DVEVM update site Hi Daniel, Link is up. I peeked at UBL source code

Re: UBOOT Compilation

Hi Peter, Can you share your u-boot-1.1.6 with us? AFAIK it has more flexible support for NAND devices. E.g. you don't need to hardcode your u-boot for particular NAND geometry, but rather it detects and handles this runtime. It also supports a great deal of Manufacturer IDs and Device IDs (code

Re: reboot fail when using nandflash

Hi Steve, I reproduced your soft reset problem on our boards and on evm. In the mean time TI provided us UBL source code, so I did some patching. I implemented workarounds for both soft reset and STM NAND flash. Code works OK at least for me. I submitted patches to Roger. Ivan Steve Yeh

Re: reboot fail when using nandflash

this part. Steve 2007/3/5, Ivan Tonchev [EMAIL PROTECTED]: Hi Steve, I reproduced your soft reset problem on our boards and on evm. In the mean time TI provided us UBL source code, so I did some patching. I implemented workarounds for both soft reset and STM NAND flash. Code works OK

Re: reboot fail when using nandflash

Hm, DaVinci soft reset is implemented as a watchdog timer reset (see /include/asm/arch/system.h and arch/arm/mach-davinci/time.c: davinci_watchdog_reset()) I don't know whether this watchdog reset resets MMU and if it doesn't, whether the TI UBL takes steps to disable MMU before trying to