Hi Eduardo,
On 14-10-2013 15:13, Eduardo Valentin wrote:
On 14-10-2013 01:52, Zhang, Rui wrote:
Eduardo,
What's your opinion on this patch set?
BTW, please send me all the urgent fixes for thermal soc drivers
that
you think should go to 3.12.
I will be sending these + one
Hi Kukjin,
The TMU device tree node definition for Exynos4x12 family of SoCs.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
Changes for v2:
- None
Hi Kukjin,
This patch enables support for TMU at Exynos4412 based Trats2 board.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
Changes for v2:
- None
Hi Lokesh,
On 12/10/2013 15:26, Lokesh Vutla wrote:
Hi Benoit,
On Thursday 29 August 2013 06:22 PM, Lokesh Vutla wrote:
Add the AM33xx RNG module's device tree data.
Also add Documentation file describing the data
for the RNG module.
Seems you missed this patch. Please consider this for this
This series adapts the phy-omap-usb2 generic phy driver for AM437x.
While at that arrange the include files alphabetically (PATCH 1)
V2 of 2nd Patch which fixes the following from v1
- List comaptible entries in Documentaion
- Add usb_phy_data instead of checking compatible each
Hi Roger,
On 14/10/2013 11:20, Roger Quadros wrote:
Hi Benoit,
On 10/10/2013 06:34 PM, Felipe Balbi wrote:
On Mon, Oct 07, 2013 at 04:28:13PM +0300, Roger Quadros wrote:
The generic PHY framewrok expects different properties than the
old USB PHY framework. Supply those properties.
Fixes USB
This patch arranges the includes in alphabetical order
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/phy/phy-omap-usb2.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index
This patch adds a compatible for AM437x ti,am43xx-usb2 to
reuse the same phy-omap-usb2 driver.
Also updated the documentation to add the new compatible.
Signed-off-by: George Cherian george.cher...@ti.com
---
Documentation/devicetree/bindings/usb/usb-phy.txt | 4 +-
drivers/phy/phy-omap-usb2.c
On Mon, 2013-10-14 at 17:52 -0500, Felipe Balbi wrote:
Hi,
On Mon, Oct 14, 2013 at 06:24:28PM +0300, Ivan T. Ivanov wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
This patch fix compilation error and is an intermediate step
before the addition of DeviceTree support for newer targets.
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.
Add documentation for the DMM bindings.
Originally worked on by Andy Gross andy...@gmail.com
Cc: Andy Gross andy...@gmail.com
Signed-off-by: Archit Taneja arc...@ti.com
---
Hi Mark,
Fixed all your comments and already sent a V2.
On 10/14/2013 8:03 PM, Mark Rutland wrote:
On Mon, Oct 14, 2013 at 01:43:23PM +0100, George Cherian wrote:
This patch adds a compatible for AM437x ti,am43xx-usb2 to
reuse the same phy-omap-usb2 driver.
Also updated the documentation to
On Mon, 2013-10-14 at 17:59 -0500, Felipe Balbi wrote:
On Mon, Oct 14, 2013 at 06:24:39PM +0300, Ivan T. Ivanov wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
IRQ with number 0 is valid case, so check for negative
not entirelly correct... IRQ 0 isn't supposed to be used as a linux IRQ
Hi Thomas,
On Tuesday 01 October 2013 08:37 PM, Santosh Shilimkar wrote:
On Tuesday 01 October 2013 10:53 AM, Rob Herring wrote:
On 10/01/2013 08:57 AM, Santosh Shilimkar wrote:
On Tuesday 01 October 2013 09:48 AM, Rob Herring wrote:
On 10/01/2013 06:13 AM, Sricharan R wrote:
Hi,
On Monday
On Mon, Oct 14, 2013 at 08:30:28AM +0300, Terje Bergström wrote:
On 12.10.2013 14:24, Thierry Reding wrote:
Yeah, I don't like very much how this is currently done. I mean about
half of this is actually duplicate code because of the static inline
functions used for register defines. As
On Mon, Oct 14, 2013 at 12:05:18PM -0600, Stephen Warren wrote:
On 10/12/2013 05:32 AM, Thierry Reding wrote:
On Fri, Oct 11, 2013 at 04:14:27PM -0600, Stephen Warren wrote:
On 10/07/2013 02:34 AM, Thierry Reding wrote:
From: Mikko Perttunen mperttu...@nvidia.com
The Tegra114 display
On Mon, Oct 14, 2013 at 12:16:48PM -0600, Stephen Warren wrote:
On 10/14/2013 07:55 AM, Thierry Reding wrote:
On Fri, Oct 11, 2013 at 04:43:35PM -0600, Stephen Warren wrote:
On 10/07/2013 02:34 AM, Thierry Reding wrote:
This commit adds support for both DSI outputs found on Tegra. Only very
On Mon, Oct 14, 2013 at 12:14:47PM -0600, Stephen Warren wrote:
On 10/14/2013 08:00 AM, Thierry Reding wrote:
On Mon, Oct 14, 2013 at 08:58:34AM +0300, Terje Bergström wrote:
On 12.10.2013 01:43, Stephen Warren wrote:
On 10/07/2013 02:34 AM, Thierry Reding wrote:
The gr2d hardware in
v10:
1. Use static IO mapping in Hi3xxx.
2. Totally drop to support of Hi3716.
3. Rename smp-off property to smp-offset.
4. Remove hardcoding in hotplug driver.
v9:
1. Clean code in DTS file according to Olof's comments.
2. Since debug ll patch is going through Russell's tree, remove it
From: Zhangfei Gao zhangfei@linaro.org
Enable SMP support on hi3xxx platform
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
Tested-by: Zhang Mingjun zhang.ming...@linaro.org
Tested-by: Li Xin li@linaro.org
Signed-off-by: Haojian Zhuang haojian.zhu...@linaro.org
---
From: Zhangfei Gao zhangfei@linaro.org
Enable hotplug support on hi3xxx platform
How to test:
cat proc/interrupts
echo 0 /sys/devices/system/cpu/cpuX/online
cat proc/interrupts
echo 1 /sys/devices/system/cpu/cpuX/online
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
Tested-by: Zhang
Enable ARCH_HI3xxx in multi_v7_defconfig.
Signed-off-by: Haojian Zhuang haojian.zhu...@linaro.org
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 6e572c6..6855397 100644
This adds omap control module support for USBSS in AM437x SoC.
Update DT binding information to reflect these changes.
Signed-off-by: George Cherian george.cher...@ti.com
---
Changes from v1:
Make ON and OFF operations symmetric.
Documentation/devicetree/bindings/usb/omap-usb.txt | 2
This modifies and documents R-Car SATA device tree (DT) bindings.
The sata-SoC format is now used for the compatible property.
Also, a platform device id table is introduced for non-DT support.
The device id naming is consistent with the compatible DT
property format.
R-Car Gen2 SATA PHY support
This deprecates the rcar-sata compatibility string
and adds the sata-r8a7779 which complies to the
preferred unit-soc format for SH-Mobile devices.
The DT bindings are documented.
Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
---
Further investigation of the different Rockchip SoCs showed that
the differences especially in the pull settings are quite deep.
As further patches will show, the register layout for the pulls of
the rk3188 is quite strange. Also it is to assume, that later
Rockchip SoCs may introduce even more
A patch series, finalizing support for the pin controller in the rk3188.
As mentioned in the individual patches, the rk3188 makes it even more
complex due to its strange pull setting configuration. Therefore a bit
of reordering needed to take place to accomodate this.
Heiko Stuebner (6):
The basic of functions already provide a of_device_is_compatible to check
if a device's compatible property contains a specific one. But sometimes
it's also necessary to check if the device is compatible to one out of a
list of compatible devices.
Therefore add of_device_is_any_of that reuses the
There are Rockchip SoCs, namely the rk3188, that combine a set of
regular banks with banks that need special handling for some settings.
Therefore add the possibility for the driver to handle more than one
bank type.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
The gpio interrupt controller on Rockchip socs can do edge triggers only
for single edges but not both. Nevertheless a lot of gpio users rely on
the availability of both-edge triggered interrupts - i.e. gpio-keys.
Therefore implement a solution similar to pinctrl-coh901 re-setting the
triggering
This patchset adds clock entries to gsc power domain and gsc device
nodes to DT file
Note: This pathcset is rebased and tested on Kgene's for-next branch.
Leela Krishna Amudala (2):
ARM: dts: Exynos5420: add clock entries to gsc power domain
ARM: dts: Exynos5420: Add dt support for gscaler
Add clock nodes for oscillator clock, input clocks and parents of input
clocks to gsc power domain so that we can set/restore the input
clocks while powering on and powering off a domain.
Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
On Fri, Oct 11, 2013 at 02:45:34PM -0700, Alexandre Courbot wrote:
Trusted Foundations is a TrustZone-based secure monitor for ARM that
can be invoked using the same SMC-based API on all supported
platforms. This patch adds initial basic support for Trusted
Foundations using the ARM firmware
Hi Heiko,
On Tue, Oct 15, 2013 at 11:47:50AM +0100, Heiko Stübner wrote:
The basic of functions already provide a of_device_is_compatible to check
if a device's compatible property contains a specific one. But sometimes
it's also necessary to check if the device is compatible to one out of a
On 14 October 2013 21:31, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
On Monday, October 14, 2013 10:18:03 AM Eduardo Valentin wrote:
On 11-10-2013 11:57, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
Hi Naveen,
Hi,
On Tue, Oct 15, 2013 at 12:23:45PM +0530, George Cherian wrote:
This patch adds a compatible for AM437x ti,am43xx-usb2 to
reuse the same phy-omap-usb2 driver.
it does more than just adding a new compatible flag.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
On Tue, Oct 15, 2013 at 04:07:43PM +0530, George Cherian wrote:
This patch adds a compatible for AM437x ti,am43xx-usb2 to
reuse the same phy-omap-usb2 driver.
Also updated the documentation to add the new compatible.
Signed-off-by: George Cherian george.cher...@ti.com
I commented on
Hi,
On Mon, Oct 14, 2013 at 01:21:29PM +0300, Roger Quadros wrote:
+Vivek
On 10/14/2013 12:26 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October 2013 08:39 PM, Roger Quadros wrote:
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted dwc3 core to use
On Tue, Oct 15, 2013 at 10:57:16AM +0300, Roger Quadros wrote:
On 10/15/2013 08:31 AM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Monday 14 October 2013 03:51 PM, Roger Quadros wrote:
+Vivek
On 10/14/2013 12:26 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October
On 10/15/2013 02:57 PM, Felipe Balbi wrote:
Hi,
On Mon, Oct 14, 2013 at 01:21:29PM +0300, Roger Quadros wrote:
+Vivek
On 10/14/2013 12:26 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October 2013 08:39 PM, Roger Quadros wrote:
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay
On Tue, Oct 15, 2013 at 02:20:05PM +0400, Valentine Barshak wrote:
This modifies and documents R-Car SATA device tree (DT) bindings.
The sata-SoC format is now used for the compatible property.
Also, a platform device id table is introduced for non-DT support.
The device id naming is
On Monday 14 October 2013, dingu...@altera.com wrote:
+void socfpga_sysmgr_set_dwmmc_drvsel_smpsel(u32 drvsel, u32 smplsel)
+{
+ u32 hs_timing;
+
+ hs_timing = SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel);
+ writel(hs_timing, sys_manager_base_addr +
On Tuesday 15 October 2013, Haojian Zhuang wrote:
Add board support with device tree for Hisilicon Hi3620 SoC platform.
Changelog:
v10:
1. Add .map_io() debug_ll_io_init() back. Since debug_ll_io_init() is
only called if .map_io() isn't assigned. Use .map_io() to setup static
IO mapping
On 15 October 2013 21:00, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 15 October 2013, Haojian Zhuang wrote:
Add board support with device tree for Hisilicon Hi3620 SoC platform.
Changelog:
v10:
1. Add .map_io() debug_ll_io_init() back. Since debug_ll_io_init() is
only called if
On Fri, 11 Oct 2013 09:27:26 +0200, Marek Szyprowski m.szyprow...@samsung.com
wrote:
Hi all!
Benjamin Herrenschmidt pointed a few issues in the proposed design of
device tree bindings for contiguous memory allocator and reserved memory
regions:
https://lkml.org/lkml/2013/9/15/151
On Fri, 11 Oct 2013 13:12:54 -0500, Kumar Gala ga...@codeaurora.org wrote:
On Oct 11, 2013, at 2:48 AM, Benjamin Herrenschmidt wrote:
On Fri, 2013-10-11 at 09:27 +0200, Marek Szyprowski wrote:
Hi all!
Benjamin Herrenschmidt pointed a few issues in the proposed design of
device tree
Hi,
On Tue, Oct 15, 2013 at 12:35:12PM +0530, George Cherian wrote:
Hi Mark,
Fixed all your comments and already sent a V2.
On 10/14/2013 8:03 PM, Mark Rutland wrote:
On Mon, Oct 14, 2013 at 01:43:23PM +0100, George Cherian wrote:
This patch adds a compatible for AM437x ti,am43xx-usb2
The size of each hwid in a cpu nodes 'reg' property is defined by the
parents #address-cells property in the normal way. The cpu parsing code
has a bug where it will overrun the end of the property if
address-cells is greater than one. This commit fixes the problem by
adjusting the array size by
Several locations in the of_address and of_irq code dereference the
full_name parameter from a device_node pointer without checking if the
pointer is valid. This patch switches to use of_node_full_name() which
always checks the pointer.
Signed-off-by: Grant Likely grant.lik...@linaro.org
---
On 10/15/2013 04:19 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 03:10:42PM +0300, Roger Quadros wrote:
@@ -665,6 +669,9 @@ struct dwc3 {
struct usb_phy *usb2_phy;
struct usb_phy *usb3_phy;
+ struct phy *usb2_generic_phy;
+
Hi,
On Tue, Oct 15, 2013 at 04:48:51PM +0300, Roger Quadros wrote:
On 10/15/2013 04:19 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 03:10:42PM +0300, Roger Quadros wrote:
@@ -665,6 +669,9 @@ struct dwc3 {
struct usb_phy *usb2_phy;
struct usb_phy
On 10/15/2013 04:56 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 04:48:51PM +0300, Roger Quadros wrote:
On 10/15/2013 04:19 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 03:10:42PM +0300, Roger Quadros wrote:
@@ -665,6 +669,9 @@ struct dwc3 {
struct usb_phy
On Tue, Oct 15, 2013 at 05:03:50PM +0300, Roger Quadros wrote:
On 10/15/2013 04:56 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 04:48:51PM +0300, Roger Quadros wrote:
On 10/15/2013 04:19 PM, Felipe Balbi wrote:
Hi,
On Tue, Oct 15, 2013 at 03:10:42PM +0300, Roger Quadros
This adds Qualcomm PRNG driver device tree binding documentation
to use as an example in dts trees.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644
This adds a driver for hardware random number generator present
on Qualcomm MSM SoC's.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/char/hw_random/Kconfig | 12 +++
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/msm-rng.c | 197
This patchset introduces common infrastructure for clocks which exist in
several Tegra SoCs. We also also move Tegra20, Tegra30 and Tegra114 to
this new infrastructure.
Changes since v1:
Move some fields related to the PLL hw description to the tegra_clk_pll_params.
This allows some PLL code to be moved to common files later.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-pll.c | 138 --
As the clock IDs are now specified in a header file, we can use those
definitions instead of maintaining an internal enum.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-tegra20.c | 302 ++-
1 files changed, 142
Move tegra20 to the common periph clks.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-tegra20.c | 314 +--
1 files changed, 70 insertions(+), 244 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra20.c
Move audio clocks and PLLA initialization to a common file so it can be used by
multiple Tegra SoCs.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/Makefile |1 +
drivers/clk/tegra/clk-tegra-audio.c | 213 +++
Introduce new files for fixed and PMC clocks common between several Tegra
SoCs and move Tegra114 to this new infrastructure.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/Makefile |2 +
drivers/clk/tegra/clk-tegra-fixed.c | 113
Move tegra30 to the common tegra clks.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-tegra30.c | 843 ---
1 files changed, 159 insertions(+), 684 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra30.c
This patch makes periph_clk_enb_refcnt a global array, dynamically allocated
at boottime. It simplifies the macros somewhat and allows clocks common to
several Tegra SoCs to be defined in a separate files. Also the clks array
becomes global and dynamically allocated which allows the DT
This flag indicates the peripheral clock does not have a divider. It will
simply the initialization tables and avoids some very similar code.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-periph.c |8 +---
drivers/clk/tegra/clk.h|1 +
2
Introduce a common infrastructure for sharing clock initialization between
SoCs.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk.c |9 +
drivers/clk/tegra/clk.h |7 +++
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git
Move tegra30 to the common clkdev infrastructure. This will allow making
use of the common tegra clocks.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-tegra30.c | 393 +++
1 files changed, 232 insertions(+), 161
Introduce a common function which super clock initialization for Tegra114
and beyond.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/Makefile |1 +
drivers/clk/tegra/clk-tegra-super-gen4.c | 151 ++
This series introduces support for the Tegra124 CAR clocks.
Based on '[PATCH v3 00/12] Introduce common infra for tegra clocks'
From: Joseph Lo jose...@nvidia.com
Adding suspend/resume function for tegra_cpu_car_ops. We only save and
restore the setting of the clock of CoreSight. Other clocks still need
to be taken care by clock driver.
Cc: Mike Turquette mturque...@linaro.org
Signed-off-by: Joseph Lo jose...@nvidia.com
From: Joseph Lo jose...@nvidia.com
Hook the functions for CPU hotplug support. After the CPU is hot
unplugged, the flow controller will handle to clock gate the CPU clock.
But still need to implement an empty function to avoid warning message.
Cc: Mike Turquette mturque...@linaro.org
On 10/15/2013 02:13 AM, Thierry Reding wrote:
On Mon, Oct 14, 2013 at 12:10:21PM -0600, Stephen Warren wrote:
On 10/12/2013 05:41 AM, Thierry Reding wrote:
On Fri, Oct 11, 2013 at 04:19:19PM -0600, Stephen Warren
wrote:
On 10/07/2013 02:34 AM, Thierry Reding wrote:
From: Mikko Perttunen
Tegra124 introduces a number of new peripheral clocks. This patch adds those
to the common peripheral clock code.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk-tegra-periph.c | 55 ++
1 files changed, 55 insertions(+), 0
On 10/15/2013 02:37 AM, Thierry Reding wrote:
On Mon, Oct 14, 2013 at 12:14:47PM -0600, Stephen Warren wrote:
On 10/14/2013 08:00 AM, Thierry Reding wrote:
On Mon, Oct 14, 2013 at 08:58:34AM +0300, Terje Bergström
wrote:
On 12.10.2013 01:43, Stephen Warren wrote:
On 10/07/2013 02:34 AM,
Tegra124 has an extra bank of peripheral clock registers. Add it to the
generic peripheral clock code.
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
---
drivers/clk/tegra/clk.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/tegra/clk.c
* Tony Lindgren t...@atomide.com [131010 15:29]:
I've tested the serial, MMC, smsc911x, wl12xx, and off-idle support
with the pinctrl patches, so it probably works better than the
board-*.c files ever did. Also the board-omap3evm.c file is broken
for the DSS, and has been for a while. Patches
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
This patch determines the register bank for clock enable/disable and reset
based on the clock ID instead of hardcoding it in the tables describing the
clocks. This results in less data to be maintained in the tables, making the
code easier to
Hi Leela,
On Tuesday 15 of October 2013 16:50:54 Leela Krishna Amudala wrote:
Adds G-Scaler devices to the DT device list
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 20
1 file changed, 20 insertions(+)
diff
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
This patch makes periph_clk_enb_refcnt a global array, dynamically allocated
at boottime. It simplifies the macros somewhat and allows clocks common to
several Tegra SoCs to be defined in a separate files. Also the clks array
becomes global and
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
vco min clipping, dynamic ramp setup and IDDQ init can be done in the
respective pll clk_register functions if the parent is already registered.
This is done for other some PLLs already.
Nit: VCO and PLL should be capitalized in this commit
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
Introduce a common infrastructure for sharing clock initialization between
SoCs.
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
+struct clk ** __init tegra_lookup_dt_id(int clk_id,
+ struct
Add a driver for Arasan's SDHCI controller core.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
.../devicetree/bindings/mmc/arasan,sdhci.txt | 23 +++
MAINTAINERS| 1 +
drivers/mmc/host/Kconfig | 12 ++
Add nodes for the Arasan SDHCI controller to Zynq dts files.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
arch/arm/boot/dts/zynq-7000.dtsi | 20
arch/arm/boot/dts/zynq-zc702.dts | 4
arch/arm/boot/dts/zynq-zc706.dts | 4
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
Add a common infra for registering clkdev. This allows decoupling clk
registration from clkdev registration.
drivers/clk/tegra/clk-tegra114.c | 322
+++---
drivers/clk/tegra/clk.c |9 +
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
Move audio clocks and PLLA initialization to a common file so it can be used
by
multiple Tegra SoCs.
diff --git a/drivers/clk/tegra/clk-tegra114.c
b/drivers/clk/tegra/clk-tegra114.c
+static struct tegra_clk tegra114_clks[tegra_clk_max]
Hi Arnd,
On 10/15/13 2:01 PM, Arnd Bergmann wrote:
On Tuesday 15 October 2013, Dinh Nguyen wrote:
Hi Arnd,
On 10/15/13 7:50 AM, Arnd Bergmann wrote:
On Monday 14 October 2013, dingu...@altera.com wrote:
+void socfpga_sysmgr_set_dwmmc_drvsel_smpsel(u32 drvsel, u32 smplsel)
+{
+ u32
On Friday 11 October 2013, Linus Walleij wrote:
On Tue, Oct 1, 2013 at 3:55 PM, Daniel Mack zon...@gmail.com wrote:
This patch adds a very simple driver that enables GPIO lines as wakeup
sources. It only operates on information passed in via DT, and depends
on CONFIG_OF CONFIG_PM_SLEEP.
Felipe,
Looks like most of the patches are dependent on Generic PHY Framework except
the first one. Let me know if I have to take these patches with your ACK or
you'll take it yourself.
**
Modified dwc3 core to find PHYs only if the
Added device tree bindings for dwc3, usb2 and usb3 PHYs. The documentation
of these can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt
and Documentation/devicetree/bindings/phy/ti-phy.txt.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted
On Tuesday 15 October 2013, Dinh Nguyen wrote:
1 Create a syscon backend driver to control your system manager, which
lets other drivers hook into it without calling a private API.
Yes, if you look at drivers/mmc/host/dw_mmc-socfpga.c that is in the
mainline,
it is hooking into the
On 10/15/2013 08:52 AM, Peter De Schrijver wrote:
As the clock IDs are now specified in a header file, we can use those
definitions instead of maintaining an internal enum.
Nit: The patch subject should say clk: tegra: not clk: tegra20: so
that anyone looking at the tags in the subject has only
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3
driver in drivers/usb/phy to drivers/phy and also renamed the file to
phy-ti-pipe3 since this same driver will be used for SATA PHY and
PCIE PHY.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Now that omap-usb2 is adapted to the new generic PHY framework,
*set_suspend* ops can be removed from omap-usb2 driver.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
This patch was deferred from
There can be systems which does not have a external usb_phy, so get
usb_phy only if dt data indicates the presence of PHY in the case of dt boot or
if platform_data indicates the presence of PHY. Also remove checking if
return value is -ENXIO since it's now changed to always enable usb_phy layer.
Since now we have a separate folder for phy, move the PHY dt binding
documentation of TI to that folder.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
.../devicetree/bindings/{usb/usb-phy.txt = phy/ti-phy.txt} |9 +
1 file changed, 5 insertions(+), 4 deletions(-)
rename
On 10/15/13 2:47 PM, Arnd Bergmann wrote:
On Tuesday 15 October 2013, Dinh Nguyen wrote:
1 Create a syscon backend driver to control your system manager, which
lets other drivers hook into it without calling a private API.
Yes, if you look at drivers/mmc/host/dw_mmc-socfpga.c that is in
The Microblaze PCI code copied the PowerPC irq handling, but powerpc
needs to handle broken device trees that are not present on Microblaze.
This patch removes the powerpc special case and replaces it with a
direct of_irq_parse_and_map_pci() call.
Signed-off-by: Grant Likely
All the callers of irq_create_of_mapping() pass the contents of a struct
of_phandle_args structure to the function. Since all the callers already
have an of_phandle_args pointer, why not pass it directly to
irq_create_of_mapping()?
Signed-off-by: Grant Likely grant.lik...@linaro.org
Cc: Thomas
This patch extends the DT selftest code with some test cases for the
interrupt parsing functions.
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
arch/arm/boot/dts/testcases/tests-interrupts.dtsi | 41 ++
arch/arm/boot/dts/testcases/tests.dtsi| 1 +
struct of_irq and struct of_phandle_args are exactly the same structure.
This patch makes the kernel use of_phandle_args everywhere. This in
itself isn't a big deal, but it makes some follow-on patches simpler.
Signed-off-by: Grant Likely grant.lik...@linaro.org
Cc: Russell King
The OF irq handling code has been overloading the term 'map' to refer to
both parsing the data in the device tree and mapping it to the internal
linux irq system. This is probably because the device tree does have the
concept of an 'interrupt-map' function for translating interrupt
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