Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.
Signed-off-by: Kamil Debski k.deb...@samsung.com
Signed-off-by: Kyungmin
Hi Laurent,
On Wed, Nov 6, 2013 at 8:47 AM, Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
Hi Magnus,
(And a question for Mike below)
On Tuesday 05 November 2013 16:56:40 Magnus Damm wrote:
On Tue, Oct 29, 2013 at 11:55 PM, Laurent Pinchart wrote:
The R8A7790 has several clocks
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53
2 files changed, 88 insertions(+)
The goal of this series is to add I2C support to ST SoCs.
The DT definition is added for STiH415 and STiH416 SoCs on
B2000 and B2020 boards.
The series has been tested working on STiH416-B2020 board.
It applies on top of v3.12.
Changes since v5:
- Fix pinctrl properties description in DT
This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 53
2 files changed, 89 insertions(+)
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |9 +
arch/arm/boot/dts/stih41x-b2020.dtsi | 22 ++
2 files changed,
Hi Laurent,
On Tue, Oct 29, 2013 at 11:55 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.
Those clocks are found on Renesas ARM SoCs.
Hello Pantelis,
On 05/11/13 21:03, ext Pantelis Antoniou wrote:
On Nov 5, 2013, at 9:43 PM, Gerhard Sittig wrote:
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1641,6 +1641,7 @@ int of_attach_node(struct device_node *np)
np-allnext = of_allnodes;
np-parent-child = np;
pwmr has to be set to get the imxfb backlight work,
though pwmr was only configurable trough the platform data.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ijc+devicet...@hellion.org.uk
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer ker...@pengutronix.de
Cc:
Without that patch, a user can't select the imxfb driver when the i.MX25 and/or
the i.MX27 device tree board are selected and that no boards that selects
IMX_HAVE_PLATFORM_IMX_FB are compiled in.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ijc+devicet...@hellion.org.uk
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer ker...@pengutronix.de
Cc:
This is mostly cut and paste from the imx35 pinctrl driver.
The data was generated using sed and awk on
arch/arm/plat-mxc/include/mach/iomux-mx25.h.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren
The following devices/functionalities were added:
* Main and secondary UARTs.
* i2c and the pcf8563 device.
* CMO-QVGA(With backlight), DVI-VGA and DVI-SVGA displays
* Ethernet.
* NAND.
* The BP1 button.
* The LED.
* Watchdog
* SD.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll
Hi Pantelis,
On 05/11/13 19:41, ext Pantelis Antoniou wrote:
The following patchset introduces Device Tree overlays, a method
of dynamically altering the kernel's live Device Tree, along with
a generic interface to use it in a board agnostic manner.
I'm glad to see it again! Will test the
Hi,
First of all, good to see this patch set being submitted again!
We're using an older version of your patch set for some time and
they're working good for us.
On 05.11.2013 18:50, ext Pantelis Antoniou wrote:
Introduce helper functions for working with the live DT tree.
On Tue, Nov 5, 2013 at 1:04 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 11/04/2013 04:26 PM, Heiko Stübner wrote:
Pure Boolean values should be represented as a valueless property. If
the property is present, the value is true, otherwise false.
However, pinctrl bindings often don't
Hi Linus,
On Tue, Nov 5, 2013 at 6:09 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Sat, Nov 2, 2013 at 4:39 PM, Lad, Prabhakar
prabhakar.cse...@gmail.com wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
This patch fixes the check for the offset in
gpio_to_irq_unbanked()
Hi Ionut,
On Nov 6, 2013, at 11:21 AM, Ionut Nicu wrote:
Hi,
First of all, good to see this patch set being submitted again!
We're using an older version of your patch set for some time and
they're working good for us.
Thanks, that's good to know.
On 05.11.2013 18:50, ext Pantelis
On Wed, Nov 6, 2013 at 3:02 AM, Sherman Yin s...@broadcom.com wrote:
If I understand correctly, in Stephen's example, if a certain driver wants
to configure PINA PINB and PINC, the pin configuration nodes xxx1, xxx2,
and xxx3 will all have to be selected for the particular pin state. This
Hi,
On 05.11.2013 19:41, ext Pantelis Antoniou wrote:
Add a runtime interface to /proc to enable generic device tree overlay
usage.
Two new /proc files are added:
/proc/device-tree-overlay /proc/device-tree-overlay-status
/proc/device-tree-overlay accepts a stream of a device tree
On Wed, Nov 6, 2013 at 10:33 AM, Prabhakar Lad
prabhakar.cse...@gmail.com wrote:
On Tue, Nov 5, 2013 at 6:09 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Sat, Nov 2, 2013 at 4:39 PM, Lad, Prabhakar
prabhakar.cse...@gmail.com wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
Hi Ionut,
On Nov 6, 2013, at 11:51 AM, Ionut Nicu wrote:
Hi,
On 05.11.2013 19:41, ext Pantelis Antoniou wrote:
Add a runtime interface to /proc to enable generic device tree overlay
usage.
Two new /proc files are added:
/proc/device-tree-overlay /proc/device-tree-overlay-status
Hi!
On 06/11/13 09:49, ext Pantelis Antoniou wrote:
I'm not exactly sure, but I think it is still needed.
Since at that point the tree is attached.
Yes, now I think it's necessary. If you consider multiple detach-attach
sequences.
I only thought about first fdt unflattering, which is the case
Hi Grygorii,
On Tue, Nov 5, 2013 at 10:29 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
On 11/05/2013 10:53 AM, Prabhakar Lad wrote: Hi Grygorii,
Thanks for the review.
On Mon, Nov 4, 2013 at 11:58 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Hi Prabhakar Lad,
On
Hi Linus,
On Wed, Nov 6, 2013 at 3:26 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Nov 6, 2013 at 10:33 AM, Prabhakar Lad
prabhakar.cse...@gmail.com wrote:
On Tue, Nov 5, 2013 at 6:09 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Sat, Nov 2, 2013 at 4:39 PM, Lad,
Cc: devicetree@vger.kernel.org
Cc: Mark Brown broo...@kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
Documentation/devicetree/bindings/sound/ux500-msp.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/ux500-msp.txt
This is used for MSP (audio) devices which is about to be fully DT:ed.
Cc: devicetree@vger.kernel.org
Cc: Vinod Koul vinod.k...@intel.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
Documentation/devicetree/bindings/dma/ste-dma40.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git
Hi everyone,
I am currently trying to describe an external device within a device
tree in a Kirkwood design.
Such device is accessed through a local (parallel) bus. Since Kirkwood
does not provide such an interface, we added a custom FPGA (PCIe device)
which implements a PCIe-to-localbus
On 11/06/2013 04:51 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Tue, Nov 05, 2013 at 05:05:15PM +0800, Wei Ni wrote:
On 11/05/2013 12:18 AM, Mark Brown wrote:
We can do it as part of parsing the DT or deciding to parse the DT.
I checked the kernel codes, it seems the
On Wednesday 06 November 2013 03:45 PM, Prabhakar Lad wrote:
Hi Linus,
On Wed, Nov 6, 2013 at 3:26 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Wed, Nov 6, 2013 at 10:33 AM, Prabhakar Lad
prabhakar.cse...@gmail.com wrote:
On Tue, Nov 5, 2013 at 6:09 PM, Linus Walleij
On 11/05/2013 11:43 PM, Gerhard Sittig wrote:
On Thu, Oct 31, 2013 at 16:40 +0200, Tero Kristo wrote:
On 10/31/2013 04:03 PM, Nishanth Menon wrote:
On 10/25/2013 10:56 AM, Tero Kristo wrote:
[...]
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 7e59253..63ff78c
Hi,
From: Jingoo Han [mailto:jg1@samsung.com]
Sent: Wednesday, November 06, 2013 2:03 AM
On Wednesday, November 06, 2013 1:13 AM, Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the
generic PHY framework. The driver includes support for the Exynos
On Wed, Nov 06, 2013 at 10:16:18AM +, Lee Jones wrote:
+++ b/Documentation/devicetree/bindings/sound/ux500-msp.txt
@@ -3,6 +3,7 @@
Required properties:
- compatible :stericsson,ux500-msp-i2s
- reg : Physical base address and length of the device's
registers.
+
On Wed, Nov 06, 2013 at 06:39:03PM +0800, Wei Ni wrote:
I still can't find a good place to set full_constraints, could you
please show me some reference codes where we can set it?
The places where we unflatten the device tree for example, or start
instantiating devices from DT.
signature.asc
Hi,
On 05/11/13 14:16, Arun Kumar K wrote:
+struct is_common_reg {
+ u32 hicmd;
+ u32 hic_sensorid;
+ u32 hic_param[4];
+
+ u32 reserved1[3];
[...]
+ u32 meta_iflag;
+ u32 meta_sensor_id;
+ u32 meta_param1;
+
+ u32 reserved9[1];
+
+ u32 fcount;
On Wed, 06 Nov 2013, Mark Brown wrote:
On Wed, Nov 06, 2013 at 10:16:18AM +, Lee Jones wrote:
+++ b/Documentation/devicetree/bindings/sound/ux500-msp.txt
@@ -3,6 +3,7 @@
Required properties:
- compatible :stericsson,ux500-msp-i2s
- reg : Physical base
These patches are intended to update Davinci watchdog to use WDT core
and reuse driver for keystone arch, because Keystone uses the similar
IP like Davinci.
See Documentation:
Davinci DM646x - http://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
Keystone - http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
Since Davinci WDT has been switched to use WDT core, it became able
to support timeout-sec property, so add it to it's binding description.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
.../devicetree/bindings/watchdog/davinci-wdt.txt |5 +
1 file changed, 5 insertions(+)
When watchdog timer is expired we can know about it thought
GET_STATUS ioctl option.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
drivers/watchdog/davinci_wdt.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/watchdog/davinci_wdt.c
The keystone arch use the same IP watchdog, so add ti,keystone-wdt
compatible and correct identity.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
.../devicetree/bindings/watchdog/davinci-wdt.txt | 11 +--
drivers/watchdog/Kconfig |4 ++--
On Tue, 5 Nov 2013, Sebastian Hesselbarth wrote:
This adds an irqchip driver and corresponding devicetree binding for the
secondary interrupt controllers based on Synopsys DesignWare IP dw_apb_ictl.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Reviewed-by: Mark
Add watchdog entry to keystone device tree.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
arch/arm/boot/dts/keystone.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts
index 100bdf5..a6e5f91 100644
---
The Keystone arch is using clocks in DT and source clock for watchdog
has to be specified, so add this to binding.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
.../devicetree/bindings/watchdog/davinci-wdt.txt |5 +
1 file changed, 5 insertions(+)
diff --git
Hi Sekhar, Linus,
On 11/06/2013 12:49 PM, Sekhar Nori wrote:
On Wednesday 06 November 2013 03:45 PM, Prabhakar Lad wrote:
Hi Linus,
On Wed, Nov 6, 2013 at 3:26 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Nov 6, 2013 at 10:33 AM, Prabhakar Lad
prabhakar.cse...@gmail.com wrote:
On Wed, Nov 6, 2013 at 11:15 AM, Prabhakar Lad
prabhakar.cse...@gmail.com wrote:
On Wed, Nov 6, 2013 at 3:26 PM, Linus Walleij linus.wall...@linaro.org
wrote:
This does not apply to my gpio tree devel branch and
not even on the mainline kernel.
Looks like this needs to go via ARM tree as
Hi Kishon
On Wednesday 06 of November 2013 13:48:13 Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
On Wed, Nov 6, 2013 at 11:16 AM, Lee Jones lee.jo...@linaro.org wrote:
--- a/Documentation/devicetree/bindings/dma/ste-dma40.txt
+++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt
@@ -50,6 +50,9 @@ Each dmas request consists of 4 cells:
0x0008: Use fixed channel:
Some SoCs, like Keystone 2, can support more than one WDT and each
watchdog device has to use it's own base address, clock source,
wdd device, so add new davinci_wdt_device structure to hold device
data.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
drivers/watchdog/davinci_wdt.c |
Currently, the davinci watchdog can be read while counting,
so we can add ability to report the remaining time before
the system will reboot.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
drivers/watchdog/davinci_wdt.c | 28
1 file changed, 28
Hi Grygorii,
On Wednesday 06 November 2013 05:03 PM, Grygorii Strashko wrote:
Hi Sekhar, Linus,
On 11/06/2013 12:49 PM, Sekhar Nori wrote:
On Wednesday 06 November 2013 03:45 PM, Prabhakar Lad wrote:
Hi Linus,
On Wed, Nov 6, 2013 at 3:26 PM, Linus Walleij
linus.wall...@linaro.org wrote:
Hi Sylwester,
On Wed, Nov 6, 2013 at 4:53 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
Hi,
On 05/11/13 14:16, Arun Kumar K wrote:
+struct is_common_reg {
+ u32 hicmd;
+ u32 hic_sensorid;
+ u32 hic_param[4];
+
+ u32 reserved1[3];
[...]
+ u32 meta_iflag;
+
On 11/06/2013 12:08 PM, Prabhakar Lad wrote:
Hi Grygorii,
On Tue, Nov 5, 2013 at 10:29 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
On 11/05/2013 10:53 AM, Prabhakar Lad wrote: Hi Grygorii,
Thanks for the review.
On Mon, Nov 4, 2013 at 11:58 PM, Grygorii Strashko
On Wed, Nov 06, 2013 at 12:55:51PM +0100, Linus Walleij wrote:
On Wed, Nov 6, 2013 at 11:46 AM, Mark Brown broo...@kernel.org wrote:
On Wed, Nov 06, 2013 at 10:16:18AM +, Lee Jones wrote:
+ - id : MSP ID - used during component registration
I have no idea what this means
On Wed, 06 Nov 2013, Linus Walleij wrote:
On Wed, Nov 6, 2013 at 11:16 AM, Lee Jones lee.jo...@linaro.org wrote:
--- a/Documentation/devicetree/bindings/dma/ste-dma40.txt
+++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt
@@ -50,6 +50,9 @@ Each dmas request consists of 4 cells:
Hi Magnus,
On Wednesday 06 November 2013 17:33:39 Magnus Damm wrote:
On Tue, Oct 29, 2013 at 11:55 PM, Laurent Pinchart wrote:
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.
Those clocks are found on
On Mon, Nov 04, 2013 at 09:43:22PM +0100, Arnd Bergmann wrote:
On Monday 04 November 2013 09:37:07 Stephen Warren wrote:
The basic idea is to extend 'devres' to automatically register
all the resources (registers, irq, dma, gpio, pinctrl, clk, regulator,
...)
and simple properties
Add power off and clock driver for the ams AS3722.
The mfd patches are depends on mfd subtree which can be applied independtly.
The pacthes are created such that clock driver can go in clock tree and power
off driver in power sub tree.
Changes from V1:
- Split the DT doc and driver change in two
ams AS3722 supports the power off functionality to turn off
system.
Add power off driver for ams AS3722.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- None
drivers/power/reset/Kconfig |6 ++
drivers/power/reset/Makefile |1 +
ams AS3722 device supports the power off by turning off its all rails.
Add dt node properties to enable this functionality on this device.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- None
Documentation/devicetree/bindings/mfd/as3722.txt |9 +
1 files
Device ams AS3722 supports the one 32KHz clock output. The clock
control support is provided through clock driver.
Add clock driver as mfd sub device to probe the clock driver.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- Move the DT doc change to separate change.
Device ams AS3722 supports one clock 32KHz output. Add clock driver
to control the clock through clock framework.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- None.
drivers/clk/Kconfig |8 ++
drivers/clk/Makefile |1 +
drivers/clk/clk-as3722.c |
Add DT details for using the clocks from ams AS3722.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- This is new patch of series which was part of code change, splitting it
on different change.
Documentation/devicetree/bindings/mfd/as3722.txt |9 +
1
Hi Simon,
On Wednesday 06 November 2013 11:09:31 Simon Horman wrote:
On Tue, Oct 29, 2013 at 03:55:10PM +0100, Laurent Pinchart wrote:
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.
Those clocks are found
Hi Morimoto-san,
On Tuesday 05 November 2013 18:31:31 Kuninori Morimoto wrote:
Hi Laurent
Please correct me if my understanding was wrong.
Does your of_clk_get_parent_name() means case R8A7790_CLK_MAIN's one
?
If Yes, it is needed on parent clock side, not here ?
If No, who
On Wed, 06 Nov 2013, Laxman Dewangan wrote:
Device ams AS3722 supports the one 32KHz clock output. The clock
control support is provided through clock driver.
Add clock driver as mfd sub device to probe the clock driver.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes
Hi Magnus,
(CC'ing Grant Likely)
On Wednesday 06 November 2013 17:19:48 Magnus Damm wrote:
On Wed, Nov 6, 2013 at 8:47 AM, Laurent Pinchart wrote:
On Tuesday 05 November 2013 16:56:40 Magnus Damm wrote:
On Tue, Oct 29, 2013 at 11:55 PM, Laurent Pinchart wrote:
The R8A7790 has several
Hi Shawn,
On Mon, Oct 28, 2013 at 10:00:35AM +0100, Markus Pargmann wrote:
Hi,
v6 updates the binding documentation.
this series implements a imx27 pinctrl driver. imx1/21/27 have a register
format that is not compatible with the rest of imx series processors. The
series adds a imx1 core
Hi,
On Wednesday 06 November 2013 05:08 PM, Tomasz Figa wrote:
Hi Kishon
On Wednesday 06 of November 2013 13:48:13 Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the generic
PHY
Hi Thierry,
thanks again for your patience!
On 11/06/2013 01:23 PM, Thierry Reding wrote:
On Wed, Nov 06, 2013 at 11:27:15AM +0100, Gerlando Falauto wrote:
Hi everyone,
I am currently trying to describe an external device within a device
tree in a Kirkwood design.
Such device is accessed
Hi Simon,
On Wednesday 06 November 2013 16:18:09 Simon Horman wrote:
On Tue, Oct 29, 2013 at 03:55:11PM +0100, Laurent Pinchart wrote:
The R8A7790 has several clocks that are too custom to be supported in a
generic driver. Those clocks can be divided in two categories:
- Fixed rate
On Wednesday 06 of November 2013 18:20:36 Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 06 November 2013 05:08 PM, Tomasz Figa wrote:
Hi Kishon
On Wednesday 06 of November 2013 13:48:13 Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote:
Hi Sylwester and Arun,
On Wed, Nov 06, 2013 at 12:23:07PM +0100, Sylwester Nawrocki wrote:
Hi,
On 05/11/13 14:16, Arun Kumar K wrote:
+struct is_common_reg {
+ u32 hicmd;
+ u32 hic_sensorid;
+ u32 hic_param[4];
+
+ u32 reserved1[3];
[...]
+ u32 meta_iflag;
I just did a diff of registers in exynos 4210 and 4212 PHY drivers [1]
and couldn't find that big a difference in register layout. Of course
there are a few changes in HSIC bit fields and PHYFSEL but that's only
minimal and could well be handled in a single driver.
[1] -
Hello Bartlomiej,
My reply is very long delayed sorry.
On 17 October 2013 15:33, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
Hi Naveen,
On Thursday, October 17, 2013 08:41:13 AM Naveen Krishna Chatradhi wrote:
On Exynos5250, the FALL interrupt related en, status and clear bits
Hi David,
On Wednesday 06 of November 2013 13:03:45 David Laight wrote:
I just did a diff of registers in exynos 4210 and 4212 PHY drivers [1]
and couldn't find that big a difference in register layout. Of course
there are a few changes in HSIC bit fields and PHYFSEL but that's only
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the reg property of the node.
As per Amit's suggestion, this patch changes the
struct
On Exynos5250, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT registers and at an offset of
12 in INTCLEAR register.
On Exynos5420, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN,
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Also updated the Documentation at
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
Note: The platform data structure
On Wed, Nov 06, 2013 at 01:49:06PM +0100, Markus Pargmann wrote:
Markus Pargmann (8):
pinctrl: imx1 core driver
pinctrl: imx27: imx27 pincontrol driver
ARM: dts: imx27 pin functions
ARM: dts: imx27 pinctrl
ARM: dts: imx27 phyCARD-S pinctrl
ARM: dts: imx27 phycore move
Hi,
On Wednesday, November 06, 2013 06:47:56 PM Naveen Krishna Ch wrote:
Hello Bartlomiej,
My reply is very long delayed sorry.
On 17 October 2013 15:33, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
Hi Naveen,
On Thursday, October 17, 2013 08:41:13 AM Naveen Krishna
On Wednesday, November 06, 2013 06:58:45 PM Naveen Krishna Chatradhi wrote:
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Also updated the Documentation at
Hi,
Experimentally I have implemented of_iommu_attach() called from
drvier/core to control the order of device instanciation.
In the Tegra SMMU PATCHv3, we've discussed how to control the order of
device instanciation. Thierry/Stephen proposed to insert a hook in
driver/core to control this
On Sun 2013-10-27 22:24:43, Sebastian Reichel wrote:
From: Pali Rohár pali.ro...@gmail.com
This patch converts the rx51 ASoC module to use
snd_soc_register_card. It also adds module alias
to support driver autoloading.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
Signed-off-by:
Hi!
From: Pali Rohár pali.ro...@gmail.com
This patch adds support for the audio chip to the legacy
boardcode of the Nokia N900.
In 0/4, you said:
For example non DT boot
does not work, because I did not yet add pdata in boardcode.
So, perhaps we don't need this patch for now and can
Hi!
This patch adds support for specifying auxiliary codecs and
codec configuration via device tree phandles.
This change adds new fields to snd_soc_aux_dev and snd_soc_codec_conf
and adds support for the changes to SoC core methods.
Signed-off-by: Sebastian Reichel s...@debian.org
---
Hi!
This patch adds device tree support to the Nokia N900 audio driver.
Note, N900 audio driver.
+- compatible: nokia,rx51-audio
Still, it is rx51-audio. If it is feasible, could we move away from
rx51 naming and into n900 naming that is familiar to mere humans?
We can rename the sources
Hi,
On Tuesday 05 of November 2013 12:07:29 Brian Norris wrote:
On Mon, Oct 28, 2013 at 11:05:17AM +0800, Huang Shijie wrote:
In default way, we use the ecc_strength/ecc_step size calculated by
ourselves
and use all the OOB area.
This patch adds a new property : fsl,use-minimum-ecc
Hi Pantelis,
On 11/06/2013 01:34 AM, Pantelis Antoniou wrote:
As I mentioned earlier I'm trying to get this accepted in general term and then
we'll
get around fixing any minor problems.
I think it is quite likely at this point that your series will be accepted.
However, from my
Hi Guenter,
On Nov 6, 2013, at 4:53 PM, Guenter Roeck wrote:
Hi Pantelis,
On 11/06/2013 01:34 AM, Pantelis Antoniou wrote:
As I mentioned earlier I'm trying to get this accepted in general term and
then we'll
get around fixing any minor problems.
I think it is quite likely at
Hi!
On 05/11/13 18:57, ext Pantelis Antoniou wrote:
Dynamically inserting i2c client device nodes requires the use
of a single device registration method. Rework and export it.
Don't be put off by the weird patch format, it's a simple move
of the operations applied on each device to a
Hi!
On 05/11/13 18:50, ext Pantelis Antoniou wrote:
This patchset introduces a number of fixes that are required
for the subsequent patches that add DT overlays support.
Most of them are trivial, adding small bits that are missing,
or exporting functions that were private before.
Hi!
On 05/11/13 19:41, ext Pantelis Antoniou wrote:
Introduce support for dynamic device tree resolution.
Using it, it is possible to prepare a device tree that's
been loaded on runtime to be modified and inserted at the kernel
live tree.
Signed-off-by: Pantelis Antoniou
Hi!
On 05/11/13 19:41, ext Pantelis Antoniou wrote:
Introduce DT overlay support.
Using this functionality it is possible to dynamically overlay a part of
the kernel's tree with another tree that's been dynamically loaded.
It is also possible to remove node and properties.
Note that the
This patchset adds basic support of the Secure Digital Host Controller
Interface compliant controller found in Qualcomm MSM chipsets.
Tested with SD card on APQ8074 Dragonboard.
Patchset applies to mmc-next, as it depends on:
4525181 mmc: sdhci: add hooks for platform specific tuning
Changes
This platform driver adds the initial support of Secure
Digital Host Controller Interface compliant controller
found in Qualcomm MSM chipsets.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
drivers/mmc/host/Kconfig | 13 +
drivers/mmc/host/Makefile|1 +
This patch adds documentation for Qualcomm SDHCI MSM driver.
It contains the differences between the core properties in mmc.txt
and the properties used by the sdhci-msm driver.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
.../devicetree/bindings/mmc/sdhci-msm.txt | 92
Hello Mark A. Greer,
This is a semi-automatic email about new static checker warnings.
The patch dfd061d5a8f5: crypto: omap-sham - Add code to use
dmaengine API from Dec 21, 2012, leads to the following Smatch
complaint:
drivers/crypto/omap-sham.c:1973 omap_sham_probe()
error: we
Hi,
On 06.11.2013 16:59, Alexander Sverdlin wrote:
Hi!
On 05/11/13 19:41, ext Pantelis Antoniou wrote:
Introduce support for dynamic device tree resolution.
Using it, it is possible to prepare a device tree that's
been loaded on runtime to be modified and inserted at the kernel
live tree.
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