On Thursday 08 May 2014 19:29:37 David Miller wrote:
Why did you post this patch twice? Is there some difference between
the two versions?
No they're not. It was a mistake by me as the patch did not appear on my netdev
subscription, fooling me to send a second time. Please ignore the
Re arrange the USB dt for AM33xx to take it a bit closer
to the hardware configuration.
The USBSS is designed as follows
USB control Module 0x44e10_0620
USBSS 0x4740_
USB00x4740_1000
USB0_PHY0x4740_1300
USB0_CORE
Hi Tomasz,
On 04/26/2014 08:38 PM, Tomasz Figa wrote:
On 26.04.2014 02:51, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
Cortex-A7
dual core and includes
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without CONFIG_OF,
following the inclusion of f8f2fe7355fb PCI: rcar: Use new OF
interrupt mapping when possible:
drivers/built-in.o: In function `rcar_pci_map_irq':
:(.text+0x1cc7c): undefined
On 09/05/14 02:36, Tony Lindgren wrote:
--- /dev/null
+++ b/arch/arm/boot/dts/omap-panel-sharp-ls037v7dw01.dtsi
@@ -0,0 +1,82 @@
+/*
+ * Common file for omap dpi panels with QVGA and reset pins
+ *
+ * Note that the board specifc DTS file needs to specify
+ * at minimum the GPIO
Hi Tomasz,
On 05/09/2014 02:02 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 09.05.2014 03:06, Chanwoo Choi wrote:
On 04/26/2014 09:51 AM, Tomasz Figa wrote:
On 25.04.2014 03:16, Chanwoo Choi wrote:
[snip]
+cpus {
+#address-cells = 1;
+#size-cells = 0;
+
+cpu@0
On Fri, May 9, 2014 at 8:58 AM, Arnd Bergmann a...@arndb.de wrote:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without CONFIG_OF,
following the inclusion of f8f2fe7355fb PCI: rcar: Use new OF
interrupt mapping when possible:
The PRCM (Power/Reset/Clock Management) block exposes several subdevices
in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks)
and reset controller subdevices.
Other subdevices might be added later (if needed).
+static struct platform_driver sun6i_prcm_driver = {
+ .driver = {
+ .name = sun6i-prcm,
+ .owner = THIS_MODULE,
+ .of_match_table = sun6i_prcm_dt_ids,
+ },
+ .probe = sun6i_prcm_probe,
You need a .remove() call-back.
This driver cannot be compiled
Hi Sakari,
On 05/07/2014 09:58 AM, Sakari Ailus wrote:
Hi Jacek,
On Wed, May 07, 2014 at 09:20:17AM +0200, Jacek Anaszewski wrote:
On 05/06/2014 11:10 AM, Sakari Ailus wrote:
Hi Jacek,
On Tue, May 06, 2014 at 08:44:41AM +0200, Jacek Anaszewski wrote:
Hi Sakari,
On 05/02/2014 01:06 PM,
On 09/05/14 02:33, Tony Lindgren wrote:
We can pass the GPIO configuration for ls037v7dw01 in a standard
gpios property.
Signed-off-by: Tony Lindgren t...@atomide.com
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/sharp,ls037v7dw01.txt
@@ -0,0 +1,56 @@
+SHARP LS037V7DW01
Hi,
On 05/09/2014 09:12 AM, Lee Jones wrote:
+static struct platform_driver sun6i_prcm_driver = {
+ .driver = {
+ .name = sun6i-prcm,
+ .owner = THIS_MODULE,
+ .of_match_table = sun6i_prcm_dt_ids,
+ },
+ .probe = sun6i_prcm_probe,
You need a .remove()
On Thu, May 08, 2014 at 05:03:16PM -0600, Loc Ho wrote:
This patch fixes the MC scrub mode comparsion bug by replacing
'' with '=='. The MC structure field scrub_mode is integer
type - not bit field.
Signed-off-by: Loc Ho l...@apm.com
Applied, thanks.
--
Regards/Gruss,
Boris.
Sent
On 30/04/14 02:52, Tony Lindgren wrote:
Otherwise we can get often errors like the following and the
display won't come on:
omapdss APPLY error: FIFO UNDERFLOW on gfx, disabling the overlay
omapdss APPLY error: SYNC_LOST on channel lcd, restarting
the output with video overlays disabled
On 09.05.2014 09:10, Chanwoo Choi wrote:
Hi Tomasz,
On 05/09/2014 02:02 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 09.05.2014 03:06, Chanwoo Choi wrote:
On 04/26/2014 09:51 AM, Tomasz Figa wrote:
On 25.04.2014 03:16, Chanwoo Choi wrote:
[snip]
+cpus {
+#address-cells = 1;
+
On 09.05.2014 08:49, Chanwoo Choi wrote:
Hi Tomasz,
On 04/26/2014 08:38 PM, Tomasz Figa wrote:
On 26.04.2014 02:51, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add new exynos3250.dtsi to support Exynos3250 SoC
On 09/05/14 02:20, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140429 16:53]:
Otherwise we can get often errors like the following and the
display won't come on:
omapdss APPLY error: FIFO UNDERFLOW on gfx, disabling the overlay
omapdss APPLY error: SYNC_LOST on channel lcd,
+static struct platform_driver sun6i_prcm_driver = {
+.driver = {
+.name = sun6i-prcm,
+.owner = THIS_MODULE,
+.of_match_table = sun6i_prcm_dt_ids,
+},
+.probe = sun6i_prcm_probe,
You need a .remove()
Hi Tomasz,
On 05/09/2014 05:01 PM, Tomasz Figa wrote:
On 09.05.2014 08:49, Chanwoo Choi wrote:
Hi Tomasz,
On 04/26/2014 08:38 PM, Tomasz Figa wrote:
On 26.04.2014 02:51, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This
Hi Vivek,
On 05.05.2014 07:02, Vivek Gautam wrote:
From: Kamil Debski k.deb...@samsung.com
Add the phy provider, supplied by new Exynos-usb2phy using
Generic phy framework.
Keeping the support for older USB phy intact right now, in order
to prevent any functionality break in absence of
Hi Vivek,
On 05.05.2014 07:02, Vivek Gautam wrote:
Add support to consume phy provided by Generic phy framework.
Keeping the support for older usb-phy intact right now, in order
to prevent any functionality break in absence of relevant
device tree side change for ohci-exynos.
Once we move to
On 09/05/2014 10:18, Hans de Goede wrote:
Hi,
On 05/09/2014 10:08 AM, Lee Jones wrote:
+static struct platform_driver sun6i_prcm_driver = {
+ .driver = {
+ .name = sun6i-prcm,
+ .owner = THIS_MODULE,
+ .of_match_table = sun6i_prcm_dt_ids,
+
Am Freitag, den 09.05.2014, 08:58 +0200 schrieb Arnd Bergmann:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without CONFIG_OF,
following the inclusion of f8f2fe7355fb PCI: rcar: Use new OF
interrupt mapping when possible:
On 09/05/14 02:33, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140507 11:00]:
* Tomi Valkeinen tomi.valkei...@ti.com [140507 09:03]:
On 07/05/14 18:03, Tony Lindgren wrote:
BTW, I'm also personally fine with all five gpios showing in a single
gpios property, I'm not too exited
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
index 270ab97..2bbf886 100644
---
On Friday 09 May 2014 10:28:39 Lucas Stach wrote:
Am Freitag, den 09.05.2014, 08:58 +0200 schrieb Arnd Bergmann:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without CONFIG_OF,
following the inclusion of f8f2fe7355fb PCI: rcar: Use
Am Freitag, den 09.05.2014, 10:45 +0200 schrieb Arnd Bergmann:
On Friday 09 May 2014 10:28:39 Lucas Stach wrote:
Am Freitag, den 09.05.2014, 08:58 +0200 schrieb Arnd Bergmann:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without
On 09/05/2014 10:43, Hans de Goede wrote:
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
Hi Arnd,
On Fri, May 9, 2014 at 10:45 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 09 May 2014 10:28:39 Lucas Stach wrote:
Am Freitag, den 09.05.2014, 08:58 +0200 schrieb Arnd Bergmann:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build
+static struct platform_driver sun6i_prcm_driver = {
+ .driver = {
+ .name = sun6i-prcm,
+ .owner = THIS_MODULE,
+ .of_match_table = sun6i_prcm_dt_ids,
+ },
+ .probe = sun6i_prcm_probe,
You need a .remove() call-back.
This driver
Hi,
On 05/09/2014 10:55 AM, Boris BREZILLON wrote:
On 09/05/2014 10:43, Hans de Goede wrote:
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git
Hi Arnd,
On Fri, May 9, 2014 at 11:03 AM, Arnd Bergmann a...@arndb.de wrote:
The pci-rcar driver is enabled for compile tests, and this has
now shown that the driver cannot build without CONFIG_OF,
following the inclusion of f8f2fe7355fb PCI: rcar: Use new OF
interrupt mapping when possible:
On Mon, May 5, 2014 at 1:57 PM, Heiko Stübner he...@sntech.de wrote:
Initially due to lack of documentation and (personal) understanding
I assumed that the area holding the iomux settings would be separate
from everything else, while in fact the grf registers contain not only
pinctrl stuff
On 05/05/14 21:41, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140429 16:53]:
Hi all,
Here are few patches to add devicetree support for panel ls037v7dw01
that's found on many omap3 boards. They seem to be often mis-configured
as various panel dpi entries, but really should be
On 08/05/14 23:16, Marek Belisko wrote:
This 3 patches adding display support for openmoko gta04 device.
First patch add DT bindings for topolly td028 panel. Second add description
for
dss + panel and third fix panel probing when panel is compiled as module.
Changes from v2:
- add missing
On Fri, May 09, 2014 at 01:48:38AM +0100, Sebastian Capella wrote:
Quoting Lorenzo Pieralisi (2014-05-06 11:04:42)
diff --git a/drivers/cpuidle/cpuidle-arm64.c
b/drivers/cpuidle/cpuidle-arm64.c
new file mode 100644
index 000..fef1fad
--- /dev/null
+++
+ writel(value, base + offset);
+}
+
+static int dra7xx_pcie_link_up(struct pcie_port *pp)
+{
+ struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+ u32 reg = dra7xx_pcie_readl(dra7xx-base, PCIECTRL_DRA7XX_CONF_PHY_CS);
+
+ if (reg LINK_UP)
+ return true;
+
On Fri, May 09, 2014 at 12:12:19AM +0100, Sebastian Capella wrote:
Quoting Lorenzo Pieralisi (2014-05-06 11:04:40)
diff --git a/drivers/cpuidle/of_idle_states.c
b/drivers/cpuidle/of_idle_states.c
new file mode 100644
index 000..360b7ad
--- /dev/null
+++
[CCing DT maintainers]
On 08.05.2014 11:03, Vivek Gautam wrote:
On Thu, May 8, 2014 at 11:35 AM, Vivek Gautam gautam.vi...@samsung.com
wrote:
Hi Sylwester,
On Tue, May 6, 2014 at 7:57 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 28/04/14 08:17, Vivek Gautam wrote:
Add a new
On 08/05/14 22:33, Jason Gunthorpe wrote:
On Thu, May 08, 2014 at 06:37:49PM +0200, Sylwester Nawrocki wrote:
This patch adds a helper function to unregister devices which
were created by an of_platform_populate() call. The pattern
used here can already be found in multiple drivers. This
On 30/04/2014 21:07, Mike Turquette :
Quoting Nicolas Ferre (2014-04-30 11:12:51)
On 22/04/2014 06:12, Boris BREZILLON :
Hello,
This series introduce the real clock model (as described in atmel
datasheets)
for slow and main clocks.
The modifications introduced by this series break the DT
From: Rahul Sharma rahul.sha...@samsung.com
Enable fimd node for snow board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
From: Rahul Sharma rahul.sha...@samsung.com
Add nodes for fimd and dp controller for exynos5250 based snow
and exynos5420 based peach-pit board.
This series is based on Kukjin Kims, for-next branch.
V3:
1) Dropped 1 patch ARM: dts: move dp hpd line to the board file for
exynos5420.
2) Extra
From: Rahul Sharma rahul.sha...@samsung.com
Enable fimd for peach-pit board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420-peach-pit.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
From: Rahul Sharma rahul.sha...@samsung.com
Enable dp-controller for snow board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5250-snow.dts | 29 +
1 file changed, 29 insertions(+)
diff --git
From: Rahul Sharma rahul.sha...@samsung.com
Enable dp-controller for peach-pit board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 36
1 file changed, 36 insertions(+)
diff --git
Hi Vivek,
On 08/05/14 11:03, Vivek Gautam wrote:
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index b422e38..51efe4c 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++
+ Jingoo Han.
On 9 May 2014 15:39, Rahul Sharma rahul.sha...@samsung.com wrote:
From: Rahul Sharma rahul.sha...@samsung.com
Add nodes for fimd and dp controller for exynos5250 based snow
and exynos5420 based peach-pit board.
This series is based on Kukjin Kims, for-next branch.
V3:
1)
On Mon, May 05, 2014 at 05:14:44PM +0200, Arnd Bergmann wrote:
On Friday 02 May 2014 18:43:01 Dave Martin wrote:
On Fri, May 02, 2014 at 05:19:44PM +0200, Arnd Bergmann wrote:
On Friday 02 May 2014 15:23:29 Thierry Reding wrote:
To some degree this also depends on how we want to handle
On Friday 09 May 2014, Linus Walleij wrote:
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts
b/arch/arm/boot/dts/arm-realview-pb1176.dts
new file mode 100644
index ..0eea0f4a7b39
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-pb1176.dts
Can you split this up into an
On Fri, May 02, 2014 at 09:02:20PM +0200, Arnd Bergmann wrote:
On Friday 02 May 2014 12:55:45 Stephen Warren wrote:
On 05/02/2014 09:19 AM, Arnd Bergmann wrote:
On Friday 02 May 2014 15:23:29 Thierry Reding wrote:
...
To some degree this also depends on how we want to handle IOMMUs. If
Hello,
On 2014-05-09 00:23, Rob Herring wrote:
From: Rob Herring r...@kernel.org
All the parameters for RESERVEDMEM_OF_DECLARE function callbacks are
members of struct reserved_mem, so just pass the struct ptr to callback
functions so the function callback is more in line with other OF match
On Wed, Apr 30, 2014 at 10:01 AM, Toby Smith t...@tismith.id.au wrote:
The irq handler should return IRQ_NONE or IRQ_HANDLED to report
if we have handled the interrupt.
Signed-off-by: Toby Smith t...@tismith.id.au
Patch applied.
Adding some randon pca953x developers to the thread so noone
On Wed, Apr 30, 2014 at 10:01 AM, Toby Smith t...@tismith.id.au wrote:
Request a shared interrupt when requesting a pca953x GPIO interrupt
Signed-off-by: Toby Smith t...@tismith.id.au
Patch applied.
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line unsubscribe devicetree
AM43xx phy mode selection is similar to AM33xx platform, so adding only
the compatibility string to the driver
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
Documentation/devicetree/bindings/net/cpsw-phy-sel.txt | 1 +
drivers/net/ethernet/ti/cpsw-phy-sel.c | 4
2
Adding DRA7xx platform support to cpsw-phy-sel driver to select phy mode in
control driver and fixing the uninitialized dev by initializing to platform
device structure pointer.
Mugunthan V N (2):
drivers: net: cpsw-phy-sel: add dra7xx support for phy sel
drivers: net: cpsw-phy-sel: add
Add dra7xx support for selecting the phy mode which is present in control
module of dra7xx SoC
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
.../devicetree/bindings/net/cpsw-phy-sel.txt | 3 +-
drivers/net/ethernet/ti/cpsw-phy-sel.c | 57 +-
2 files
Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +
1 file changed, 21
Hello,
This patch series adds support for some functions provided by the PRCM
(Power/Reset/Clock Management) unit:
- AR100, AHB0 and APB0 clocks
- APB0 reset controller
These functions are needed to get the P2WI driver working, but more
subdevices might be added later.
Best Regards,
Boris
Hi Arnd,
On Wednesday 07 May 2014 03:00 PM, Arnd Bergmann wrote:
On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
+static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
+{
+struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+
+dra7xx_pcie_writel(dra7xx-base,
Hi,
On Thursday 08 May 2014 02:48 PM, Arnd Bergmann wrote:
On Thursday 08 May 2014 18:05:11 Jingoo Han wrote:
On Tuesday, May 06, 2014 10:59 PM, Arnd Bergmann wrote:
On Tuesday 06 May 2014 19:03:52 Kishon Vijay Abraham I wrote:
In DRA7, the cpu sees 32bit address, but the pcie controller can
On Fri, May 09, 2014 at 12:12:19AM +0100, Sebastian Capella wrote:
Quoting Lorenzo Pieralisi (2014-05-06 11:04:40)
diff --git a/drivers/cpuidle/of_idle_states.c
b/drivers/cpuidle/of_idle_states.c
new file mode 100644
index 000..360b7ad
--- /dev/null
+++
Adds support for google peach-pi board having the
Exynos5800 SoC.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
Changes from v1
- Updated memory node with a safe size of 2GB
---
Most of the nodes of exynos5420 remains same for exynos5800.
So the exynos5420.dtsi is included in exynos5800 and the changed
node properties will be overriden.
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Acked-by: Olof Johansson o...@lixom.net
---
Exynos5800 is a derivative of Exynos5420 with higher
clock speeds and most other IP blocks remaining the same
except for a few.
This patchset is based on Kukjin's for-next branch
and Tomasz's samsung-next branch containing Shaik's clock
cleanup series for 5420.
Changes from v1
--
-
From: Alim Akhtar alim.akh...@samsung.com
Exynos5800 clock structure is mostly similar to 5420 with only
a small delta changes. So the 5420 clock file is re-used for
5800 also. The common clocks for both are seggreagated and few
clocks which are different for both are separately initialized.
Add binding documentation for HDMI connector's HPD GPIO.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
Cc: devicetree@vger.kernel.org
---
Documentation/devicetree/bindings/video/hdmi-connector.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Hi,
On 05/09/2014 11:32 AM, Boris BREZILLON wrote:
On 09/05/2014 11:05, Hans de Goede wrote:
Hi,
On 05/09/2014 10:55 AM, Boris BREZILLON wrote:
On 09/05/2014 10:43, Hans de Goede wrote:
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 8
Hi,
On Thu, 2014-04-24 at 13:18 -0500, Josh Cartwright wrote:
On Wed, Apr 23, 2014 at 04:36:22PM -0700, Courtney Cavin wrote:
On Wed, Apr 23, 2014 at 11:46:26PM +0200, Josh Cartwright wrote:
On Tue, Apr 22, 2014 at 05:31:49PM -0700, Courtney Cavin wrote:
[..]
snip
$ git grep
On Fri 09 May 2014 12:56:23 AM CDT, Matt Ranostay wrote:
Add missing i2c2 bus define to access various cape and
prototype/breakout board devices.
Signed-off-by: Matt Ranostay mranos...@gmail.com
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 16
1 file changed, 16
The MUX/GATE register for XCLKOUT doesn't resides within PMU domain,
this can be accessed through a regmap provided by syscon driver. Adding
another clock provider to handle regmap based handing of XCLKOUT.
Dependency:
1. [PATCH v3] mfd: syscon: Support early initialization
XCLKOUT in Exynos5420/Exynos5250 is controlled through a register in
PMU domain. Pass pmu-syscon handle to the clock driver so that XCLKOUT
can be properly configured.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi
A new clock provider has been added to configure the XCLKOUT debug
clock. Added a minimal implemetation for Exynos5420 clock driver.
Right now, only one valid parent clock from XCLKOUT is defined
in existing clock driver. The driver will be updated later for other
for other parent clocks.
A new clock provider has been added to configure the XCLKOUT debug
clock. Added a minimal implemetation for Exynos5420 clock driver.
Right now, only one valid parent clock from XCLKOUT is defined
in existing clock driver. The driver will be updated later for other
for other parent clocks.
All SoC in Exynos-series have a clock with name XCLKOUT to provide
debug information about various clocks available in the SoC. The register
controlling the MUX and GATE of this clock is provided within PMU domain.
Since PMU domain can't be dedicatedly mapped by every driver, the register
needs to
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: devicetree@vger.kernel.org
Cc: linux...@vger.kernel.org
Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
---
arch/arm/boot/dts/ste-dbx5x0.dtsi |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi
Initial support for power domains for ux500. To enable this feature we require
to use DT, thus we need to add bindings for the ux500 specific parts as well.
The implementation of the ux500 power domains is based upon the generic power
domain.
An important note, this patchset depends on Tomasz
Initial support for power domains for ux500. To enable this feature we
require to use DT, thus we need to add bindings for the ux500 specific
parts as well.
The implementation of the ux500 power domains is based upon the generic
power domain.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc:
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: devicetree@vger.kernel.org
Cc: linux...@vger.kernel.org
Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
---
arch/arm/boot/dts/ste-dbx5x0.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi
Add required device node for ehci and ohci controllers to
enable USB 2.0 support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v1:
- Removed 'phy-names' property from the 'port'.
- Added node references for the nodes.
arch/arm/boot/dts/exynos5420.dtsi | 30
Add required device node for usb2phy to let enable USB 2.0
support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v1:
- Added node references for the phy node.
arch/arm/boot/dts/exynos5420.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
This patch adds sysreg-syscon node to exynos5250 and exynos5420 device
tree, to access System Register's registers using syscon driver.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[gautam.vi...@samsung.com: Split this syreg-syscon dts entry from
dts: Add usb2phy to Exynos 5250 patch]
Based on 'for-next' branch of Kgene's linux-samsung tree.
These patches are as per discussions on the driver side patches
which have already been acked. [1]
Changes from v1:
- Rebase on 'for-next' branch.
- Removed 'phy-names' property as per discuusion in the driver patches. [1]
V1 of this
From: Kamil Debski k.deb...@samsung.com
Add support to PHY of USB2 of the Exynos 5250 SoC.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[gautam.vi...@samsung.com: Split the usb phy entries from
syscon entries from earlier patch: dts: Add usb2phy to Exynos 5250]
[gautam.vi...@samsung.com:
On Fri, May 02, 2014 at 10:36:43PM +0200, Arnd Bergmann wrote:
On Friday 02 May 2014 18:31:20 Dave Martin wrote:
No, but I didn't state it very clearly.
In this:
parent {
child {
ranges = ... ;
dma-ranges =
On Friday 09 May 2014 04:33 PM, Mugunthan V N wrote:
Adding DRA7xx platform support to cpsw-phy-sel driver to select phy mode in
control driver and fixing the uninitialized dev by initializing to platform
device structure pointer.
Mugunthan V N (2):
drivers: net: cpsw-phy-sel: add dra7xx
priv-dev is uninitialized, initializing with pdev-dev
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
drivers/net/ethernet/ti/cpsw-phy-sel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/ti/cpsw-phy-sel.c
b/drivers/net/ethernet/ti/cpsw-phy-sel.c
index
Adding DRA7xx and AM43xx platform support to cpsw-phy-sel driver to select
phy mode in control driver and fixing the uninitialized dev by initializing
to platform device structure pointer.
Changes from Initial version
* Added back the missing patch (1/3)
Mugunthan V N (3):
drivers: net:
Add dra7xx support for selecting the phy mode which is present in control
module of dra7xx SoC
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
.../devicetree/bindings/net/cpsw-phy-sel.txt | 3 +-
drivers/net/ethernet/ti/cpsw-phy-sel.c | 57 +-
2 files
AM43xx phy mode selection is similar to AM33xx platform, so adding only
the compatibility string to the driver
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
Documentation/devicetree/bindings/net/cpsw-phy-sel.txt | 1 +
drivers/net/ethernet/ti/cpsw-phy-sel.c | 4
2
On 05/09/14 13:49, Tomasz Figa wrote:
Hi Kukjin,
Hi Tomasz,
On 09.05.2014 04:14, Kukjin Kim wrote:
Tomasz Figa wrote:
Hi Sachin,
On 08.05.2014 06:16, Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the
The PRCM (Power/Reset/Clock Management) block exposes several subdevices
in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks)
and reset controller subdevices.
Other subdevices might be added later (if needed).
Signed-off-by:
On Thu, May 08, 2014 at 03:37:19PM -0500, Thor Thayer wrote:
Yes. Their reasoning is that they want to retain the rights and
warranty language with the file (just in case the COPYING file
changes).
Ok, thanks for checking up on this.
Yes. I tested using edac_core.edac_mc_panic_on_ue=1 from
On Fri, May 9, 2014 at 4:21 PM, Vivek Gautam gautam.vi...@samsung.com wrote:
Hi Sylwester,
On Fri, May 9, 2014 at 3:43 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
Hi Vivek,
On 08/05/14 11:03, Vivek Gautam wrote:
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The new driver uses the generic PHY framework and will interact
with DWC3 controller present on Exynos5 series of SoCs.
Also, created a new header file in linux/mfd/syscon/ for
Exynos5 SoCs and put the required PMU offset definitions
Adding support to enable/disable VBUS controlled by a
regulator, to enable vbus supply on the port.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v7:
- Rebased on top of [PATCH v8 1/2] phy: Add new Exynos5 USB 3.0 PHY driver.
drivers/phy/phy-exynos5-usbdrd.c | 32
On 09/05/2014 15:52, Lee Jones wrote:
The PRCM (Power/Reset/Clock Management) block exposes several subdevices
in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks)
and reset controller subdevices.
Other subdevices might be added
On Fri, May 02, 2014 at 12:17:50PM -0600, Jason Gunthorpe wrote:
On Fri, May 02, 2014 at 06:31:20PM +0100, Dave Martin wrote:
Note that there is no cycle through the reg property on iommu:
reg indicates a sink for transactions; slaves indicates a
source of transactions, and ranges
Hello Thierry,
I noticed you're describing each new panel with a new entry in the
of_platform_match table and a new compatible string.
I guess you have a good reason to do it this way, because retrieving
panel description from DT would be pretty easy (see this series ;-)).
Could tell me why you
Currently, the only way to add new panel descriptions to the simple panel
driver is to add new entries in the platform_of_match table.
Add support for panel description retrieval from the DT.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/gpu/drm/panel/Kconfig
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