Hi Jon,
On 18 June 2014 08:24, Jon Loeliger j...@jdl.com wrote:
Never mind, found the reference, and the # flag's behaviour is there.
Applied.
Geeze. You guys generated patches, discussed, and
applied them before I even woke up and read them! :-)
Yes that was a bit quicker than my last
The imx6sx iomuxc-gpr syscon is compatible to imx6q, so let's add
compatible string 'fsl,imx6q-iomuxc-gpr' for imx6sx iomuxc-gpr syscon node.
This is necessary to enable SW workaround for ERR007265,
please refer to imx6_pm_common_init of arch/arm/mach-imx/pm-imx6.c
for detail.
Signed-off-by:
On 06/21/2014 02:02 AM, Doug Anderson wrote:
Tushar,
On Fri, Jun 20, 2014 at 1:03 AM, Tushar Behera tusha...@samsung.com wrote:
From: Wonjoon Lee woojoo@samsung.com
The MAX98091 CODEC is the same as MAX98090 CODEC, but with an extra
microphone. Existing driver for MAX98090 CODEC
On Saturday 21 June 2014 08:03 AM, Jason Cooper wrote:
Sricharan,
Your subject line seems truncated:
irqchip: crossbar: introduce ti,irqs-skip to skip
maybe ... Introduce DT property to skip hardwired irqs ?
Also note that you need to correct the subject line for *every* patch in
Hi Jason,
On Saturday 21 June 2014 08:27 AM, Jason Cooper wrote:
On Mon, Jun 16, 2014 at 04:53:16PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
On 06/22/2014 11:49 PM, Andreas Färber wrote:
It's 1.6 GHz for the Cortex-A15.
Avoids warnings like /cpus/cpu@0 missing clock-frequency property.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5410.dtsi | 4
1 file changed, 4 insertions(+)
diff --git
On Mon, 23 Jun 2014, Andreas Färber wrote:
It's LDO2, not LD02.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt | 2 +-
2 files changed, 2
On Mon, 23 Jun 2014, Andreas Färber wrote:
It's 1, not 1.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
diff --git
Hi Rob,
Am Dienstag, den 17.06.2014, 11:57 -0500 schrieb Rob Herring:
On Tue, May 27, 2014 at 8:55 AM, Philipp Zabel p.za...@pengutronix.de wrote:
For devices which have a complete register for themselves, it is possible to
place them next to the syscon device with overlapping reg ranges.
Philippe Reynes schrieb:
This driver add partial support of the
maxim 1027/1029/1031. Differential mode is not
supported.
It was tested on armadeus apf27 board.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Reviewed-by: Hartmut Knaack knaac...@gmx.de
---
Not sure if it's too late,
Hello Mark,
On 06/21/2014 10:40 PM, Mark Brown wrote:
On Tue, Jun 17, 2014 at 06:05:29PM +0200, Javier Martinez Canillas wrote:
On 06/17/2014 04:12 PM, Mark Brown wrote:
I just looked at regulator_register() and saw that it does
rdev-dev.parent =
dev, so yes this has to be the MFD.
On Wed, Jun 18, 2014 at 5:22 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
This series adds basic sound support for the Odroid X2/U3 boards.
It relies on specific Exynos Audio Subsystem clock parent and
frequencies being pre-configured.
My full testing git branch has been pushed to:
-Original Message-
From: Beniamino Galvani [mailto:b.galv...@gmail.com]
Sent: Sunday, June 22, 2014 11:32 PM
To: Liam Girdwood; Mark Brown
Cc: Yang, Wenyou; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
Kumar Gala; Heiko Stuebner; devicetree@vger.kernel.org; linux-
-Original Message-
From: Beniamino Galvani [mailto:b.galv...@gmail.com]
Sent: Sunday, June 22, 2014 11:32 PM
To: Liam Girdwood; Mark Brown
Cc: Yang, Wenyou; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
Kumar Gala; Heiko Stuebner; devicetree@vger.kernel.org; linux-
-Original Message-
From: Beniamino Galvani [mailto:b.galv...@gmail.com]
Sent: Sunday, June 22, 2014 11:32 PM
To: Liam Girdwood; Mark Brown
Cc: Yang, Wenyou; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
Kumar Gala; Heiko Stuebner; devicetree@vger.kernel.org; linux-
On Mon, Jun 23, 2014 at 11:28:25AM +0200, Javier Martinez Canillas wrote:
On 06/21/2014 10:40 PM, Mark Brown wrote:
That's not really relevant here - I'm asking if the regulators get their
own supplies rather than if anything uses them.
Sorry if I keep misunderstanding your question but
This patch adds an function to restart the port dma engine.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
---
drivers/ata/ahci.h| 1 +
drivers/ata/libahci.c | 12
2 files changed, 13 insertions(+)
diff --git a/drivers/ata/ahci.h
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
---
Suman Tripathi (2):
libahci: Implement the function ahci_restart_engine to restart the
port dma engine.
ata: Fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode
command.
This patch fixes the dma state machine lockup due to the processing
of IDENTIFY DEVICE PIO mode command. The X-Gene AHCI controller
has an errata in which it cannot clear the BSY bit after
receiving the PIO setup FIS and results the dma state machine to go
into the CMFatalErrorUpdate state
This patch fixes the watermark threshold of the receive FIFO for the
APM X-Gene SATA host controller driver.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
---
drivers/ata/ahci_xgene.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
This patch fixes the SATA PHY clock DTS node csr-mask of the SATA
Host controller 1. This patch also fixes the status of the PHY
clock node of SATA Host controller 1.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
---
arch/arm64/boot/dts/apm-storm.dtsi | 4
This patch fixes the link down issue by retry for the APM X-Gene SoC
SATA host controller driver. Due to board design issue and short margin
limitation, it is observed that once out of many thousands power cycle
test, the sata link may not link up.
Signed-off-by: Loc Ho l...@apm.com
This patch set contains a couple of fixes related to APM X-Gene SATA
controller driver.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
---
Suman Tripathi (3):
ata: Fix the watermark threshold for the APM X-Gene SATA host
controller driver.
ata: Fix the
Hi,
Shawn Guo wrote:
On Thu, Jun 12, 2014 at 03:09:44PM +0200, Lothar Waßmann wrote:
Add support for Ka-Ro electronics i.MX51 based TX51 modules
Signed-off-by: Lothar Waßmann l...@karo-electronics.de
---
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/imx51-tx51.dts |
This patchset adds support for the Everest Semi ES8328 audio codec. It also
adds support for using the es8328 on IMX boards.
We write a machine driver rather than using simple-card because the machine
driver needs to support regulators for the speaker amps and as well as
supporting headphone
Add a codec driver for the Everest ES8328. It supports two separate audio
outputs and two separate audio inputs.
Signed-off-by: Sean Cross x...@kosagi.com
---
Documentation/devicetree/bindings/sound/es8328.txt | 38 ++
sound/soc/codecs/Kconfig | 13 +
Everest Semiconductor makes audio codecs.
Signed-off-by: Sean Cross x...@kosagi.com
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
This adds an initial machine driver for the ES8328 audio codec on Freescale
boards. The driver supports headphones and an audio regulator for an onboard
speaker amp.
Signed-off-by: Sean Cross x...@kosagi.com
---
.../devicetree/bindings/sound/imx-audio-es8328.txt | 61 ++
On 06/04/2014 06:30 PM, Peter Griffin wrote:
This patch enables SDHCI STI platform driver.
Signed-off-by: Peter Griffin peter.grif...@linaro.org ---
arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1
insertion(+)
Acked-by: Maxime Coquelin maxime.coque...@st.com
diff --git
2014-06-20 12:51 GMT+02:00 Mark Rutland mark.rutl...@arm.com:
On Fri, Jun 20, 2014 at 11:44:49AM +0100, Heiko Stübner wrote:
The armv7-timer on Rockchip RK3288 SoCs needs an underlying timer to run.
Therefore the special rockchip,rk3288-armv7-timer does this setup and
then initializes the
On 06/04/2014 06:30 PM, Peter Griffin wrote:
Signed-off-by: Peter Griffin peter.grif...@linaro.org
Acked-by: Maxime Coquelin maxime.coque...@st.com
--- MAINTAINERS | 1 + 1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS index 6dc67b1..19dc265
100644 --- a/MAINTAINERS
Hello.
On 06/23/2014 02:15 PM, Suman Tripathi wrote:
This patch fixes the SATA PHY clock DTS node csr-mask of the SATA
Host controller 1. This patch also fixes the status of the PHY
clock node of SATA Host controller 1.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi
Hi,
On 17/06/14 18:21, Pawel Moll wrote:
This patch adds basic DT bindings for the PL11x CLCD cells
and make their fbdev driver use them.
Signed-off-by: Pawel Moll pawel.m...@arm.com
---
Changes since v6:
- replaced in-node device-timing subnode with the standard
video interface
On Sat, Jun 21, 2014 at 4:10 AM, Jason Cooper ja...@lakedaemon.net wrote:
On Fri, May 30, 2014 at 11:41:51AM +0200, Linus Walleij wrote:
On Fri, May 30, 2014 at 12:40 AM, Rob Herring robherri...@gmail.com wrote:
Linus, This could use testing again on Versatile.
OK I should probably test on
MMC capability for HS200 is parsed in mmc/core/host.c as
dts string mmc-hs200-1_8v.
This patch corrects the dts string for Exynos5420 based peach-pit
and Exynos5800 based peach-pi boards.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Naveen Krishna Chatradhi wrote:
MMC capability for HS200 is parsed in mmc/core/host.c as
dts string mmc-hs200-1_8v.
This patch corrects the dts string for Exynos5420 based peach-pit
and Exynos5800 based peach-pi boards.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
On 21/06/2014 01:57, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:33:06PM -0500, Rob Herring wrote:
On Fri, Jun 20, 2014 at 1:52 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Thu, Jun 19, 2014 at 06:40:43PM +0200, Gregory CLEMENT wrote:
For the Armada 380 and Armada 385 SoCs, the common
Add the transmit level, boost and attenuation parameters necessary for
the eSATA interface on Cubox-i to work.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/boot/dts/imx6q-cubox-i.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git
Spread-spectrum doesn't work with Cubox-i hardware. eSATA devices are
detected, but then fail on normal IO. Therefore, disable this feature.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/boot/dts/imx6q-cubox-i.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
On June 23, 2014 10:08:15 AM GMT+01:00, Hartmut Knaack knaac...@gmx.de wrote:
Philippe Reynes schrieb:
This driver add partial support of the
maxim 1027/1029/1031. Differential mode is not
supported.
It was tested on armadeus apf27 board.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Sebastian,
On Tue, Jun 17, 2014 at 08:17:02PM +0200, Sebastian Hesselbarth wrote:
On 06/16/2014 12:26 PM, Antoine Ténart wrote:
+
+#define PHY_BASE 0x200
Antoine,
I gave your Berlin AHCI patches a try on BG2. I finally got it working
but BG2 has a different PHY_BASE and need
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate
On Sat, Jun 21, 2014 at 05:04:05PM +0600, Alexander Bersenev wrote:
This patch adds records for two IR controllers on A20
Signed-off-by: Alexander Bersenev b...@hackerdom.ru
Signed-off-by: Alexsey Shestacov wingr...@linux-sunxi.org
Applied, thanks.
Maxime
--
Maxime Ripard, Free Electrons
On Sunday 22 June 2014 21:27:52 Noralf Trønnes wrote:
Den 22.06.2014 20:18, skrev Arnd Bergmann:
On Sunday 22 June 2014 19:37:56 Noralf Trønnes wrote:
I see two possibilities:
* add a special marker value to separate the registers, as I do now
* add a flag to indicate a register number.
This series adds the support for Berlin SoC AHCI controller. The
controller allows to use the SATA host interface and, for example, the
eSATA port on the BG2Q.
The series adds a PHY driver to control the two SATA ports available,
and adds a generic compatible to use the existing ahci_platform
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
.../devicetree/bindings/phy/berlin-sata-phy.txt | 16
1 file changed, 16 insertions(+)
create mode
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8
On Mon, 2014-06-23 at 14:04 +0300, Tomi Valkeinen wrote:
I can queue this to fbdev tree, but how do you want to handle the second
patch? I think these two patches are independent, so the second patch
could go via arm-soc tree (or whichever is the normal route for those
.dts file changes). I'd
The current implementation of the libahci does not allow to use multiple
PHYs. This patch adds the support of multiple PHYs by the libahci while
keeping the old bindings valid for device tree compatibility.
This introduce a new way of defining SATA ports in the device tree, with
one port per
Hi Ajay, Inki,
I tested this series for Exynos5420 based peach-pit board,
Exynos5800 based Peach-pi board and Exynos5250 based
Snow board. I verified with the chrome test environment and
able to see upto Login Screen. DPMS on/off functionality and
S2R is also working fine for Display. therefore:
On Fri, 2014-06-20 at 23:27 +0100, Peter Maydell wrote:
On 17 June 2014 16:21, Pawel Moll pawel.m...@arm.com wrote:
This patch adds basic DT bindings for the PL11x CLCD cells
and make their fbdev driver use them.
+* ARM PrimeCell Color LCD Controller PL110/PL111
+
+See also
On Mon, Jun 23, 2014 at 02:52:15PM +0100, Pawel Moll wrote:
On Fri, 2014-06-20 at 23:27 +0100, Peter Maydell wrote:
How does this work for boards like the versatilepb which have a
mux between a PL110 and the TFT, allowing it to efffectively
rewire the pads at runtime under control of the
On Fri, 2014-06-20 at 18:09 +0100, Mark Rutland wrote:
+- clocks-names: should contain clcdclk and apb_pclk
s/clocks-names/clock-names/
Haha - it took quite a few patch revisions to spot this one, thanks!
+
+- clocks: contains phandle and clock specifier pairs for the entries
+ in
Wildcards in compatible strings should be avoid. marvell,armada38x
was recently introduced but was not yet used.
The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch replaces the use of
marvell,armada38x by the marvell,armada380 string.
On Mon, 2014-06-23 at 15:10 +0100, Russell King - ARM Linux wrote:
As far as the CLD outputs are concerned, they are standard. The PLD on
their outputs routes the CLD bits to the 8-bit red, green and blue
channels according to the configuration of SYS_CLCD to achieve the
various colour
Hi Rahul,
On 23.06.2014 15:58, Rahul Sharma wrote:
Hi Ajay, Inki,
I tested this series for Exynos5420 based peach-pit board,
Exynos5800 based Peach-pi board and Exynos5250 based
Snow board. I verified with the chrome test environment and
able to see upto Login Screen. DPMS on/off
... for V2M-P1 motherboard CLCD (limited to 640x480 16bpp and using
dedicated video RAM bank) and for V2P-CA9 (up to 1024x768 16bpp).
Signed-off-by: Pawel Moll pawel.m...@arm.com
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 34 -
This patch adds basic DT bindings for the PL11x CLCD cells
and make their fbdev driver use them.
Signed-off-by: Pawel Moll pawel.m...@arm.com
---
Changes since v7:
- fixed typo in clock-names documentation
- renamed arm,pl11x,framebuffer-base into arm,pl11x,framebuffer
as it is describing both
On Thu, 19 Jun 2014 10:26:15 -0500, Nathan Fontenot nf...@austin.ibm.com
wrote:
On 06/18/2014 03:07 PM, Grant Likely wrote:
Hi Nathan and Tyrel,
I'm looking into lifecycle issues on nodes modified by OF_DYNAMIC, and
I'm hoping you can help me. Right now, pseries seems to be the only
On Thu, 19 Jun 2014 11:33:20 +0300, Pantelis Antoniou
pantelis.anton...@konsulko.com wrote:
Hi Grant,
CCing Thomas Gleixner Steven Rostedt, since they might have a few
ideas...
On Jun 18, 2014, at 11:07 PM, Grant Likely wrote:
Hi Nathan and Tyrel,
I'm looking into lifecycle
On 23/06/2014 15:07, Jason Cooper wrote:
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the generic irq map function in order to provide irq_domain ops with
On Mon, Jun 23, 2014 at 04:16:51PM +0200, Gregory CLEMENT wrote:
Wildcards in compatible strings should be avoid. marvell,armada38x
was recently introduced but was not yet used.
The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch
Hi Grant,
On Jun 23, 2014, at 5:58 PM, Grant Likely wrote:
On Thu, 19 Jun 2014 11:33:20 +0300, Pantelis Antoniou
pantelis.anton...@konsulko.com wrote:
Hi Grant,
CCing Thomas Gleixner Steven Rostedt, since they might have a few
ideas...
On Jun 18, 2014, at 11:07 PM, Grant Likely
Hello Ajay,
Not an extensive review since I'm not familiar with the graphics stack
but a few things I noticed are commented below.
On Wed, Jun 11, 2014 at 8:27 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
This patch adds a simple driver to handle all the LCD and LED
powerup/down routines
On Mon, Jun 23, 2014 at 9:13 AM, Pawel Moll pawel.m...@arm.com wrote:
On Fri, 2014-06-20 at 18:09 +0100, Mark Rutland wrote:
+- clocks-names: should contain clcdclk and apb_pclk
s/clocks-names/clock-names/
Haha - it took quite a few patch revisions to spot this one, thanks!
Was this
On Mon, 2014-06-23 at 16:43 +0100, Rob Herring wrote:
On Mon, Jun 23, 2014 at 9:13 AM, Pawel Moll pawel.m...@arm.com wrote:
On Fri, 2014-06-20 at 18:09 +0100, Mark Rutland wrote:
+- clocks-names: should contain clcdclk and apb_pclk
s/clocks-names/clock-names/
Haha - it took quite a
Hello Ajay,
On Wed, Jun 11, 2014 at 8:27 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
From: Vincent Palatin vpala...@chromium.org
This patch adds drm_bridge driver for parade DisplayPort
to LVDS bridge chip.
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Andrew
Hello,
On Fri, Jun 20, 2014 at 5:51 PM, Inki Dae inki@samsung.com wrote:
2014-06-20 17:06 GMT+09:00 Ajay kumar ajayn...@gmail.com:
ping.
I will have a review soon but I'm afraid that I cannot have a test yet
because I have no any board with panel based on eDP and LVDS so wait
for until
On 23/06/14 11:40, Daniel Drake wrote:
I tested ODROID-U2's 3.5mm analog headphone jack output with:
# speaker-test -c 2 -t wav -l 2
On my x86 laptop this command takes ~6 seconds and produces audible output:
Front left, front right, front left, front right
When those words are
On 23/06/14 18:32, Sylwester Nawrocki wrote:
On 23/06/14 11:40, Daniel Drake wrote:
I tested ODROID-U2's 3.5mm analog headphone jack output with:
# speaker-test -c 2 -t wav -l 2
On my x86 laptop this command takes ~6 seconds and produces audible output:
Front left, front right,
Hello Pantelis!
On 22/06/14 11:40, ext Pantelis Antoniou wrote:
Introduce helper functions for working with the live DT tree,
all of them related to dynamically adding/removing nodes and
properties.
__of_copy_property() copies a property dynamically
__of_create_empty_node() creates an
Hi
2014-06-11 20:27 GMT+02:00 Ajay Kumar ajaykumar...@samsung.com:
This patch adds a simple driver to handle all the LCD and LED
powerup/down routines needed to support eDP/LVDS panels.
The LCD and LED units are usually powered up via regulators,
and almost on all boards, we will have a
Hi Grant,
The Integrators are not booting after commit
07e461cd7e73a84f0e3757932b93cc80976fd749
of: Ensure unique names without sacrificing determinism
i.e. these device trees:
arch/arm/boot/dts/integratorap.dts
arch/arm/boot/dts/integratorcp.dts
It hangs very early boot at one time with the
Andreas,
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber afaer...@suse.de wrote:
It's vsys-l{1,2}-supply, not vsys_l{1,2}-supply.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/regulator/tps65090.txt | 4 ++--
1 file changed, 2 insertions(+), 2
On Mon, Jun 23, 2014 at 05:07:47PM +0200, Boris BREZILLON wrote:
On 23/06/2014 15:07, Jason Cooper wrote:
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the
On Mon, Jun 23, 2014 at 10:59 AM, Pawel Moll pawel.m...@arm.com wrote:
On Mon, 2014-06-23 at 16:43 +0100, Rob Herring wrote:
On Mon, Jun 23, 2014 at 9:13 AM, Pawel Moll pawel.m...@arm.com wrote:
On Fri, 2014-06-20 at 18:09 +0100, Mark Rutland wrote:
+- max-memory-bandwidth: maximum
Hi,
here's v3 of am437x sk support. Patches tested on top of next-20140617.
Note that this series was tested with the following extra patches:
http://marc.info/?l=linux-omapm=140299431732700w=2
http://marc.info/?l=linux-omapm=140300146503126w=2
http://marc.info/?l=linux-omapm=140299231232123
by providing phandles to rtc, wdt, cpu and dispc nodes,
boards can access them to add board-specific data.
Signed-off-by: Felipe Balbi ba...@ti.com
---
Changes since v1:
- added phandles to cpu and dispc
arch/arm/boot/dts/am4372.dtsi | 8
1 file changed, 4 insertions(+), 4
Hello,
On Mon, Jun 23, 2014 at 03:45:37PM +0530, Suman Tripathi wrote:
@@ -234,15 +237,20 @@ static int xgene_ahci_do_hardreset(struct ata_link
*link,
u8 *d2h_fis = pp-rx_fis + RX_FIS_D2H_REG;
void __iomem *port_mmio = ahci_port_base(ap);
struct ata_taskfile tf;
+ int
On Fri, Jun 20, 2014 at 10:52:50PM +0800, Chen-Yu Tsai wrote:
The Allwinner A23 is a dual-core Cortex-A7-based SoC. It re-uses most of
the IPs found in previous SoCs, notably the A31.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
On Fri, Jun 20, 2014 at 10:52:51PM +0800, Chen-Yu Tsai wrote:
sun6i/sun8i have a UART in the RTC block group, which can be used
as an early console. This is most useful on sun8i as UART0 is muxed
with MMC0, which is not available if we boot from MMC.
Signed-off-by: Chen-Yu Tsai w...@csie.org
On Fri, Jun 20, 2014 at 10:52:52PM +0800, Chen-Yu Tsai wrote:
The Allwinner A23 is a tablet oriented SoC with 2 Cortex-A7 cores
and a Mali-400MP2 GPU.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android
On Fri, Jun 20, 2014 at 10:52:53PM +0800, Chen-Yu Tsai wrote:
The Ippo-q8h is a tablet circuit board commonly found in cheap Android
tablets with A23 SoCs. There are at least 2 versions of the board, with
different peripherals, such as WiFi chips.
Common features among these tablets include
On Sun, 2014-06-22 at 19:31 -0500, Vince Bridgers wrote:
This patch series updates the the socfpga_defconfig with a number of options,
and updates the socfpga device tree with a field required for the reset
controller driver.
Vince Bridgers (2):
ARM: socfpga: Update socfpga_defconfig
Hi Thor,
On Fri, 2014-06-20 at 18:22 -0500, Thor Thayer wrote:
From: Thor Thayer ttha...@altera.com
Addition of the driver to support the Altera SDRAM Controller.
This patch adds support for the CycloneV and ArriaV SDRAM controllers.
Correction and reporting of SBEs, Panic on DBEs.
v2:
Andreas,
Thanks for posting! A first pass on this is below...
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber afaer...@suse.de wrote:
Adds initial support for the HP Chromebook 11.
Cc: Vincent Palatin vpala...@chromium.org
Cc: Doug Anderson diand...@chromium.org
Cc: Stephan van Schaik
On 06/23/2014 12:13 PM, Pantelis Antoniou wrote:
Hi Ioan,
I'm going to let Grant answer that but the code in question doesn't look right.
On Jun 23, 2014, at 9:33 PM, Ioan Nicu wrote:
Hi Pantelis,
On Mon, Jun 23, 2014 at 07:57:24PM +0300, ext Pantelis Antoniou wrote:
Hi Alexander,
On Jun
On 23/06/2014 19:50, Jason Cooper wrote:
On Mon, Jun 23, 2014 at 05:07:47PM +0200, Boris BREZILLON wrote:
On 23/06/2014 15:07, Jason Cooper wrote:
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM
Commit eeb845459a72e792a959278b858f9c417e9995bd
(ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id)
added phy-connection-type properties to ethernet PHY nodes.
Actually, the property has to be set for the ethernet port node instead.
Fix it by moving the corresponding properties to
On Mon, 23 Jun 2014 18:26:04 +0300, Pantelis Antoniou
pantelis.anton...@konsulko.com wrote:
On Jun 23, 2014, at 5:58 PM, Grant Likely wrote:
We'll also need a transition plan to move to RCU. I think the existing
iterators can be modified to do the rcu locking in-line, but still require
the
On Mon, Jun 23, 2014 at 01:08:24PM -0700, Александр Берсенев wrote:
Thanks,
Should I send applied patches in the further versions of this patch set?
No, you don't have to.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hm, are you sure about that? I thought only PCI devices should have
it...
Yes, pretty sure it's needed in both the host controller and the
devices.
I don't understand the case of the PCI devices, honestly.
Shouldn't the device_type prop reflect the device's functionality
This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi,
including:
* The keyboard
* The i2c tunnel
* The tps65090 under the i2c tunnel
* The battery under the i2c tunnel
To add extra motivation, it should be noted that tps65090 is one of
the things needed to get display-related FETs
On Mon, Jun 23, 2014 at 10:25:15PM +0200, Sebastian Hesselbarth wrote:
Commit eeb845459a72e792a959278b858f9c417e9995bd
(ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id)
added phy-connection-type properties to ethernet PHY nodes.
Actually, the property has to be set for the
On Mon, Jun 23, 2014 at 04:16:51PM +0200, Gregory CLEMENT wrote:
Wildcards in compatible strings should be avoid. marvell,armada38x
was recently introduced but was not yet used.
The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch
On 23/06/2014 19:50, Jason Cooper wrote:
...
I won't have a chance to dig deeper into this until tonight or the next
few days. But my primary concern is that they chose to export the
struct for a reason. I'd like to dig through the history and find out
why.
Ok, I took a look. It seems
Thomas,
Would you mind Acking this and letting me know how you'd like me to
handle it? It's a build requirement for the rest of the series, but
it's in core code.
I can do a separate topic branch for you or just merge it in with
irqchip/core. Whichever is easiest for you.
On Fri, Jun 20, 2014
This patch adds support for the Cirrus Logic CS4265 Stereo I2C CODEC.
Changes for v2:
* Change DT reset pin name to reset-gpios
* Removed SPD/IF DAI
* Add select REGMAP_I2C to Kconfig
* Change ENUM_SINGLE to SOC_ENUM_SINGLE_DECL
* Remove include/sound/cs4265.h file
* Change GPIO operation to use
Hi Doug,
Am 23.06.2014 21:47, schrieb Doug Anderson:
Thanks for posting! A first pass on this is below...
Thanks a lot for your quick review! My first big .dts patch, and no
datasheets for the hardware at hand as a user.
A first pass of replies to my defense. ;)
On Sun, Jun 22, 2014 at 6:21
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