Exynos5420 based Peach PIT board has 4 NTC thermistors to measure
temperatures at various points on the board.
IIO based ADC becomes the parent and NTC thermistors are the childs,
via the HWMON interface.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Doug Anderson
As Murata is the manufacturer of the NTC (Negative Temperature coefficient)
based Thermistors. ntc_thermistor driver extensively used the prefix ntc.
But, vendor-prefix should be murata instead of ntc.
This patchset
1. Updates the vendor-prefix, DT bindings and Documentation,
where ever
As Murata Manufactures the NTC based thermistors. The vendor
name in the compatibility is preposed to change to murata
This patch uses the new compatibility string in exynos4412 based
Trats2 board.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Chanwoo Choi
Add Murata Manufacturing Co., Ltd. to the list of device tree
vendor prefixes.
Murata manufactures NTC (Negative Temperature Coefficient) based
Thermistors for small scale applications like Mobiles and PDAs.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Acked-by: Mark Rutland
Murata Manufacturing Co., Ltd is the vendor for
NTC (Negative Temperature coefficient) based Thermistors.
But, the driver extensively uses NTC as the vendor name.
This patch corrects the vendor name also updates the
compatibility strings according to the vendor-prefix.txt
Note: Drivers continue
On 06/25/2014 03:29 PM, Naveen Krishna Chatradhi wrote:
As Murata Manufactures the NTC based thermistors. The vendor
name in the compatibility is preposed to change to murata
This patch uses the new compatibility string in exynos4412 based
Trats2 board.
Signed-off-by: Naveen Krishna
On Mon, Jun 23, 2014 at 12:18:39PM +0200, Lothar Waßmann wrote:
...
+ phy-handle = phy0;
+ mac-address = []; /* will be set by U-Boot */
Shouldn't it be local-mac-address?
probably yes, but both 'mac-address' and 'local-mac-address' are being
set up by U-Boot anyway.
On Wed, Jun 25, 2014 at 02:48:43PM +0800, Shawn Guo wrote:
On Mon, Jun 23, 2014 at 12:18:39PM +0200, Lothar Waßmann wrote:
...
+ phy-handle = phy0;
+ mac-address = []; /* will be set by U-Boot */
Shouldn't it be local-mac-address?
probably yes, but
On Mon, Jun 23, 2014 at 02:04:01PM +0800, Anson Huang wrote:
The imx6sx iomuxc-gpr syscon is compatible to imx6q, so let's add
compatible string 'fsl,imx6q-iomuxc-gpr' for imx6sx iomuxc-gpr syscon node.
This is necessary to enable SW workaround for ERR007265,
please refer to
Hello Naveen,
On Wed, Jun 25, 2014 at 7:04 AM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
Doug,
On 25 June 2014 03:24, Doug Anderson diand...@chromium.org wrote:
Naveen,
On Tue, Jun 24, 2014 at 5:19 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Exynos5420 based Peach
On Tuesday 24 June 2014 20:47:58 Suman Anna wrote:
+static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller
*controller,
+ const struct of_phandle_args *sp)
+{
+ phandle phandle = sp-args[0];
+ struct device_node *node;
+
On Tue, 24 Jun 2014 10:10:01 +0200, Alexander Sverdlin
alexander.sverd...@nsn.com wrote:
Hi Pantelis, Grant,
On 23/06/14 20:33, Ioan Nicu wrote:
On 22/06/14 11:40, ext Pantelis Antoniou wrote:
Introduce helper functions for working with the live DT tree,
all of them related to
v2:
Suggested by Mark
Remove hisilicon,reg-init and init the register in phy-hix5hd2-sata.c
Change property name accordingly.
Jiancheng Xue (2):
Documentation: Document Hisilicon hix5hd2 sata PHY
phy: add hix5hd2-sata-phy driver
.../devicetree/bindings/phy/hix5hd2-sata-phy.txt | 22 +++
From: Jiancheng Xue xuejianch...@huawei.com
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue xuejianch...@huawei.com
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
---
.../devicetree/bindings/phy/hix5hd2-sata-phy.txt | 22
From: Jiancheng Xue xuejianch...@huawei.com
Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue xuejianch...@huawei.com
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
---
drivers/phy/Kconfig|8 ++
drivers/phy/Makefile |1 +
On Tue, Jun 24, 2014 at 07:20:56PM +0100, Arnd Bergmann wrote:
On Tuesday 24 June 2014 19:11:50 Will Deacon wrote:
On Tue, Jun 24, 2014 at 06:57:44PM +0100, Olav Haugan wrote:
We do describe the masked StreamID (SID) but we need to specify the mask
that the SMMU should apply to the
On Tue, Jun 24, 2014 at 10:35:54PM +0100, Olav Haugan wrote:
On 6/24/2014 11:11 AM, Will Deacon wrote:
On Tue, Jun 24, 2014 at 06:57:44PM +0100, Olav Haugan wrote:
On 6/24/2014 2:18 AM, Will Deacon wrote:
On Sat, Jun 21, 2014 at 12:16:25AM +0100, Olav Haugan wrote:
We have multiple-master
Hello,
Please fix the subject: this is a _binding_, not a driver.
On Tue, Jun 24, 2014 at 08:18:50AM +0100, Daniel Jeong wrote:
This commit is about tps611xx device tree documentation.
Signed-off-by: Daniel Jeong gshark.je...@gmail.com
---
.../video/backlight/tps611xx-backlight.txt
On Wed, Jun 25, 2014 at 10:27:50AM +0100, Arnd Bergmann wrote:
On Wednesday 25 June 2014 10:17:02 Will Deacon wrote:
On Tue, Jun 24, 2014 at 07:20:56PM +0100, Arnd Bergmann wrote:
On Tuesday 24 June 2014 19:11:50 Will Deacon wrote:
On Tue, Jun 24, 2014 at 06:57:44PM +0100, Olav Haugan
On 06/24/2014 05:06 PM, Russell King - ARM Linux wrote:
It would be better if you separate the
binding documentation updates from the other functional changes too.
Fixed.
Denis.
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On Wednesday 25 June 2014 10:38:25 Will Deacon wrote:
On Wed, Jun 25, 2014 at 10:27:50AM +0100, Arnd Bergmann wrote:
On Wednesday 25 June 2014 10:17:02 Will Deacon wrote:
On Tue, Jun 24, 2014 at 07:20:56PM +0100, Arnd Bergmann wrote:
On Tuesday 24 June 2014 19:11:50 Will Deacon wrote:
This patch updates hs-200 device tree property from
caps2-mmc-hs200-1.8v to mmc-hs200-1.8v for peach-pit
and peach-pi boards.
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
arch/arm/boot/dts/exynos5420-peach-pit.dts |2 +-
arch/arm/boot/dts/exynos5800-peach-pi.dts |2 +-
2
On Wed, Jun 25, 2014 at 10:48:31AM +0100, Arnd Bergmann wrote:
On Wednesday 25 June 2014 10:38:25 Will Deacon wrote:
On Wed, Jun 25, 2014 at 10:27:50AM +0100, Arnd Bergmann wrote:
I think the situation is a bit different here: It's less about the corner
cases for the SMMU, but about the
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
From: Doug Anderson diand...@chromium.org
The max77686 includes an RTC that keeps power during suspend. It's
convenient to be able to use it as a wakeup source.
Signed-off-by: Doug Anderson diand...@chromium.org
---
On Tuesday 24 June 2014 18:52:52 Noralf Tronnes wrote:
Den 23.06.2014 15:38, skrev Arnd Bergmann:
On Sunday 22 June 2014 21:27:52 Noralf Trønnes wrote:
Den 22.06.2014 20:18, skrev Arnd Bergmann:
On Sunday 22 June 2014 19:37:56 Noralf Trønnes wrote:
Or should each register have it's own
On Wednesday 25 June 2014 10:57:36 Will Deacon wrote:
So far, I've been avoiding the hardcoding. However, you could potentially
build a system with a small number of SMRs (compared to the number of
StreamIDs) and allocate the StreamIDs in such a way that I think the dynamic
configuration would
On Wed, Jun 25, 2014 at 11:12:13AM +0100, Arnd Bergmann wrote:
On Wednesday 25 June 2014 10:57:36 Will Deacon wrote:
So far, I've been avoiding the hardcoding. However, you could potentially
build a system with a small number of SMRs (compared to the number of
StreamIDs) and allocate the
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be to be shared between the
clk-max77686 clock driver and DeviceTree source files.
Signed-off-by: Javier Martinez Canillas
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
Like most clock drivers, the Maxim 77686 PMIC clock binding
follows the convention that the #clock-cells property is
used to specify the number of cells in a clock provider.
But the binding document is not clear enough that
Yuvaraj Kumar C D wrote:
+ Doug
Hi,
This patch updates hs-200 device tree property from
caps2-mmc-hs200-1.8v to mmc-hs200-1.8v for peach-pit
and peach-pi boards.
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Already I've queued same patch into my local but waiting for
On Sat, Jun 21, 2014 at 11:21:47PM +0100, Robert Jarzmik wrote:
Add device-tree support to pxa_camera host driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/media/platform/soc_camera/pxa_camera.c | 77
+-
1 file changed, 75 insertions(+), 2
On Sat, Jun 21, 2014 at 11:21:46PM +0100, Robert Jarzmik wrote:
Add device-tree bindings documentation for pxa_camera driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
.../devicetree/bindings/media/pxa-camera.txt | 39
++
1 file changed, 39
Hello Krzysztof,
On 06/25/2014 12:05 PM, Krzysztof Kozlowski wrote:
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
From: Doug Anderson diand...@chromium.org
The max77686 includes an RTC that keeps power during suspend. It's
convenient to be able to use it as a wakeup
On Sun, Jun 22, 2014 at 10:04:58AM +0100, Robert Jarzmik wrote:
Add documentation for device-tree binding of arm PXA 27x udc (usb
device) driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Cc: devicetree@vger.kernel.org
---
Since V1: change OF id mrvl,pxa27x_udc -
Hello Naveen,
On Wed, Jun 25, 2014 at 8:29 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Murata Manufacturing Co., Ltd is the vendor for
NTC (Negative Temperature coefficient) based Thermistors.
But, the driver extensively uses NTC as the vendor name.
This patch corrects the
Hello Naveen,
On Wed, Jun 25, 2014 at 8:29 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Exynos5420 based Peach PIT board has 4 NTC thermistors to measure
temperatures at various points on the board.
IIO based ADC becomes the parent and NTC thermistors are the childs,
via the
All the Cortex-{A7,A15} implementations are using a GICv2. Same for
the current arm64 platforms.
Turns out that most of these platforms have described their GIC CPU
interface size as being 4kB. while it is actually 8kB (the GICC_DIR
register lives at offset 0x1000).
This was found when
On Sun, Jun 22, 2014 at 10:04:57AM +0100, Robert Jarzmik wrote:
Add support for device-tree device discovery. If devicetree is not
provided, fallback to legacy platform data discovery.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Cc: devicetree@vger.kernel.org
---
Since V1:
Hello Javier,
On 25 June 2014 16:06, Javier Martinez Canillas jav...@dowhile0.org wrote:
Hello Naveen,
On Wed, Jun 25, 2014 at 8:29 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Murata Manufacturing Co., Ltd is the vendor for
NTC (Negative Temperature coefficient) based
On Mon, Jun 23, 2014 at 06:27:04PM +0100, Doug Anderson wrote:
Andreas,
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber afaer...@suse.de wrote:
It's vsys-l{1,2}-supply, not vsys_l{1,2}-supply.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Introduce a device tree binding document for the MPC512x DMA controller
Signed-off-by: Alexander Popov a13xp0p0...@gmail.com
---
.../devicetree/bindings/dma/mpc512x-dma.txt| 29 ++
1 file changed, 29 insertions(+)
create mode 100644
This patch adds a new common OF dma xlate callback function which will match a
channel by it's id. The binding expects one integer argument which it will use
to
lookup the channel by the id.
Unlike of_dma_simple_xlate this function is able to handle a system with
multiple DMA controllers. When
Register the controller for device tree based lookup of DMA channels
(non-fatal for backwards compatibility with older device trees) and
provide the '#dma-cells' property in the shared mpc5121.dtsi file
Signed-off-by: Alexander Popov a13xp0p0...@gmail.com
---
arch/powerpc/boot/dts/mpc5121.dtsi |
This patch series introduces a device tree binding document for
the MPC512x DMA controller and adds device tree based DMA channel lookup
for it.
This version contains the improved device tree binding document:
#dma-cells is made a required property, as it must be according
dma/dma.txt document.
Naveen Krishna Chatradhi wrote:
+ Jean Delvare, Guenter Roeck
I'm adding maintainers for drivers/hwmon/ntc* but I'm not sure.
Hi,
This series looks good to me. I will take 3/4 and 4/4 for exynos DT changes once
hwmon/ntc maintainer pick the others.
Thanks,
Kukjin
As Murata is the
On Mon, Jun 23, 2014 at 11:35:42AM +0100, Sean Cross wrote:
This adds an initial machine driver for the ES8328 audio codec on Freescale
boards. The driver supports headphones and an audio regulator for an onboard
speaker amp.
Signed-off-by: Sean Cross x...@kosagi.com
---
On Wed, Jun 25, 2014 at 02:40:16AM +0100, Felipe Balbi wrote:
Hi,
On Tue, Jun 24, 2014 at 04:11:48PM -0500, Rob Herring wrote:
On Mon, Jun 23, 2014 at 1:20 PM, Felipe Balbi ba...@ti.com wrote:
by providing phandles to rtc, wdt, cpu and dispc nodes,
boards can access them to add
On Wed, Jun 25, 2014 at 11:37:54AM +0100, Marc Zyngier wrote:
All the Cortex-{A7,A15} implementations are using a GICv2. Same for
the current arm64 platforms.
Turns out that most of these platforms have described their GIC CPU
interface size as being 4kB. while it is actually 8kB (the
Doug Anderson wrote:
Hi,
Hi,
On Mon, Jun 23, 2014 at 4:36 AM, Kukjin Kim kgene@samsung.com wrote:
Naveen Krishna Chatradhi wrote:
MMC capability for HS200 is parsed in mmc/core/host.c as
dts string mmc-hs200-1_8v.
This patch corrects the dts string for Exynos5420 based
Hi Kukjin,
Please take this fix in your tree.
Regards,
Rahul Sharma
On 19 June 2014 11:35, Sachin Kamat sachin.ka...@samsung.com wrote:
On Thu, Jun 19, 2014 at 11:17 AM, Rahul Sharma rahul.sha...@samsung.com
wrote:
Change bit from 2 to 9 for tv (mixer) sysmmu clock.
Signed-off-by: Rahul
Hi Rahul,
On 25.06.2014 13:22, Rahul Sharma wrote:
Hi Kukjin,
Please take this fix in your tree.
This is a patch for Samsung clock drivers, so I'll apply it when about
to send fixes pull request to Mike.
Best regards,
Tomasz
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Tomasz Figa wrote:
Hi Rahul,
On 25.06.2014 13:22, Rahul Sharma wrote:
Hi Kukjin,
Please take this fix in your tree.
This is a patch for Samsung clock drivers, so I'll apply it when about
to send fixes pull request to Mike.
Yes, I also checked the datasheet and this change is
Doug Anderson wrote:
Mark or Kukjin,
Hi,
On Thu, Jun 12, 2014 at 8:59 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Since, (3146bee spi: s3c64xx: Added provision for dedicated cs pin)
spi-s3c64xx.c driver expects
1. chip select gpios from cs-gpio(singular) under the
On 10.06.2014 17:39, Tomasz Figa wrote:
Hi,
On 26.05.2014 13:56, Shaik Ameer Basha wrote:
From: Arun Kumar K arun...@samsung.com
Adds IDs for MUX clocks to be used by power domain for MFC
for doing re-parenting while pd on/off.
Signed-off-by: Arun Kumar K arun...@samsung.com
Am 25.06.2014 12:47, schrieb Mark Rutland:
On Mon, Jun 23, 2014 at 06:27:04PM +0100, Doug Anderson wrote:
Andreas,
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber afaer...@suse.de wrote:
It's vsys-l{1,2}-supply, not vsys_l{1,2}-supply.
Signed-off-by: Andreas Färber afaer...@suse.de
---
On Wednesday 25 June 2014, Zhangfei Gao wrote:
From: Jiancheng Xue xuejianch...@huawei.com
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue xuejianch...@huawei.com
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
We have had a couple
On Wed, Jun 25, 2014 at 5:37 AM, Marc Zyngier marc.zyng...@arm.com wrote:
All the Cortex-{A7,A15} implementations are using a GICv2. Same for
the current arm64 platforms.
Turns out that most of these platforms have described their GIC CPU
interface size as being 4kB. while it is actually 8kB
On Wed, Jun 25, 2014 at 6:43 AM, Andreas Färber afaer...@suse.de wrote:
Am 25.06.2014 12:47, schrieb Mark Rutland:
On Mon, Jun 23, 2014 at 06:27:04PM +0100, Doug Anderson wrote:
Andreas,
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber afaer...@suse.de wrote:
It's vsys-l{1,2}-supply, not
On Wed, Jun 25 2014 at 01:21:17 PM, Rob Herring robherri...@gmail.com wrote:
On Wed, Jun 25, 2014 at 5:37 AM, Marc Zyngier marc.zyng...@arm.com wrote:
All the Cortex-{A7,A15} implementations are using a GICv2. Same for
the current arm64 platforms.
Turns out that most of these platforms have
On 06/25/2014 08:16 PM, Arnd Bergmann wrote:
On Wednesday 25 June 2014, Zhangfei Gao wrote:
From: Jiancheng Xue xuejianch...@huawei.com
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue xuejianch...@huawei.com
Signed-off-by: Zhangfei Gao
Facilitate getting required 3.3V and 1.0V VDD supply for
EHCI controller on Exynos.
With the patches for regulators' nodes merged in 3.15:
c8c253f ARM: dts: Add regulator entries to smdk5420
275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
the exynos systems turn on only minimal number of
Facilitate getting required 3.3V and 1.0V VDD supply for
OHCI controller on Exynos.
With patches for regulators' nodes merged in 3.15:
c8c253f ARM: dts: Add regulator entries to smdk5420
275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
the exynos systems turn on only minimal number of
Sure Tomasz, Kukjin.
Thanks for the update.
Regards.
On 25 June 2014 16:56, Kukjin Kim kgene@samsung.com wrote:
Tomasz Figa wrote:
Hi Rahul,
On 25.06.2014 13:22, Rahul Sharma wrote:
Hi Kukjin,
Please take this fix in your tree.
This is a patch for Samsung clock drivers, so I'll
On Wednesday 25 June 2014 20:41:26 zhangfei wrote:
On 06/25/2014 08:16 PM, Arnd Bergmann wrote:
On Wednesday 25 June 2014, Zhangfei Gao wrote:
From: Jiancheng Xue xuejianch...@huawei.com
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng
On Wed, Jun 25, 2014 at 11:37:54AM +0100, Marc Zyngier wrote:
All the Cortex-{A7,A15} implementations are using a GICv2. Same for
the current arm64 platforms.
Turns out that most of these platforms have described their GIC CPU
interface size as being 4kB. while it is actually 8kB (the
On 06/24/2014 11:29 PM, Naveen Krishna Chatradhi wrote:
Add Murata Manufacturing Co., Ltd. to the list of device tree
vendor prefixes.
Murata manufactures NTC (Negative Temperature Coefficient) based
Thermistors for small scale applications like Mobiles and PDAs.
Signed-off-by: Naveen Krishna
This patch implements a generic CPU idle driver for ARM64 machines.
It relies on the DT idle states infrastructure to initialize idle
states count and respective parameters. Current code assumes the driver
is managing idle states on all possible CPUs but can be easily
generalized to support
This patch implements the cpu_suspend cpu operations method through
the PSCI CPU_SUSPEND API. The PSCI implementation translates the idle state
index passed by the cpu_suspend core call into a valid PSCI state according to
the PSCI states initialized at boot by the PSCI suspend backend.
Entry
With the introduction of DT based idle states, CPUidle drivers for ARM
can now initialize idle states data through properties in the device tree.
This patch adds code to the big.LITTLE CPUidle driver to dynamically
initialize idle states data through the updated device tree source file.
Cc:
OS layers built on top of PSCI to enter low-power states require the
power_state parameter to be passed to the PSCI CPU suspend method.
This parameter is specific to a power state and platform specific,
therefore must be provided by firmware to the OS in order to enable
proper call sequence.
This patch updates the RTSM dts file with PSCI bindings and nodes
describing the AEMv8 model idle states parameters.
Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
---
arch/arm64/boot/dts/rtsm_ve-aemv8a.dts | 44 +++---
1 file changed, 36 insertions(+), 8
On 06/24/2014 11:29 PM, Naveen Krishna Chatradhi wrote:
Murata Manufacturing Co., Ltd is the vendor for
NTC (Negative Temperature coefficient) based Thermistors.
But, the driver extensively uses NTC as the vendor name.
This patch corrects the vendor name also updates the
compatibility strings
ARM based platforms implement a variety of power management schemes that
allow processors to enter idle states at run-time.
The parameters defining these idle states vary on a per-platform basis forcing
the OS to hardcode the state parameters in platform specific static tables
whose size grows as
On most common ARM systems, the low-power states a CPU can be put into are
not discoverable in HW and require device tree bindings to describe
power down suspend operations and idle states parameters.
In order to enable DT based idle states and configure idle drivers, this
patch implements the
With the introduction of DT based idle states, CPUidle drivers for
ARM can now initialize idle states data through properties in the device
tree.
This patch adds code to the Exynos CPUidle driver to dynamically
initialize idle states data through the updated device tree source
files.
Cc: Kukjin
This patch is v5 of a previous posting:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/263060.html
Changes in v5:
- Added power-rank property to implement state sorting, following a number
of on/off list review comments
- Added timer retained bool property
- Ported TC2
On 06/25/2014 03:57 AM, Kukjin Kim wrote:
Naveen Krishna Chatradhi wrote:
+ Jean Delvare, Guenter Roeck
I'm adding maintainers for drivers/hwmon/ntc* but I'm not sure.
Hi,
This series looks good to me. I will take 3/4 and 4/4 for exynos DT changes once
hwmon/ntc maintainer pick the others.
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and are simpler enough that
can be converted to use a generic driver to
Hi Lorenzo,
On Wed, Jun 25, 2014 at 03:10:21PM +0100, Lorenzo Pieralisi wrote:
This patch updates the RTSM dts file with PSCI bindings and nodes
describing the AEMv8 model idle states parameters.
Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
---
On 25/06/14 15:10, Lorenzo Pieralisi wrote:
This patch updates the RTSM dts file with PSCI bindings and nodes
describing the AEMv8 model idle states parameters.
Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
---
arch/arm64/boot/dts/rtsm_ve-aemv8a.dts | 44
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
Clocks drivers for Maxim PMIC are very similar so they can
be converted to use the generic Maxim clock driver.
Also, while being there use module_platform_driver() helper
macro to eliminate more boilerplate code.
Hello Krzysztof,
On 06/25/2014 04:19 PM, Krzysztof Kozlowski wrote:
On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote:
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and
On Tue, Jun 24, 2014 at 5:59 PM, Chen-Yu Tsai w...@csie.org wrote:
Now that we have support for sun8i specific clocks in the driver,
add the corresponding clock nodes to the DTSI.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/boot/dts/sun8i-a23.dtsi | 115
CLK_S_ICN_REG_0 hasn't existed for a while now. This was renamed
over a few commits, then finally removed in commit 5aa02b9 (ARM:
STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock).
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
Documentation/devicetree/bindings/i2c/i2c-st.txt | 2
Hi Lorenzo,
On Wed, Jun 25, 2014 at 03:10:14PM +0100, Lorenzo Pieralisi wrote:
ARM based platforms implement a variety of power management schemes that
allow processors to enter idle states at run-time.
The parameters defining these idle states vary on a per-platform basis forcing
the OS to
On 06/04/2014 06:03 PM, Antoine Ténart wrote:
Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then
execute the instruction we put in the reset exception register, setting
the pc at the address contained in the software reset address register,
which is the physical address of the
On 06/04/2014 06:03 PM, Antoine Ténart wrote:
Document the CPU control compatible, needed for the SMP support on
Marvell Berlin SoCs.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
Applied patches 2-5 to berlin/dt.
Thanks!
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On Wed, Jun 25, 2014 at 03:10:19PM +0100, Lorenzo Pieralisi wrote:
With the introduction of DT based idle states, CPUidle drivers for ARM
can now initialize idle states data through properties in the device tree.
This patch adds code to the big.LITTLE CPUidle driver to dynamically
initialize
On Wed, Jun 25, 2014 at 03:10:20PM +0100, Lorenzo Pieralisi wrote:
With the introduction of DT based idle states, CPUidle drivers for
ARM can now initialize idle states data through properties in the device
tree.
This patch adds code to the Exynos CPUidle driver to dynamically
initialize
Hi,
On Wednesday, June 25, 2014 03:10:20 PM Lorenzo Pieralisi wrote:
With the introduction of DT based idle states, CPUidle drivers for
ARM can now initialize idle states data through properties in the device
tree.
This patch adds code to the Exynos CPUidle driver to dynamically
On Tue, Jun 24, 2014 at 06:09:58PM -0400, Tejun Heo wrote:
On Tue, Jun 24, 2014 at 11:19:01AM +0100, Russell King - ARM Linux wrote:
Another round of these patches. I've integrated Shawn's patch to split
the documentation into this series so I can add the DT documentation
on top of it.
On Tue, Jun 24, 2014 at 11:19:58AM +0100, Russell King wrote:
Add the transmit level, boost and attenuation parameters necessary for
the eSATA interface on Cubox-i to work.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Applied #7 and #8, thanks.
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On Wed, 25 Jun 2014, Lorenzo Pieralisi wrote:
ARM based platforms implement a variety of power management schemes that
allow processors to enter idle states at run-time.
The parameters defining these idle states vary on a per-platform basis forcing
the OS to hardcode the state parameters in
On Wed, Jun 25, 2014 at 03:10:16PM +0100, Lorenzo Pieralisi wrote:
On most common ARM systems, the low-power states a CPU can be put into are
not discoverable in HW and require device tree bindings to describe
power down suspend operations and idle states parameters.
In order to enable DT
On Wed, Jun 25, 2014 at 03:10:17PM +0100, Lorenzo Pieralisi wrote:
This patch implements the cpu_suspend cpu operations method through
the PSCI CPU_SUSPEND API. The PSCI implementation translates the idle state
index passed by the cpu_suspend core call into a valid PSCI state according to
the
Here is v4 of the patchset.
Changes since v3:
- Fixed trivial typo related to unnecessary semicolon.
regards,
Stan
-
Here is the third version of the crypto driver.
Changes since v2:
- reworked crypto_enqueue/dequeue_request
Modify crypto Kconfig and Makefile in order to build the qce
driver and adds qce Makefile as well.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig | 15 +++
drivers/crypto/Makefile |1 +
drivers/crypto/qce/Makefile |6 ++
3
Here is Qualcomm crypto driver device tree binding documentation
to used as a reference example.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
.../devicetree/bindings/crypto/qcom-qce.txt| 25
1 files changed, 25 insertions(+), 0 deletions(-)
create
Hi Arnd,
On 06/25/2014 03:39 AM, Arnd Bergmann wrote:
On Tuesday 24 June 2014 20:47:58 Suman Anna wrote:
+static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller
*controller,
+ const struct of_phandle_args *sp)
+{
+ phandle phandle
On Tue, 2014-06-24 at 22:29 -0600, Dann Frazier wrote:
On Fri, Jun 20, 2014 at 5:18 PM, Iyappan Subramanian
+ ring-desc_addr = dma_zalloc_coherent(dev, size, ring-dma,
+ GFP_KERNEL);
Iyappan,
When testing this driver on a 3.16-rc2 base,
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