When we compile pinctrl layer for platforms without CONFIG_PINCONF, we get
following compilation errors:
drivers/built-in.o: In function `pinctrl_show':
linux-2.6/drivers/pinctrl/core.c:1116: undefined
reference to `pinconf_show_setting'
drivers/built-in.o: In function `pinctrl_maps_show':
On Mon, Apr 16, 2012 at 10:52 AM, Viresh Kumar viresh.ku...@st.com wrote:
When we compile pinctrl layer for platforms without CONFIG_PINCONF, we get
following compilation errors:
drivers/built-in.o: In function `pinctrl_show':
linux-2.6/drivers/pinctrl/core.c:1116: undefined
reference to
On Mon, Apr 16, 2012 at 11:09 AM, Linus Walleij
linus.wall...@linaro.org wrote:
On Mon, Apr 16, 2012 at 10:52 AM, Viresh Kumar viresh.ku...@st.com wrote:
When we compile pinctrl layer for platforms without CONFIG_PINCONF, we get
following compilation errors:
drivers/built-in.o: In function
On Mon, Apr 16, 2012 at 6:13 AM, Viresh Kumar viresh.ku...@st.com wrote:
This simplifies cleanup paths of user code by providing managed version of
of_iomap().
Signed-off-by: Viresh Kumar viresh.ku...@st.com
Cc: Grant Likely grant.lik...@secretlab.ca
Let's CC Rob Herring on this too in
On Mon, Apr 16, 2012 at 6:13 AM, Viresh Kumar viresh.ku...@st.com wrote:
This patchset replaces existing pinmux framework for SPEAr family of SoC with
generic pinctrl framework.
Real nice work on this patchset Viresh, much appreciated!
We're going to establish a merge base with the latest
On Mon, Apr 16, 2012 at 12:53 AM, David Gibson
da...@gibson.dropbear.id.au wrote:
On Mon, Apr 16, 2012 at 04:14:25AM +, Sethi Varun-B16395 wrote:
You can use a 4 cell interrupt specifier (we use that in case of embedded
power architecture platforms)
- First cell corresponds to one of the
On Monday 16 April 2012, Viresh Kumar wrote:
This simplifies cleanup paths of user code by providing managed version of
of_iomap().
Signed-off-by: Viresh Kumar viresh.ku...@st.com
Cc: Grant Likely grant.lik...@secretlab.ca
This one looks good,
Acked-by: Arnd Bergmann a...@arndb.de
but I
This commit adds the device node required to probe NVIDIA Tegra 20 GART
hardware from the device tree.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
Changes in v2:
- drop unneeded of_dev_auxdata entry
arch/arm/boot/dts/tegra20.dtsi |6 ++
1 file changed, 6
On Mon, Apr 16, 2012 at 8:42 AM, Arnd Bergmann a...@arndb.de wrote:
On Monday 16 April 2012, Viresh Kumar wrote:
This simplifies cleanup paths of user code by providing managed version of
of_iomap().
Signed-off-by: Viresh Kumar viresh.ku...@st.com
Cc: Grant Likely grant.lik...@secretlab.ca
On Apr 16, 2012 8:37 PM, Grant Likely grant.lik...@secretlab.ca wrote:
Why is this function needed? I'm directing drivers away from using
of_iomap now since the resource table is populated with the address
ranges at device registration time now. New code should be using
On Mon, Apr 16, 2012 at 9:12 AM, viresh kumar viresh.li...@gmail.com wrote:
On Apr 16, 2012 8:37 PM, Grant Likely grant.lik...@secretlab.ca wrote:
Why is this function needed? I'm directing drivers away from using
of_iomap now since the resource table is populated with the address
ranges at
Hi Mark,
On Wed, Apr 04, 2012 at 10:22:57PM +0100, Mark Brown wrote:
On Sat, Mar 24, 2012 at 03:19:49PM +0530, Thomas Abraham wrote:
Add irq domain support for max8997 interrupts. The reverse mapping method
used is linear mapping since the sub-drivers of max8997 such as regulator
and
On Monday 16 April 2012, Hiroshi Doyu wrote:
What about using dma-window property to specify IOVA range in dtsi as below?
arch/powerpc/platforms/cell/iommu.c:
698 static int __init cell_iommu_get_window(struct device_node *np,
699 unsigned long
On 04/15/2012 02:39 AM, Thierry Reding wrote:
* Stephen Warren wrote:
On 04/13/2012 03:14 AM, Thierry Reding wrote:
display-controllers = disp1 disp2;
outputs = lvds hdmi tvo dsi;
I don't think you need both the child nodes and those two properties.
In other words,
On 04/16/2012 04:10 AM, Hiroshi Doyu wrote:
Stephen Warren wrote at Fri, 13 Apr 2012 21:33:47 +0200:
On 04/13/2012 04:22 AM, Hiroshi Doyu wrote:
Add device tree support for Tegra30 IOMMU(SMMU).
...
But why does the SMMU driver expect to control the AHB arbitration
registers? They seem
On 04/16/2012 05:59 AM, Joerg Roedel wrote:
Applied patches 1 and 2. Should I also queue up patch 3 after the
objections have been fixed? The patch doesn't touch drivers/iommu...
I expect I'd take that through the Tegra tree to minimize conflicts.
___
On 04/16/2012 11:39 AM, Hong Xu :
This series adds support for Atmel's AT91SAM9N12-EK.
Patches are on top of v3.4-rc2 and target for v3.5
Comments on the v2 following ;-)
Hong Xu (3):
AT91: Add DT description files for AT91SAM9N12-EK
AT91: Add machine header file for AT91SAM9N12 SoC
On 4/16/12, Grant Likely grant.lik...@secretlab.ca wrote:
It isn't recommended anymore. Use the bus_type specific helpers instead.
Ok. So here is fixup for 3/5 of this patchset.
@Linus: I will merge this with PACH 3/5 and send pull request to Arnd.
fixup! pinctrl: Add SPEAr pinctrl drivers
On 04/16/2012 11:39 AM, Hong Xu :
Added AT91SAM9N12 SoC DT file, as well as the board definition file
for AT91SAM9N12-EK.
Signed-off-by: Hong Xu hong...@atmel.com
---
Changes since v1,
* Removed offset for memory node according to Ludovic's comment
* Changed compatibility string for
On 04/16/2012 11:39 AM, Hong Xu :
Signed-off-by: Hong Xu hong...@atmel.com
---
Changes since v1,
* Added DT entry in Makefile.boot
* Removed board compatibility string (AT91 will use a generic name)
arch/arm/mach-at91/Kconfig |9 ++
arch/arm/mach-at91/Makefile |1 +
On Mon, Apr 16, 2012 at 10:21 AM, viresh kumar viresh.li...@gmail.com wrote:
On 4/16/12, Grant Likely grant.lik...@secretlab.ca wrote:
It isn't recommended anymore. Use the bus_type specific helpers instead.
Ok. So here is fixup for 3/5 of this patchset.
@Linus: I will merge this with PACH
On Apr 16, 2012 10:36 PM, Grant Likely grant.lik...@secretlab.ca wrote:
Cool, thanks.
Now what you *could* do is something like devm_platform_ioremap() that
gets the resource, does request_region() and ioremap(). That would
cut a lot of boilerplate out of drivers. :-)
I wanted to, but i
Hello.
On 04/16/2012 09:06 PM, Grant Likely wrote:
It isn't recommended anymore. Use the bus_type specific helpers instead.
Ok. So here is fixup for 3/5 of this patchset.
@Linus: I will merge this with PACH 3/5 and send pull request to Arnd.
fixup! pinctrl: Add SPEAr pinctrl drivers
On 04/15/2012 07:47 PM, Shawn Guo wrote:
On Sun, Apr 15, 2012 at 07:29:58PM +0200, Sascha Hauer wrote:
...
How far are we away from getting macro support? Do we already agree that we
want to have such a feature? I remember I saw someone mentioning it,
maybe even by piping the devicetree
On 04/15/2012 09:37 PM, Viresh Kumar wrote:
On 4/13/2012 9:48 PM, Stephen Warren wrote:
...
Just a couple of minor comments below.
...
As you have spent a lot of time getting these reviewed, i would add your
Reviewed-by on all these patches. Hope that would be fine?
Sure. Note that I
On Apr 16, 2012 11:35 PM, Stephen Warren swar...@wwwdotorg.org wrote:
Note that I explicitly didn't review the pin/group/function data,
Even i can't review that :-)
--
Viresh
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
On 04/16/2012 09:04 AM, Thierry Reding wrote:
This commit adds the device node required to probe NVIDIA Tegra 20 GART
hardware from the device tree.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
Applied, thanks.
___
On Sat, Mar 24, 2012 at 03:19:49PM +0530, Thomas Abraham wrote:
Add irq domain support for max8997 interrupts. The reverse mapping method
used is linear mapping since the sub-drivers of max8997 such as regulator
and charger drivers can use the max8997 irq_domain to get the linux irq
number for
* Stephen Warren wrote:
On 04/15/2012 02:39 AM, Thierry Reding wrote:
I think I like the former better. The way I understand it the children of
the
graphics node will have to be registered explicitly by the DRM driver
because
of_platform_populate() doesn't work recursively. That would
On Sat, Mar 24, 2012 at 03:19:50PM +0530, Thomas Abraham wrote:
Add device tree based discovery support for max8997.
I tried to apply this but it's collided with some other changes in the
driver which have arrived in the meantime and the rejects were too large
to fix up. I suspect it's mostly
On 17 April 2012 00:21, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
On Sat, Mar 24, 2012 at 03:19:50PM +0530, Thomas Abraham wrote:
Add device tree based discovery support for max8997.
I tried to apply this but it's collided with some other changes in the
driver which have arrived
On 04/16/2012 12:48 PM, Thierry Reding wrote:
* Stephen Warren wrote:
...
Has there been any discussion as to how EDID data would best be represented
in DT? Should it just be a binary blob or rather some textual
representation?
I think a binary blob makes sense - that's the exact same
* Stephen Warren wrote:
On 04/16/2012 12:48 PM, Thierry Reding wrote:
* Stephen Warren wrote:
...
Has there been any discussion as to how EDID data would best be
represented
in DT? Should it just be a binary blob or rather some textual
representation?
I think a binary blob makes
On Thu, Mar 15, 2012 at 11:31:02PM -, chenhui zhao wrote:
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
index 07256b7..d296e88 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
+++
On 04/16/2012 01:03 PM, Thierry Reding wrote:
...
I've been looking about for tools to generate EDID data but didn't find
anything useful. Does anyone know of any tool that's more convenient than
manually filling a struct edid and writing that to a file?
Sorry, no.
From: David Daney david.da...@cavium.com
This code has been working well for about six months on a couple of
different configurations (boards), so I thought it would be a good
time to send it out again, and I hope get it on the path towards
merging.
v3: Update binding to use mdio-mux-gpio
From: David Daney david.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register() function is modified so that the device
From: David Daney david.da...@cavium.com
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient
From: David Daney david.da...@cavium.com
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney david.da...@cavium.com
---
.../devicetree/bindings/net/mdio-mux-gpio.txt | 127
On Mon, Apr 16, 2012 at 09:55:09AM -0400, jonsm...@gmail.com wrote:
On Mon, Apr 16, 2012 at 12:53 AM, David Gibson
da...@gibson.dropbear.id.au wrote:
On Mon, Apr 16, 2012 at 04:14:25AM +, Sethi Varun-B16395 wrote:
You can use a 4 cell interrupt specifier (we use that in case of embedded
40 matches
Mail list logo
