On 2012-11-21 03:56, Alex Courbot wrote:
Hi Tomi,
On Tuesday 20 November 2012 22:48:18 Tomi Valkeinen wrote:
I guess there's a reason, but the above looks a bit inconsistent. For
gpio you define the gpio resource inside the step. For power and pwm the
resource is defined before the steps.
On 11/14/2012 07:08 PM, AnilKumar Ch wrote:
Add a new address space/memory resource to d_can device tree node. D_CAN
RAM initialization is achieved through RAMINIT register which is part of
AM33XX control module address space. D_CAN RAM init or de-init should be
done by writing instance
On 11/21/2012 06:45 AM, AnilKumar, Chimata wrote:
On Tue, Nov 20, 2012 at 15:56:32, Marc Kleine-Budde wrote:
On 11/20/2012 11:23 AM, AnilKumar, Chimata wrote:
On Tue, Nov 20, 2012 at 15:43:04, Marc Kleine-Budde wrote:
On 11/14/2012 07:08 PM, AnilKumar Ch wrote:
Add a new address space/memory
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of
On Tue, Nov 20, 2012 at 08:35:31PM +0100, Thierry Reding wrote:
On Tue, Nov 20, 2012 at 07:11:29PM +0100, Robert Schwebel wrote:
On Tue, Nov 20, 2012 at 05:13:19PM +0100, Laurent Pinchart wrote:
On Tuesday 20 November 2012 16:54:50 Steffen Trumtrar wrote:
Hi!
Changes since v11:
On Wednesday 21 November 2012 16:13:47 Tomi Valkeinen wrote:
* PGP Signed by an unknown key
On 2012-11-21 03:56, Alex Courbot wrote:
Hi Tomi,
On Tuesday 20 November 2012 22:48:18 Tomi Valkeinen wrote:
I guess there's a reason, but the above looks a bit inconsistent. For
gpio you
On Wed, Nov 21, 2012 at 13:57:17, Marc Kleine-Budde wrote:
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
On 2012-11-21 10:32, Alex Courbot wrote:
Ok. I'll need to dig up the conversation
IIRC it was somewhere around here:
https://lkml.org/lkml/2012/9/7/662
See the parent messages too.
Thanks.
Did you consider any examples
of how some driver could handle the error cases?
For all the
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of
A == AnilKumar Ch anilku...@ti.com writes:
A Add matrix keypad device tree data to am335x-evm by adding all
A the necessary parameters like keymap, row column gpios and etc.
A Signed-off-by: AnilKumar Ch anilku...@ti.com
A ---
A arch/arm/boot/dts/am335x-evm.dts | 20
On Wednesday 21 November 2012 16:48:45 Tomi Valkeinen wrote:
If the power-off sequence disables a regulator that was supposed to be
enabled by the power-on sequence (but wasn't enabled because of an
error), the regulator_disable is still called when the driver runs the
power-off sequence,
Hi Steffen,
I am trying to add DT support for da8xx-fb driver on top of your patches.
Encountered below build error. Sorry for reporting it late.
On Tue, Nov 20, 2012 at 21:24:53, Steffen Trumtrar wrote:
Add a function to convert from the generic videomode to a fb_videomode.
Signed-off-by:
Hi Steffen,
On Tue, Nov 20, 2012 at 21:24:52, Steffen Trumtrar wrote:
This adds support for reading display timings from DT or/and convert one of
those
timings to a videomode.
The of_display_timing implementation supports multiple children where each
property can have up to 3 values. All
allow to specify a name to an exported gpio
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
arch/mips/include/asm/mach-au1x00/gpio-au1000.h |3 ++-
arch/mips/include/asm/mach-au1x00/gpio-au1300.h |3 ++-
drivers/gpio/gpiolib.c | 12
On 20.11.2012 16:59, Peter Korsgaard wrote:
Daniel == Daniel Mack zon...@gmail.com writes:
Hi,
In omap2 driver NAND_ECC_HW ecc mode supports 3 ecc layout
OMAP_ECC_HAMMING_CODE_HW_ROMCODE
OMAP_ECC_BCH4_CODE_HW
OMAP_ECC_BCH8_CODE_HW
So selection of ecc layout data should
HI,
This patch serie add the support of gpio-export to DT
This also extend to gpio_export with the possibility to specify a name
for the gpio.
When you support different hardware you do not need to knwon which gpio
is used at application level just you
On Tue, Nov 20, 2012 at 09:15:45PM +, Gregory CLEMENT wrote:
From: Yehuda Yitschak yehu...@marvell.com
insert commit log here
Also -- is the author attribution still correct?
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory CLEMENT
On Tue, Nov 20, 2012 at 09:15:49PM +, Gregory CLEMENT wrote:
From: Yehuda Yitschak yehu...@marvell.com
1. added smp init functions in platsmp.c
2. added secondary cpu entry point in headsmp.S
3. added hotplog initial support in hotplug.c
hotplug
4. added SMP support for PJ4B cpu
On Tue, Nov 20, 2012 at 6:09 PM, Rob Herring robherri...@gmail.com wrote:
On 11/19/2012 08:10 AM, Fabio Porcedda wrote:
The first user of this function is the watchdog framework.
I still have issues with this. In addition to questionable usefulness
outside the watchdog framework, I'm not even
Yes,
Even I got the same build error.
later I fixed it by including #include linux/mxsfb.h
Best Wishes,
Leela Krishna.
On Wed, Nov 21, 2012 at 3:39 PM, Manjunathappa, Prakash
prakash...@ti.com wrote:
Hi Steffen,
I am trying to add DT support for da8xx-fb driver on top of your patches.
Hi,
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add display_timing structure and the according helper functions. This allows
the description of a display via its supported timing parameters.
Every timing parameter can be specified as a single value or a range
min typ max.
Also, add
On Tue, Nov 20, 2012 at 10:15:49PM +0100, Gregory CLEMENT wrote:
+ENTRY(armada_xp_secondary_startup)
+
+ /* Read CPU id */
+ mrc p15, 0, r1, c0, c0, 5
+ and r1, r1, #0xF
+
+ /* Add CPU to coherency fabric */
+ ldr r0, = ARMADA_XP_CFB_BASE
+ mov lr,
On Wed, Nov 21, 2012 at 01:06:03PM +0200, Tomi Valkeinen wrote:
On 2012-11-21 06:23, Alex Courbot wrote:
Hi Grant,
On Wednesday 21 November 2012 05:54:29 Grant Likely wrote:
With the advent of the device tree and of ARM kernels that are not
board-tied, we cannot rely on these
Hi!
On Wed, Nov 21, 2012 at 10:12:43AM +, Manjunathappa, Prakash wrote:
Hi Steffen,
On Tue, Nov 20, 2012 at 21:24:52, Steffen Trumtrar wrote:
+/**
+ * of_get_display_timings - parse all display_timing entries from a
device_node
+ * @np: device_node with the subnodes
+ **/
Rename I2C and GPIO nodes according to AM33XX TRM. According to
AM33XX TRM device instances are starting from 0 like i2c0, i2c1
and i2c3.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
[pa...@antoniou-consulting.com: initial patch by pantelis's]
Signed-off-by: AnilKumar Ch
On Wed, Nov 21, 2012 at 12:48:43PM +0100, Steffen Trumtrar wrote:
Hi!
On Wed, Nov 21, 2012 at 10:12:43AM +, Manjunathappa, Prakash wrote:
Hi Steffen,
On Tue, Nov 20, 2012 at 21:24:52, Steffen Trumtrar wrote:
+/**
+ * of_get_display_timings - parse all display_timing entries
On 11/21/2012 11:36 AM, Will Deacon wrote:
On Tue, Nov 20, 2012 at 09:15:45PM +, Gregory CLEMENT wrote:
From: Yehuda Yitschak yehu...@marvell.com
insert commit log here
Also -- is the author attribution still correct?
I don't know: the code is based on Yehuda work, but version
by
Hi!
On Wed, Nov 21, 2012 at 04:39:01PM +0530, Leela Krishna Amudala wrote:
Yes,
Even I got the same build error.
later I fixed it by including #include linux/mxsfb.h
Best Wishes,
Leela Krishna.
On Wed, Nov 21, 2012 at 3:39 PM, Manjunathappa, Prakash
prakash...@ti.com wrote:
Hi
On 2012-11-21 13:40, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 01:06:03PM +0200, Tomi Valkeinen wrote:
(sorry for bouncing back and forth with my private and my @ti addresses.
I can't find an option in thunderbird to only use one sender address,
and I always forget to change it when
On 2012-11-20 17:54, Steffen Trumtrar wrote:
+timings subnode
+---
+
+required properties:
+ - hactive, vactive: Display resolution
+ - hfront-porch, hback-porch, hsync-len: Horizontal Display timing parameters
+ in pixels
+ vfront-porch, vback-porch, vsync-len: Vertical
On Wed, Nov 21, 2012 at 11:57:12AM +, Gregory CLEMENT wrote:
On 11/21/2012 11:41 AM, Will Deacon wrote:
+/*
+ * Armada XP specific entry point for secondary CPUs.
+ * We add the CPU to the coherency fabric and then jump to secondary
+ * startup
+ */
On 2012-11-20 17:54, Steffen Trumtrar wrote:
diff --git a/include/linux/fb.h b/include/linux/fb.h
index c7a9571..920cbe3 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -14,6 +14,7 @@
#include linux/backlight.h
#include linux/slab.h
#include asm/io.h
+#include
On 11/21/2012 01:26 PM, Russell King - ARM Linux wrote:
On Wed, Nov 21, 2012 at 12:22:51PM +, Will Deacon wrote:
Sorry, my mistake (I was thinking on my feet) since secondary_startup is
declared in a C file, right? How about:
ldr lr, =secondary_startup
b
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add helper to get fb_videomode from devicetree.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
Acked-by: Thierry Reding thierry.red...@avionic-design.de
Tested-by: Thierry
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add conversion from videomode to drm_display_mode
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
Acked-by: Thierry Reding thierry.red...@avionic-design.de
Tested-by: Thierry
A == AnilKumar Ch anilku...@ti.com writes:
A Rename I2C and GPIO nodes according to AM33XX TRM. According to
A AM33XX TRM device instances are starting from 0 like i2c0, i2c1
A and i2c3.
A Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
A [pa...@antoniou-consulting.com:
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add helper to get drm_display_mode from devicetree.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
Acked-by: Thierry Reding thierry.red...@avionic-design.de
Tested-by:
On Wed, Nov 21, 2012 at 12:22:51PM +, Will Deacon wrote:
Sorry, my mistake (I was thinking on my feet) since secondary_startup is
declared in a C file, right? How about:
ldr lr, =secondary_startup
b ll_set_cpu_coherent
Why? Do we really want LR to be the _virtual_
On Wed, Nov 21, 2012 at 02:04:17PM +0200, Tomi Valkeinen wrote:
On 2012-11-21 13:40, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 01:06:03PM +0200, Tomi Valkeinen wrote:
(sorry for bouncing back and forth with my private and my @ti addresses.
I can't find an option in thunderbird to only
Hi Tomi,
On Wednesday 21 November 2012 14:49:30 Tomi Valkeinen wrote:
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add helper to get fb_videomode from devicetree.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
In AM33xx PWM sub modules like ECAP, EHRPWM EQEP are integrated to
PWM subsystem. All these submodules shares the resources (clock) has
a clock gating register in PWM Subsystem. This patch series creates a
parent PWM Subsystem driver to handle access synchronization of shared
resources clock
In some platforms (like am33xx), PWM sub modules (ECAP, EHRPWM, EQEP)
are integrated to PWM subsystem. These PWM submodules has resources
shared and only one register bit-field is provided to control
module/clock enable/disable, makes it difficult to handle common
resources from independent PWMSS
EHRPWM module requires explicit clock gating from control module.
Hence add clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 1a45d6b... 08b21d2... M arch/arm/mach-omap2/clock33xx_data.c
:100644 100644 a89e825... c0e34e6... M
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP EHRPWM).
To handle resource sharing IP integration
1. Rework on parent child relation between PWMSS and
ECAP, EQEP EHRPWM child devices to support runtime PM.
2. Add support for
On Wed, Nov 21, 2012 at 12:31:36PM +, Gregory CLEMENT wrote:
On 11/21/2012 01:26 PM, Russell King - ARM Linux wrote:
On Wed, Nov 21, 2012 at 12:22:51PM +, Will Deacon wrote:
Sorry, my mistake (I was thinking on my feet) since secondary_startup is
declared in a C file, right? How
This patch
1. Add support for device-tree binding for ECAP APWM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member
Enable pinctrl for pwm-tiecap
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 e0bcc85... 646f8b4... M drivers/pwm/pwm-tiecap.c
drivers/pwm/pwm-tiecap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiecap.c
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in
Enable pinctrl for pwm-tiehrpwm
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 34f9378... 23fd3c3... M drivers/pwm/pwm-tiehrpwm.c
drivers/pwm/pwm-tiehrpwm.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiehrpwm.c
Some platforms (like AM33XX) requires clock gating from control module
explicitly for TBCLK. Enabling of this clock required for the
functioning of the time base sub module in EHRPWM module. So adding
optional TBCLK handling if DT node populated with tbclkgating. This
helps the driver can coexist
Add PWMSS device tree nodes in relation with ECAP EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP EHRPWM by
adding necessary properties like pwm-cells, base reg set disabled as
status.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v2:
PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v3:
- Add epwmss parent status=okay field.
:100644 100644 9f65f17... 4178ba4c.. M
PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 f5a6162... 6f3de83... M arch/arm/boot/dts/am335x-evmsk.dts
On Wednesday 21 November 2012 09:28:22 Steffen Trumtrar wrote:
On Tue, Nov 20, 2012 at 08:35:31PM +0100, Thierry Reding wrote:
On Tue, Nov 20, 2012 at 07:11:29PM +0100, Robert Schwebel wrote:
On Tue, Nov 20, 2012 at 05:13:19PM +0100, Laurent Pinchart wrote:
On Tuesday 20 November 2012
On 2012-11-21 15:00, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 02:04:17PM +0200, Tomi Valkeinen wrote:
On 2012-11-21 13:40, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 01:06:03PM +0200, Tomi Valkeinen wrote:
(sorry for bouncing back and forth with my private and my @ti addresses.
I
On 11/21/2012 02:58 AM, Bongkyu Kim wrote:
This patch supports more interrupt specifiers for i2c client.
Why?
Signed-off-by: Bongkyu Kim bongkyu@lge.com
---
drivers/of/of_i2c.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/of/of_i2c.c
On 11/21/2012 02:57 AM, Bongkyu Kim wrote:
Because of_i2c_register_devices() do not check status property,
all i2c clients are registered.
This patch add checking status property for i2c client.
After this patch, if status property is absent or okay or ok,
i2c client will be registered.
Hi Anilkumar,
On Tue, Nov 20, 2012 at 03:18:44PM +0530, AnilKumar Ch wrote:
From: Colin Foe-Parker colin.foepar...@logicpd.com
Set tps65217 PMIC status to OFF if power enable toggle is supported.
By setting this bit to 1 to enter PMIC to OFF state when PWR_EN pin
is pulled low. Also adds a
On Thu, 15 Nov 2012 12:10:59 +0100, Linus Walleij linus.wall...@linaro.org
wrote:
On Thu, Nov 15, 2012 at 11:59 AM, Anton Vorontsov
anton.voront...@linaro.org wrote:
On Thu, Nov 15, 2012 at 11:35:36AM +0100, Linus Walleij wrote:
On Mon, Nov 12, 2012 at 7:58 PM, Stephen Warren
From: Marc Kleine-Budde m...@pengutronix.de
This patch adds support for a second and third clock to the usbmisc driver. On
modern freescale ARM cores like the imx51, imx53 and imx6q three clocks (ahb,
ipg and per) must be enabled in order to access the USB core.
ahb - AMBA High-Performance Bus
From: Marc Kleine-Budde m...@pengutronix.de
The probe function checks usbmisc to be NULL in the beginning. Without
this patch the can only be loaded once.
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Signed-off-by: Michael Grzeschik m.grzesc...@pengutronix.de
---
Changes since v1:
*
From: Marc Kleine-Budde m...@pengutronix.de
This fixes a potential race condition where the ci13xxx_imx glue code
could be fast enough to call one of the usbmisc_ops before he got a
valid value on the static usbmisc pointer. To fix that we first set
usbmisc, then call usbmisc_set_ops().
This adds mx53 as the next user of the usbmisc driver and makes it
possible to disable the overcurrent-detection of the internal phy.
Signed-off-by: Michael Grzeschik m.grzesc...@pengutronix.de
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
---
Changes since v2:
* added defines for register
From: Marc Kleine-Budde m...@pengutronix.de
This attaches the usbmisc_ops to the of_device_id data and
makes it possible to define special functions per soc.
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Signed-off-by: Michael Grzeschik m.grzesc...@pengutronix.de
---
Changes since v2:
*
This driver will be used for every Freescale SoC which has this misc
memory layout to control the basic usb handling. So better name this
driver, function and struct names in a more generic way.
Reported-by: Fabio Estevam feste...@gmail.com
Signed-off-by: Michael Grzeschik
Nearly every SoC from Freescale has this non-core usb registers. This series
adds support for more users of this driver.
This series is based on Peter Chen's work. Its needed to merge his master branch
before applying this series:
https://github.com/hzpeterchen/linux-usb.git
Marc Kleine-Budde
This adds a post handling routine which is called after
ci13xxx_add_device was called. The first user is the mx25, which has to
disable the external-vbus-divider after the ude has started.
Signed-off-by: Michael Grzeschik m.grzesc...@pengutronix.de
Signed-off-by: Marc Kleine-Budde
On 11/21/2012 11:36 AM, Will Deacon wrote:
On Tue, Nov 20, 2012 at 09:15:45PM +, Gregory CLEMENT wrote:
From: Yehuda Yitschak yehu...@marvell.com
insert commit log here
Also -- is the author attribution still correct?
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Hi Viresh,
On Fri, Nov 09, 2012 at 09:01:54PM +0530, Viresh Kumar wrote:
This patch frees stmpe driver from tension of freeing resources :)
devm_* derivatives of multiple routines are used while allocating resources,
which would be freed automatically by kernel.
Signed-off-by: Viresh Kumar
Hi Viresh,
On Fri, Nov 09, 2012 at 09:01:55PM +0530, Viresh Kumar wrote:
From: Vipul Kumar Samar vipulkumar.sa...@st.com
This patch adds support to probe stmpe devices via DT. Bindings are mentioned
in
binding document.
Signed-off-by: Vipul Kumar Samar vipulkumar.sa...@st.com
On Wed, Nov 21, 2012 at 11:12 AM, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
HI,
This patch serie add the support of gpio-export to DT
This also extend to gpio_export with the possibility to specify a name
for the gpio.
When you support
Hello,
This version improves the commit logs and come with a better written
assembly code based on the comments of Will and Russell. I also
changed the ownership of the code, since I made many change since he
1st release.
The purpose of this patch set is to add the SMP support for the Armada
XP
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory CLEMENT
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory
PJ4B is an implementation of the ARMv7 (such as the Cortex A9 for
example) released by Marvell. This CPU is currently found in
Armada 370 and Armada XP SoCs. This patch provides a support for the
specific initialization of this CPU.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
This enables SMP support on the Armada XP processor. It adds the
mandatory functions to support SMP such as: the SMP initialization
functions in platsmp.c, the secondary CPU entry point in headsmp.S and
the CPU hotplug initial support in hotplug.c.
Signed-off-by: Yehuda Yitschak
On 11/21/2012 05:52 AM, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 12:48:43PM +0100, Steffen Trumtrar wrote:
Hi!
On Wed, Nov 21, 2012 at 10:12:43AM +, Manjunathappa, Prakash wrote:
Hi Steffen,
On Tue, Nov 20, 2012 at 21:24:52, Steffen Trumtrar wrote:
+/**
+ * of_get_display_timings
On Thu, Nov 22, 2012 at 12:02:47AM +0900, Alexandre Courbot wrote:
Mmmm so maybe I am misinterpreting things, but it looks like we
have just buried the power sequences here, haven't we?
I don't think so. In fact I was just starting to think that maybe for
Tegra we could have a generic panel
On Wed, Nov 21, 2012 at 02:59:29PM +, Gregory CLEMENT wrote:
PJ4B is an implementation of the ARMv7 (such as the Cortex A9 for
example) released by Marvell. This CPU is currently found in
Armada 370 and Armada XP SoCs. This patch provides a support for the
specific initialization of this
On Wed, Nov 21, 2012 at 09:03:38AM -0600, Rob Herring wrote:
On 11/21/2012 05:52 AM, Thierry Reding wrote:
On Wed, Nov 21, 2012 at 12:48:43PM +0100, Steffen Trumtrar wrote:
Hi!
On Wed, Nov 21, 2012 at 10:12:43AM +, Manjunathappa, Prakash wrote:
Hi Steffen,
On Tue, Nov 20, 2012
On Wed, Nov 21, 2012 at 02:59:26PM +, Gregory CLEMENT wrote:
diff --git a/arch/arm/mach-mvebu/coherency_ll.S
b/arch/arm/mach-mvebu/coherency_ll.S
new file mode 100644
index 000..74272b6
--- /dev/null
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -0,0 +1,49 @@
+/*
+ * Coherency
On Thu, 15 Nov 2012 20:19:57 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
This will allow to use gpio for chip select with no modification in the
driver binding
When use the cs-gpios, the gpio number will be passed via the cs_gpio field
and the number of chip select
On Wed, Nov 21, 2012 at 02:59:30PM +, Gregory CLEMENT wrote:
This enables SMP support on the Armada XP processor. It adds the
mandatory functions to support SMP such as: the SMP initialization
functions in platsmp.c, the secondary CPU entry point in headsmp.S and
the CPU hotplug initial
On Thu, 15 Nov 2012 15:36:34 -0700, Stephen Warren swar...@wwwdotorg.org
wrote:
On 11/15/2012 02:51 PM, Marek Belisko wrote:
A commit description might be nice. Aside from that,
Indeed. I've applied the patch and written a commit description, but please
take pity on a poor maintainer and
On Fri, 16 Nov 2012 15:53:14 +0900, Simon Horman ho...@verge.net.au wrote:
From: Magnus Damm d...@opensource.se
Fix make distclean to clean up generated dtc files.
Without this patch the following files are left around:
- dtc-lexer.lex.c
- dtc-parser.tab.c
- dtc-parser.tab.h
On Fri, 16 Nov 2012 11:32:46 -0500, Murali Karicheri m-kariche...@ti.com
wrote:
On 11/15/2012 11:20 AM, Grant Likely wrote:
On Mon, 12 Nov 2012 16:28:22 -0500, Murali Karicheri m-kariche...@ti.com
wrote:
This adds OF support to DaVinci SPI controller to configure platform
data through
On Tue, 20 Nov 2012 15:48:24 -0800, Simon Glass s...@chromium.org wrote:
Hi Grant,
On Tue, Nov 20, 2012 at 2:32 PM, Grant Likely grant.lik...@secretlab.ca
wrote:
On Tue, Nov 20, 2012 at 10:23 PM, Simon Glass s...@chromium.org wrote:
Hi,
I hope this is a stupid question with an easy
On Wed, 21 Nov 2012 00:24:48 -0700, Jason Gunthorpe
jguntho...@obsidianresearch.com wrote:
This allows platform_device_add a chance to call insert_resource
on all of the resources from OF. At a minimum this fills in proc/iomem
and presumably makes resource tracking and conflict detection work
On Fri, Nov 16, 2012 at 05:39:42PM +0200, Alexander Shishkin wrote:
Matthieu CASTET matthieu.cas...@parrot.com writes:
Alexander Shishkin a écrit :
Michael Grzeschik m...@pengutronix.de writes:
On Fri, Nov 16, 2012 at 03:34:23PM +0200, Alexander Shishkin wrote:
Michael Grzeschik
From: Sascha Hauer s.ha...@pengutronix.de
devicetrees may have a linux,stdout-path or stdout-path property
in the chosen node describing the console device. This adds a helper
function to match a device against this property and retrieve the options
so a driver can call add_preferred_console for
From: Sascha Hauer s.ha...@pengutronix.de
devicetrees may have the linux,stdout-path property to specify the
console. This patch adds support to the i.MX serial driver for this.
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
Hello,
The purpose of this patch set is to add the SMP support for the Armada
XP SoCs. Beside the SMP support itself brought by the last 3 patches,
this patch set also adds the support for the coherency fabric unit and
the power management service unit.
The coherency fabric is responsible for
PJ4B is an implementation of the ARMv7 (such as the Cortex A9 for
example) released by Marvell. This CPU is currently found in
Armada 370 and Armada XP SoCs. This patch provides a support for the
specific initialization of this CPU.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory CLEMENT
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.
Signed-off-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory
This enables SMP support on the Armada XP processor. It adds the
mandatory functions to support SMP such as: the SMP initialization
functions in platsmp.c, the secondary CPU entry point in headsmp.S and
the CPU hotplug initial support in hotplug.c.
Signed-off-by: Yehuda Yitschak
Michael Grzeschik a écrit :
On Fri, Nov 16, 2012 at 05:39:42PM +0200, Alexander Shishkin wrote:
Matthieu CASTET matthieu.cas...@parrot.com writes:
Alexander Shishkin a écrit :
Michael Grzeschik m...@pengutronix.de writes:
On Fri, Nov 16, 2012 at 03:34:23PM +0200, Alexander Shishkin wrote:
Hi,
On Wed, Nov 21, 2012 at 01:37:08PM +0200, Tomi Valkeinen wrote:
Hi,
On 2012-11-20 17:54, Steffen Trumtrar wrote:
Add display_timing structure and the according helper functions. This allows
the description of a display via its supported timing parameters.
Every timing parameter
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