On Thu, 2013-01-24 at 12:23 +0530, Philip Avinash wrote:
As part of removing generalized dependency, replace xx literal fields
in DT compatible field with 52 for am335x platforms.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Pushed to l2-mtd.git, thanks!
--
Best Regards,
Artem
On 2013-02-02 16:16, Linus Walleij wrote:
+#if defined(__BIG_ENDIAN)
+static inline u32 grgpio_read_reg(u32 __iomem *reg)
+{
+ return ioread32be(reg);
+}
+
+static inline void grgpio_write_reg(u32 __iomem *reg, u32 val)
+{
+ iowrite32be(val, reg);
+}
+#else
[...]
Where is this
This patch removes the usage of DMACH_DT_PROP and dt_dmach_prop
from dma code as the new generic dma dt binding support has been
added.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
The functionality of this patch is dependent on following patches in the link.
Patch series adds omap5 evm mcspi nodes and pinctrl
data in omap5.dtsi and omap5-evm.dts files.
Felipe Balbi (1):
arm: dts: omap5: add SPI devices to OMAP5 DeviceTree file
Sourav Poddar (1):
arm: dts: omap5-evm: Add mcspi data
arch/arm/boot/dts/omap5-evm.dts | 46
From: Felipe Balbi ba...@ti.com
Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 40
1 files changed, 40 insertions(+), 0
Add mcspi node and pinmux data for omap5 mcspi controller.
Tested on omap5430 evm with 3.8-rc4 custom kernel.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v1-v2
Pinctrl nodes were pointing to a different parent.
Fixing the same.
arch/arm/boot/dts/omap5-evm.dts | 46
On Monday 04 February 2013 02:21 PM, Sourav Poddar wrote:
Patch series adds omap5 evm mcspi nodes and pinctrl
data in omap5.dtsi and omap5-evm.dts files.
Felipe Balbi (1):
arm: dts: omap5: add SPI devices to OMAP5 DeviceTree file
Sourav Poddar (1):
arm: dts: omap5-evm: Add mcspi data
So how should we handle such case? Having several dtsi depending
on the Overo's revision would be a mess to my sense, considering
the non-conditional include inside the expansion boards' dts.
Or would it make sense to extend the DT binding for partitions?
Yes makes sense to extend the binding
Hello Benoit,
On 01/24/2013 01:21 PM, Benoit Cousson wrote:
+ Peter who did the original PWM
Hi Florian,
On 01/23/2013 06:56 PM, Florian Vaussard wrote:
Hello Benoit,
This patchset adds some new DT supports to the Overo products. The
first patch converts the PMIC LEDB output to use the
Needs a commit message and a signed-off-by. Otherwise looks fine.
On Wed, Jan 30, 2013 at 04:51:26PM -0500, Justin Sobota wrote:
---
libfdt/fdt.h| 50 ++
libfdt/libfdt_env.h | 50 ++
(CC:ing Anton who wrote the generic GPIO. I might be wrong.)
On Mon, Feb 4, 2013 at 9:10 AM, Andreas Larsson andr...@gaisler.com wrote:
On 2013-02-02 16:16, Linus Walleij wrote:
+#if defined(__BIG_ENDIAN)
+static inline u32 grgpio_read_reg(u32 __iomem *reg)
+{
+ return
Hi Florian,
On Mon, Jan 28, 2013 at 6:54 PM, Florian Vaussard
florian.vauss...@epfl.ch wrote:
Add device-tree support for the GPMC controller on the OMAP3.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3.dtsi | 11 +++
1 files changed, 11
On 2013-02-04 10:24, Linus Walleij wrote:
And do you really have and test this regularly on both LE and BE hardware?
I am worrying a bit about maintenance...
I am more than happy to drop that. I will most probably never test this on
LE hardware.
Will someone else? I'm more thinking whether
Hi Javier,
On 02/04/2013 10:27 AM, Javier Martinez Canillas wrote:
Hi Florian,
On Mon, Jan 28, 2013 at 6:54 PM, Florian Vaussard
florian.vauss...@epfl.ch wrote:
Add device-tree support for the GPMC controller on the OMAP3.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
On Mon, Feb 04, 2013 at 07:35:29AM +0100, Prashant Gaikwad wrote:
On Saturday 02 February 2013 01:10 AM, Rhyland Klein wrote:
On 2/1/2013 5:18 AM, Peter De Schrijver wrote:
Tegra114 introduces new PLL types. This requires new clocktypes as well
as some new fields in the pll structure.
On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote:
...
+#define RST_DEVICES_L 0x004
+#define RST_DEVICES_H 0x008
+#define RST_DEVICES_U 0x00C
+#define RST_DEVICES_V 0x358
+#define RST_DEVICES_W
Hi Kukjin,
On Fri, Feb 1, 2013 at 3:56 AM, Kukjin Kim kgene@samsung.com wrote:
Tomasz Figa wrote:
Hi Vivek,
[...]
+ usb@1212 {
+ compatible = samsung,exynos4210-ohci;
+ reg = 0x1212 0x100;
+ interrupts = 0 71 0;
For Samsung platforms we
These patches add support to configure on-chip SRAM via device-tree
node or platform data and to obtain the resulting genalloc pool from
the struct device pointer or a phandle pointing at the device tree node.
This allows drivers to allocate SRAM with the genalloc API without
hard-coding the
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
Reviewed-by: Shawn Guo shawn@linaro.org
---
arch/arm/boot/dts/imx53.dtsi |5 +
arch/arm/boot/dts/imx6q.dtsi |6 ++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
This patch adds three exported functions to lib/genalloc.c:
devm_gen_pool_create, dev_get_gen_pool, and of_get_named_gen_pool.
devm_gen_pool_create is a managed version of gen_pool_create that keeps
track of the pool via devres and allows the management code to automatically
destroy it after
This driver requests and remaps a memory region as configured in the
device tree. It serves memory from this region via the genalloc API.
It optionally enables the SRAM clock.
Other drivers can retrieve the genalloc pool from a phandle pointing
to this drivers' device node in the device tree.
This patch depends on genalloc: add devres support, allow to find
a managed pool by device, which provides the of_get_named_gen_pool
and dev_get_gen_pool functions.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
---
Changes since v7:
- In the platform data case, retrieve gen_pool by device
Hi Haojian,
On Mon, Feb 04, 2013 at 09:05:09AM +0800, Haojian Zhuang wrote:
Hi Samuel,
Are they merged into your git tree?
No, they're not. Qing sent several versions for many of the patches in this
patchset: Could you please send a rebased patchset (on top of for-next) with
the latest
Hi Anil,
On 1/24/2013 2:08 PM, Kumar, Anil wrote:
Add OF_DEV_AUXDATA for wdt driver in da850 board dt
file to use wdt clock.
Signed-off-by: Kumar, Anil anilkuma...@ti.com
---
:100644 100644 37c27af... 1b295d2... March/arm/mach-davinci/da8xx-dt.c
arch/arm/mach-davinci/da8xx-dt.c |
Hello.
On 04-02-2013 15:50, Sekhar Nori wrote:
Auxdata is not evm specific. This can instead be called da850_auxdata_lookup[].
Also, I dont think it is necessary to add auxdata in a separate patch
from dt nodes. So, I fixed these issues and came up with below patch. I
tested basic wdt
On 1 February 2013 18:28, Inki Dae daei...@gmail.com wrote:
2013. 2. 1. 오후 8:52 Inki Dae inki@samsung.com 작성:
-Original Message-
From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
ow...@vger.kernel.org] On Behalf Of Sachin Kamat
Sent: Friday, February 01, 2013
Hi Mark,
On Thu, Jan 31, 2013 at 16:53:03, Mark Rutland wrote:
Hello,
I have a few comments on the devicetree binding and the way it's parsed.
Thanks for review.
On Thu, Jan 31, 2013 at 10:33:06AM +, Manjunathappa, Prakash wrote:
Adds device tree support for davinci_mmc. Also add
On Thu, Jan 24, 2013 at 12:13:46PM +0530, Vakul Garg wrote:
This new property defines the era of the particular SEC version.
The compatible property in device tree crypto node has been updated
not to contain SEC era numbers.
Signed-off-by: Vakul Garg va...@freescale.com
Patch applied.
On Mon, Feb 04, 2013 at 11:45:31AM +0100, Peter De Schrijver wrote:
On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote:
...
+
+ /* dsia */
+ clk = clk_register_mux(NULL, dsia_mux, mux_plld_out0_plld2_out0,
+
On Saturday 02 February 2013 04:07:59 Sergei Shtylyov wrote:
On 02-02-2013 1:30, Russell King - ARM Linux wrote:
because it doesn't make sense to support multiple DMA APIs. We can check
from MUSB's registers if it was configured with Inventra DMA support and
based on that we can register
On Mon, Feb 04, 2013 at 07:06:47AM +0100, Prashant Gaikwad wrote:
On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote:
...
-static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll,
-void __iomem *lock_addr, u32 lock_bit_idx)
+static int
On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote:
On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote:
...
+ /* xusb_hs_src */
+ val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
+ val |= BIT(25); /* always select PLLU_60M */
+ writel(val,
Hi,
On Fri, Feb 01, 2013 at 09:30:03PM +, Russell King - ARM Linux wrote:
I guess to make the MUSB side simpler we would need musb-dma-engine glue
to map dmaengine to the private MUSB API. Then we would have some
starting point to also move inventra (and anybody else) to dmaengine
On Mon, Feb 4, 2013 at 7:32 PM, Samuel Ortiz sa...@linux.intel.com wrote:
Hi Haojian,
On Mon, Feb 04, 2013 at 09:05:09AM +0800, Haojian Zhuang wrote:
Hi Samuel,
Are they merged into your git tree?
No, they're not. Qing sent several versions for many of the patches in this
patchset: Could
On Mon, Feb 04, 2013 at 05:41:53PM +0200, Felipe Balbi wrote:
Hi,
On Fri, Feb 01, 2013 at 09:30:03PM +, Russell King - ARM Linux wrote:
I guess to make the MUSB side simpler we would need musb-dma-engine
glue
to map dmaengine to the private MUSB API. Then we would have some
Hi,
On Fri, Feb 01, 2013 at 11:14:24AM -0800, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [130125 02:30]:
Hi,
On Fri, Jan 25, 2013 at 03:54:00PM +0530, Kishon Vijay Abraham I wrote:
Start using the control module driver for powering on the PHY and for
writing to the mailbox
how to do that
as there is no way to provide a phandle to any of the OMAP generated clocks
in the device tree. Suggestions welcome :).
Based on linux-next:next-20130204
Depends on USB: omap-ehci: Move PHY management to PHY driver
g...@github.com:rogerq/linux.git next-usbhost16
The PHY clock, clock rate, VCC regulator and RESET regulator
can now be provided via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/usb/usb-nop-xceiv.txt | 34
drivers/usb/otg/nop-usb-xceiv.c| 31
Add 2 flags, needs_vcc and needs_reset to platform data.
If the flag is set and the regulator couldn't be found
then we bail out with -EPROBE_DEFER.
For device tree boot we depend on presensce of vcc-supply/
reset-supply properties to decide if we should bail out
with -EPROBE_DEFER or just
Enable this driver to probe in device tree boot.
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/mfd/omap-usb-tll.txt | 17 +
drivers/mfd/omap-usb-tll.c |9 +
2 files
Since there is only one resource per type we don't really need
to use resource name to obtain it. This also also makes it easier
for device tree adaptation.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/usb/host/ehci-omap.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
This is because we want to get rid of platform_data usage from probe().
The only information we need is PORT_MODE, and this can be supplied
to us by the user (i.e. omap-usb-host.c).
We also move channel clock management from runtime PM handlers into
omap_tll_enable/disable().
CC: Samuel Ortiz
Since there is only one resource per type we don't really need
to use resource name to obtain it. This also also makes it easier
for device tree adaptation.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/usb/host/ohci-omap3.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Allows the OHCI controller found in OMAP3 and later chips to
be specified via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/usb/omap3-ohci.txt | 17 +
drivers/usb/host/ohci-omap3.c | 19 +++
2
Allows the OMAP EHCI controller to be specified via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/usb/omap-ehci.txt | 34 ++
drivers/usb/host/ehci-omap.c | 36 +++-
2 files changed, 69
Allows the OMAP HS USB host controller to be specified
via device tree.
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/mfd/omap-usb-host.txt | 68
drivers/mfd/omap-usb-host.c| 83
Adds device nodes for HS USB Host module, TLL module,
OHCI and EHCI controllers.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 30 ++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi
Provide the RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4-panda.dts | 55 +
1
Adds device nodes for HS USB Host module, TLL module,
OHCI and EHCI controllers.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap3.dtsi | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap3.dtsi
Provide RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for USB host
pins.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap3-beagle.dts | 71
1 files
From: Thomas Gleixner t...@linutronix.de
With the locking cleanup in place (from OF: Fixup resursive
locking code paths), we can now do the conversion from the
rw_lock to a raw spinlock as required for preempt-rt.
The previous cleanup and the this conversion were originally
separate since they
On 13-02-04 05:48 AM, Thomas Gleixner wrote:
On Fri, 25 Jan 2013, Paul Gortmaker wrote:
From: Thomas Gleixner t...@linutronix.de
There is no real reason to use a rwlock for devtree_lock. It even
could be a mutex, but unfortunately it's locked from cpu hotplug
paths which can't schedule :(
On Mon, Feb 04, 2013 at 12:32:16PM +0100, Philipp Zabel wrote:
This driver requests and remaps a memory region as configured in the
device tree. It serves memory from this region via the genalloc API.
It optionally enables the SRAM clock.
Other drivers can retrieve the genalloc pool from a
On Sun, Feb 03, 2013 at 08:22:13AM -0800, Guenter Roeck wrote:
[ ... ]
+
+ /* NULL terminated array to save passing size */
+ chans = kzalloc(sizeof(*chans)*(nummaps + 1), GFP_KERNEL);
I think using kcalloc makes sense here.
that would leave chan-data uninitialized, and I would
Hello.
On 02/04/2013 06:41 PM, Felipe Balbi wrote:
I guess to make the MUSB side simpler we would need musb-dma-engine glue
to map dmaengine to the private MUSB API. Then we would have some
starting point to also move inventra (and anybody else) to dmaengine
API.
Why? Inventra is a
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Lior Amsalem al...@marvell.com
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/configs/mvebu_defconfig |2 ++
1 files changed, 2 insertions(+), 0
The Armada 370 and Armada XP SoC has an SPI controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Lior Amsalem
Hi,
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines supported by the driver.
Granted, CPPI 4.1 makes some assumptions about the fact that it's
handling USB
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
The patches are based in Jason Cooper's mvebu/dt branch.
Feel free to test and/or provide feedback.
Ezequiel Garcia (2):
ARM: mvebu: Update defconfig to select SPI support
ARM: mvebu: Add support
Hello.
On 02/04/2013 07:47 PM, Felipe Balbi wrote:
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines supported by the driver.
Granted, CPPI 4.1 makes some
On Tue, Feb 05, 2013 at 12:53:45AM +0900, Paul Mundt wrote:
On Mon, Feb 04, 2013 at 12:32:16PM +0100, Philipp Zabel wrote:
This driver requests and remaps a memory region as configured in the
device tree. It serves memory from this region via the genalloc API.
It optionally enables the SRAM
Hi,
On Mon, Feb 04, 2013 at 08:54:17PM +0300, Sergei Shtylyov wrote:
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines supported by the driver.
Granted, CPPI
On Mon, Feb 04, 2013 at 06:47:12PM +0200, Felipe Balbi wrote:
Hi,
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
In my eyes, getting rid of the mess doesn't justify breaking the rules
that
Russell formulated above.
MUSB is no PCI, there is no single, standard
On Mon, Feb 04, 2013 at 12:14:52AM +0100, Tomasz Figa wrote:
On Sunday 03 of February 2013 19:55:47 Lars-Peter Clausen wrote:
On 02/03/2013 06:30 PM, Tomasz Figa wrote:
On Sunday 03 of February 2013 09:01:07 Guenter Roeck wrote:
On Sun, Feb 03, 2013 at 12:52:40PM +0100, Tomasz Figa wrote:
Hello,
This is the forth version (the third was not the last one finally) of
a patch set to add the dts support for new Armada XP development
board from Marvell called DB-MV784MP-GP.
The branch GP-board is available at
https://github.com/MISL-EBU-System-SW/mainline-public.git
Changelog:
v3-v4:
Some of the mvebu boards (mainly the development board) come with
plug-in RAM modules. This patch allows to let the bootloaders which
have no support for DTS to give the real amount of memory available on
the board.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
This is the new Armada XP evaluation board from Marvell. It comes with
a RS232 port over USB, a SATA link, an internal SSD, 4 Ethernet
Gigabit links.
Support for USB (Host and device), SDIO, PCIe will be added as drivers
when they become available for Armada XP in mainline.
Tested-by: Simon
Hello.
On 02/04/2013 08:02 PM, Felipe Balbi wrote:
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines supported by the driver.
Granted, CPPI 4.1 makes some
* Javier Martinez Canillas jav...@dowhile0.org [130204 04:00]:
On Mon, Feb 4, 2013 at 11:36 AM, Florian Vaussard
Great, the smsc911x was on my TODO list, I can cross it out :) BTW,
do you have a public git for this, so I can test your work on my setup?
Yes, it is the gpmc-smsc911x-wip
On Monday 04 February 2013, Padmavathi Venna wrote:
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 71d58dd..ec0d731 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -23,23 +23,15 @@ static unsigned
On 02/04/2013 06:12 PM, Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 12:14:52AM +0100, Tomasz Figa wrote:
On Sunday 03 of February 2013 19:55:47 Lars-Peter Clausen wrote:
On 02/03/2013 06:30 PM, Tomasz Figa wrote:
On Sunday 03 of February 2013 09:01:07 Guenter Roeck wrote:
On Sun, Feb 03,
On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
Sekhar ,
On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori nsek...@ti.com wrote:
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing
On Mon, Feb 04, 2013 at 09:12:14AM -0800, Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 12:14:52AM +0100, Tomasz Figa wrote:
On Sunday 03 of February 2013 19:55:47 Lars-Peter Clausen wrote:
On 02/03/2013 06:30 PM, Tomasz Figa wrote:
On Sunday 03 of February 2013 09:01:07 Guenter Roeck
From: Paul Gortmaker paul.gortma...@windriver.com
Date: Mon, 4 Feb 2013 11:05:21 -0500
From: Thomas Gleixner t...@linutronix.de
With the locking cleanup in place (from OF: Fixup resursive
locking code paths), we can now do the conversion from the
rw_lock to a raw spinlock as required for
On Monday 04 of February 2013 09:51:34 Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 09:12:14AM -0800, Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 12:14:52AM +0100, Tomasz Figa wrote:
On Sunday 03 of February 2013 19:55:47 Lars-Peter Clausen wrote:
On 02/03/2013 06:30 PM, Tomasz Figa
On Mon, Feb 04, 2013 at 07:00:55PM +0100, Tomasz Figa wrote:
On Monday 04 of February 2013 09:51:34 Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 09:12:14AM -0800, Guenter Roeck wrote:
On Mon, Feb 04, 2013 at 12:14:52AM +0100, Tomasz Figa wrote:
On Sunday 03 of February 2013 19:55:47
On Mon, Feb 4, 2013 at 6:32 PM, Tony Lindgren t...@atomide.com wrote:
* Javier Martinez Canillas jav...@dowhile0.org [130204 04:00]:
On Mon, Feb 4, 2013 at 11:36 AM, Florian Vaussard
Great, the smsc911x was on my TODO list, I can cross it out :) BTW,
do you have a public git for this, so I
On Thu, Jan 31, 2013 at 06:23:04PM +0530, Hebbar Gururaja wrote:
Convert MicBias widgets to supply widget.
On tlv320aic3x, Mic bias power on/off shares the same register bits
with output mic bias voltage. So, when power on mic bias, we need
reclaim it to voltage value.
Applied, thanks.
Ezequiel,
This series looks good. just a few comments:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
The patches are based in Jason Cooper's mvebu/dt branch.
It probably
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
Hi Ezequiel
Do any of the boards we have with mainline support have any devices on
the SPI busses? Its hard to test otherwise.
On 02/04/2013 12:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Feb 04, 2013 at 08:54:17PM +0300, Sergei Shtylyov wrote:
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines
Jason,
On Mon, Feb 04, 2013 at 01:37:33PM -0500, Jason Cooper wrote:
This series looks good. just a few comments:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
Andrew,
On Mon, Feb 04, 2013 at 08:03:26PM +0100, Andrew Lunn wrote:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
Hi Ezequiel
Do any of the boards we have with
Ezequiel,
On Mon, Feb 04, 2013 at 04:29:15PM -0300, Ezequiel Garcia wrote:
On Mon, Feb 04, 2013 at 01:37:33PM -0500, Jason Cooper wrote:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
The patches are based in Jason Cooper's mvebu/dt branch.
It probably doesn't matter
Jason,
On Mon, Feb 4, 2013 at 4:47 PM, Jason Cooper ja...@lakedaemon.net wrote:
Ezequiel,
On Mon, Feb 04, 2013 at 04:29:15PM -0300, Ezequiel Garcia wrote:
On Mon, Feb 04, 2013 at 01:37:33PM -0500, Jason Cooper wrote:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
The
For iio_channel_get to work with OF based configurations, it needs the
consumer device pointer instead of the consumer device name as argument.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
drivers/extcon/extcon-adc-jack.c|3 +--
drivers/iio/inkern.c| 11
This patch set adds basic device tree support to the IIO subsystem. It is the
result of discussions [1] and [2].
Patch 1 changes the first parameter to iio_channel_get() to be the pointer to
the consumer device instead of the consumer device name.
Patch 2 adds basic OF support to the IIO
Provide bindings and parse OF data during initialization.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
One open question is how to assign of_node to the iio device. We can either do
it
in each driver (which turns out to be a huge patchset), or add something like
the
following to
On Mon, Feb 04, 2013 at 09:29:46PM +0100, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:
Based on our experience with fitting multiple subsystems on top of this
DMA-Engine driver, I must say that the DMA-Engine interface has proven
to be a less
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:
Based on our experience with fitting multiple subsystems on top of this
DMA-Engine driver, I must say that the DMA-Engine interface has proven
to be a less than ideal fit for the network driver use case.
The first problem
On 02/04/2013 03:45 AM, Peter De Schrijver wrote:
On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote:
+ /* xusb_hs_src */
+ val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
+ val |= BIT(25); /* always select PLLU_60M */
+ writel(val, clk_base +
On Mon, 4 Feb 2013, Roger Quadros wrote:
Since there is only one resource per type we don't really need
to use resource name to obtain it. This also also makes it easier
for device tree adaptation.
Signed-off-by: Roger Quadros rog...@ti.com
Acked-by: Alan Stern st...@rowland.harvard.edu
On Mon, 4 Feb 2013, Roger Quadros wrote:
Since there is only one resource per type we don't really need
to use resource name to obtain it. This also also makes it easier
for device tree adaptation.
Signed-off-by: Roger Quadros rog...@ti.com
Acked-by: Alan Stern st...@rowland.harvard.edu
On Mon, 4 Feb 2013, Roger Quadros wrote:
Allows the OHCI controller found in OMAP3 and later chips to
be specified via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
For the ohci-omap3 part:
Acked-by: Alan Stern st...@rowland.harvard.edu
On Mon, 4 Feb 2013, Roger Quadros wrote:
Allows the OMAP EHCI controller to be specified via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
For the ehci-omap part:
Acked-by: Alan Stern st...@rowland.harvard.edu
___
devicetree-discuss
On 02/01/2013 03:18 AM, Peter De Schrijver wrote:
The device tree binding models Tegra114 CAR (Clock And Reset) as a single
monolithic clock provider.
...
+- #clock-cells : Should be 1.
+ In clock consumers, this cell represents the clock ID exposed by the CAR.
...
+ 222pll_u
+
On Mon, Feb 4, 2013 at 9:33 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Mon, Feb 04, 2013 at 09:29:46PM +0100, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:
Based on our experience with fitting multiple subsystems on top of this
On Monday 04 February 2013, Linus Walleij wrote:
So I think the above concerns are moot. The callback we can
set on cookies is entirely optional, and it's even implemented by
each DMA engine, and some may not even support it but require
polling, and then it won't even be implemented by the
On 02/04/2013 04:11 PM, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 9:33 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Mon, Feb 04, 2013 at 09:29:46PM +0100, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:
Based on our experience
On 02/01/2013 03:18 AM, Peter De Schrijver wrote:
Refactor the PLL programming code to make it useable by the new PLL types
introduced by Tegra114.
I tested this series on Tegra20 and Tegra30 for regressions and found
none. Note that I didn't test on Tegra114. The series,
Tested-by: Stephen
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