Sachin Kamat wrote:
Hi Kukjin,
Can you please look into this series as it is pending since quite some time.
Applied, I have another opinion about the compatible string though...
I think, it can be sorted out next time :-)
Thanks.
- Kukjin
On 18 February 2013 10:32, Sachin Kamat
On Mon, Mar 11, 2013 at 09:19:26AM +0800, Herbert Xu wrote:
On Mon, Mar 11, 2013 at 12:08:56AM +0100, Sascha Hauer wrote:
On Sun, Mar 10, 2013 at 04:34:01PM +0800, Herbert Xu wrote:
https://patchwork.kernel.org/patch/1817741/
So the change above becomes unnecessary
On Sun, Mar 10, 2013 at 07:46:04PM -1000, Mitch Bradley wrote:
On 3/9/2013 8:55 PM, Jason Gunthorpe wrote:
On Sat, Mar 09, 2013 at 06:52:13PM -1000, Mitch Bradley wrote:
Okay, I think I finally get it. The Marvell root port bridge setup
registers look like standard config headers, even
Hi,
On 11 March 2013 08:42, Sascha Hauer s.ha...@pengutronix.de wrote:
On Mon, Mar 11, 2013 at 09:19:26AM +0800, Herbert Xu wrote:
On Mon, Mar 11, 2013 at 12:08:56AM +0100, Sascha Hauer wrote:
On Sun, Mar 10, 2013 at 04:34:01PM +0800, Herbert Xu wrote:
On Sun, Mar 10, 2013 at 04:09:37PM +0100, Thomas Petazzoni wrote:
Dear Thierry Reding,
On Fri, 8 Mar 2013 21:13:40 +0100, Thierry Reding wrote:
On Fri, Mar 08, 2013 at 01:02:46PM -0700, Jason Gunthorpe wrote:
On Fri, Mar 08, 2013 at 09:43:11AM -1000, Mitch Bradley wrote:
[...]
2)
On 03/08/2013 05:45 PM, Marc Kleine-Budde wrote:
On 03/08/2013 11:46 AM, Marc Kleine-Budde wrote:
On 02/04/2013 04:58 PM, Roger Quadros wrote:
The PHY clock, clock rate, VCC regulator and RESET regulator
can now be provided via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
On Wed, Mar 06, 2013 at 01:02:41, Arnd Bergmann wrote:
On Tuesday 05 March 2013, Manjunathappa, Prakash wrote:
On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote:
On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote:
+- reg: Offset and length of SPI controller register space
On Fri, Mar 08, 2013 at 06:44:05PM +0100, Marc Kleine-Budde wrote:
On 03/08/2013 06:30 PM, ludovic.desroc...@atmel.com wrote:
From: Ludovic Desroches ludovic.desroc...@atmel.com
Add device tree support.
Signed-off-by: Ludovic Desroches ludovic.desroc...@atmel.com
---
On Fri, Mar 08, 2013 at 06:44:54PM +0100, Marc Kleine-Budde wrote:
On 03/08/2013 06:30 PM, ludovic.desroc...@atmel.com wrote:
From: Ludovic Desroches ludovic.desroc...@atmel.com
SAMA5D3 devices also embed CAN feature. Moreover if we want to produce a
single
kernel image (at least for
On 03/11/2013 07:35 AM, Kukjin Kim wrote:
Tomasz Figa wrote:
Hi,
I'm wondering why Exynos5250 has not been migrated to use pinctrl yet.
Support for it in pinctrl-samsung driver has been already merged, but I
don't see any pinctrl nodes in exynos5250.dtsi.
This is important because the
On 03/11/2013 10:24 AM, Ludovic Desroches wrote:
On Fri, Mar 08, 2013 at 06:44:54PM +0100, Marc Kleine-Budde wrote:
On 03/08/2013 06:30 PM, ludovic.desroc...@atmel.com wrote:
From: Ludovic Desroches ludovic.desroc...@atmel.com
SAMA5D3 devices also embed CAN feature. Moreover if we want to
Removed interrupt-parent property from dts file as it is already
with root node in dtsi file.
Signed-off-by: Vishwanathrao Badarkhe, Manish manish...@ti.com
---
:100644 100644 f624dc8... 36e839a... M arch/arm/boot/dts/omap3-beagle.dts
:100644 100644 e8ba1c2... a5375fd... M
On Sun, Mar 10, 2013 at 07:33:07PM +0100, Markus Pargmann wrote:
Adding a soc-audio sound driver internally uses snd_soc_register_device,
which tries to bind it with the codec. The adding of the driver is
deferred because the codec driver is not loaded.
This patch changes the order of
On Mon, Mar 11, 2013 at 07:39:47AM +0530, Naveen Krishna Chatradhi wrote:
This patch adds the support to work as a iio device.
iio_get_channel and iio_raw_read works.
During the probe ntc driver gets the respective channels of ADC
and uses iio_raw_read calls to get the ADC converted value.
On Mon, Mar 11, 2013 at 05:21:44AM -0700, Guenter Roeck wrote:
On Mon, Mar 11, 2013 at 07:39:46AM +0530, Naveen Krishna Chatradhi wrote:
This patch adds the DT support to NTC driver to parse the
platform data.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Booting 3.9-rc2 on omap 4430sdp results in the following error
omap_i2c 4807.i2c: did not get pins for i2c error: -19
[1.024261] omap_i2c 4807.i2c: bus 0 rev0.12 at 100 kHz
[1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[1.037384] omap_i2c 48072000.i2c:
Booting 3.9-rc2 on omap 5430evm results in the following error
omap_i2c 4807.i2c: did not get pins for i2c error: -19
[1.024261] omap_i2c 4807.i2c: bus 0 rev0.12 at 100 kHz
[1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[1.037384] omap_i2c 48072000.i2c:
Booting 3.9-rc2 on omap4 panda results in the following error
[0.27] omap_i2c 4807.i2c: did not get pins for i2c error: -19
[0.445770] omap_i2c 4807.i2c: bus 0 rev0.11 at 400 kHz
[0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[0.474670] omap_i2c
From: Felipe Balbi ba...@ti.com
Add all 4 mcspi instances to omap5.dtsi file.
Cc: Andrew Morton a...@osdl.org
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 40
1 files
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Remove duplicated include.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
arch/microblaze/pci/pci-common.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Using for_each_set_bit() to simplify the code.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/pinctrl/pinctrl-sirf.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Use for_each_compatible_node() macro instead of open coding it.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
arch/powerpc/include/asm/parport.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
Hi Sourav,
On 03/11/2013 02:44 PM, Sourav Poddar wrote:
Hi Tony/Benoit,
These patches had been sent couple of times before, but there were no
comments on it.
Sorry for that. I got a big flu in Jan and was in Linaro Connect last week.
Patches look good, I just have to check that they apply
From: Wei Yongjun yongjun_...@trendmicro.com.cn
The variable 'mmc' is initialized but never used
otherwise, so remove the unused variable.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/mmc/host/wmt-sdmmc.c | 2 --
1 file changed, 2 deletions(-)
diff --git
Hi Sylwester
Thanks for continuing this work! You have made a great progress compared
to my initial version, and I should really have looked at each your
submitted new revision, unfortunately, I haven't managed that. So, sorry
for chiming back in so late in the game, but maybe we still manage
On 03/11/2013 10:17 AM, Ludovic Desroches wrote:
On Fri, Mar 08, 2013 at 06:44:05PM +0100, Marc Kleine-Budde wrote:
On 03/08/2013 06:30 PM, ludovic.desroc...@atmel.com wrote:
From: Ludovic Desroches ludovic.desroc...@atmel.com
Add device tree support.
Signed-off-by: Ludovic Desroches
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Use the module_i2c_driver() macro to make the code smaller
and a bit simpler.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/usb/misc/usb3503.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git
On 02/05/2013 08:26 AM, Felipe Balbi wrote:
Hi,
On Mon, Feb 04, 2013 at 05:58:48PM +0200, Roger Quadros wrote:
The PHY clock, clock rate, VCC regulator and RESET regulator
can now be provided via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
On 03/11/2013 09:40 AM, Roger Quadros wrote:
On 03/08/2013 05:45 PM, Marc Kleine-Budde wrote:
On 03/08/2013 11:46 AM, Marc Kleine-Budde wrote:
On 02/04/2013 04:58 PM, Roger Quadros wrote:
The PHY clock, clock rate, VCC regulator and RESET regulator
can now be provided via device tree.
On 02/05/2013 10:43 AM, Roger Quadros wrote:
On 02/05/2013 11:09 AM, Felipe Balbi wrote:
On Tue, Feb 05, 2013 at 10:44:05AM +0200, Roger Quadros wrote:
diff --git a/include/linux/usb/nop-usb-xceiv.h
b/include/linux/usb/nop-usb-xceiv.h
index 3265b61..148d351 100644
---
On 03/11/2013 04:39 PM, Ludovic Desroches wrote:
On Mon, Mar 11, 2013 at 04:12:46PM +0100, Marc Kleine-Budde wrote:
On 03/11/2013 10:17 AM, Ludovic Desroches wrote:
On Fri, Mar 08, 2013 at 06:44:05PM +0100, Marc Kleine-Budde wrote:
On 03/08/2013 06:30 PM, ludovic.desroc...@atmel.com wrote:
Wolfram,
On Fri, Feb 15, 2013 at 11:46 AM, Doug Anderson diand...@chromium.org wrote:
The i2c-arbitrator-cros-ec driver implements the arbitration scheme
that the Embedded Controller (EC) on the ARM Chromebook expects to use
for bus multimastering. This i2c-arbitrator-cros-ec driver could
From: Wei Yongjun yongjun_...@trendmicro.com.cn
'data' is malloced in snd_soc_bytes_put() and should be freed
before leaving from the error handling cases, otherwise it will cause
memory leak.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
sound/soc/soc-core.c | 6 --
1 file
On Monday 04 February 2013, Haojian Zhuang wrote:
From: Qing Xu qi...@marvell.com
Add device tree support in max8925 backlight.
Signed-off-by: Qing Xu qi...@marvell.com
Signed-off-by: Haojian Zhuang haojian.zhu...@gmail.com
Sorry, but after finding a build warning in this patch, I looked
Thomas,
Thank you for doing this! :)
On Wed, Mar 6, 2013 at 4:36 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index 17dd951..434e440 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++
From: Ludovic Desroches ludovic.desroc...@atmel.com
Add device tree support.
Signed-off-by: Ludovic Desroches ludovic.desroc...@atmel.com
---
Changes in v2:
- code cleanup
- correct typo
.../devicetree/bindings/net/can/atmel-can.txt | 14
drivers/net/can/at91_can.c
On 03/11/2013 06:26 PM, ludovic.desroc...@atmel.com wrote:
From: Ludovic Desroches ludovic.desroc...@atmel.com
Add device tree support.
Signed-off-by: Ludovic Desroches ludovic.desroc...@atmel.com
---
Changes in v2:
- code cleanup
- correct typo
On 03/08/2013 08:25 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon Hunter jon-hun...@ti.com wrote:
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of RAM and uses the TWL4030 power management IC.
I think this board support should be in separate
On 03/10/2013 09:45 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon Hunter jon-hun...@ti.com wrote:
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of RAM and uses the TWL4030 power management IC.
Signed-off-by: Jon Hunter jon-hun...@ti.com
---
On 03/11/2013 06:13 PM, Jon Hunter wrote:
Hi Jon, thanks a lot for your feedback.
On 03/10/2013 12:18 PM, Javier Martinez Canillas wrote:
Besides being used to interface with external memory devices,
the General-Purpose Memory Controller can be used to connect
Pseudo-SRAM devices such as
On 3/10/2013 9:46 PM, Thierry Reding wrote:
On Sun, Mar 10, 2013 at 07:46:04PM -1000, Mitch Bradley wrote:
On 3/9/2013 8:55 PM, Jason Gunthorpe wrote:
On Sat, Mar 09, 2013 at 06:52:13PM -1000, Mitch Bradley wrote:
Okay, I think I finally get it. The Marvell root port bridge setup
registers
On 03/11/2013 12:57 PM, Javier Martinez Canillas wrote:
On 03/11/2013 06:13 PM, Jon Hunter wrote:
Hi Jon, thanks a lot for your feedback.
On 03/10/2013 12:18 PM, Javier Martinez Canillas wrote:
Besides being used to interface with external memory devices,
the General-Purpose Memory
On Sun, Mar 10, 2013 at 07:46:04PM -1000, Mitch Bradley wrote:
So it seems that we are faced with two requirements that are somewhat at
odds with one another.
1) Some of the root port bridge registers have to be accessed via config
space access functions so common PCI enumeration code will
(b) The discovery/enumeration code needs to access config space via
pci_ops. The root complex driver implements pci_ops based on a trivial
parsing of ranges (omitting irrelevant details):
pci_op_read(devfn, pos) {
loop_over_ranges_entries {
if (to_devfn(ranges_entry.child) ==
On 03/11/2013 07:11 PM, Jon Hunter wrote:
On 03/11/2013 12:57 PM, Javier Martinez Canillas wrote:
On 03/11/2013 06:13 PM, Jon Hunter wrote:
Hi Jon, thanks a lot for your feedback.
On 03/10/2013 12:18 PM, Javier Martinez Canillas wrote:
Besides being used to interface with external
This patch series is an initial version of a driver for the camera ISP
subsystem (FIMC-IS) embedded in Samsung Exynos4x12 SoCs.
The FIMC-IS subsystem is build around a ARM Cortex-A5 CPU that controls
its dedicated peripherals, like I2C, SPI, UART, PWM, ADC,... and the
ISP chain. There are 3
This patch adds the ISP I2C bus controller driver files.
Creating a standard I2C bus adapter, even if the driver doesn't
actually communicates with the hardware and it is instead used
by the ISP firmware running on the Cortex-A5, allows to use
standard hardware description in the device tree. As
This patch adds ISP processing parameters interface files.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/media/platform/s5p-fimc/fimc-is-param.c | 971 +
This subdev driver currently only handles an image sensor's
power supplies and reset signal. There is no any I2C communication
here as it is handled by the ISP's firmware.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
This patch adds a video capture node for the FIMC-IS ISP IP block
and Makefile/Kconfig to actually enable the driver's compilation.
The ISP video capture driver is still a work in progress.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/media/exynos4-fimc-is.txt | 41
1 file changed, 41 insertions(+)
create mode 100644
Create disabled links from the FIMC-LITE subdevs to the FIMC-IS-ISP
subdev and from FIMC-IS-ISP to all FIMC subdevs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/media/platform/s5p-fimc/fimc-mdevice.c | 78
On 3/11/2013 8:23 AM, Jason Gunthorpe wrote:
(b) The discovery/enumeration code needs to access config space via
pci_ops. The root complex driver implements pci_ops based on a trivial
parsing of ranges (omitting irrelevant details):
pci_op_read(devfn, pos) {
loop_over_ranges_entries {
Hi Fabio,
On Sun, Mar 10, 2013 at 03:47:10PM -0300, Fabio Estevam wrote:
Hi Markus,
On Sun, Mar 10, 2013 at 3:33 PM, Markus Pargmann m...@pengutronix.de wrote:
From: Sascha Hauer s.ha...@pengutronix.de
This device supports multiple rates as described in later AC97
standards. This
On Mon, Mar 11, 2013 at 11:10:11AM +, Mark Brown wrote:
On Sun, Mar 10, 2013 at 07:33:07PM +0100, Markus Pargmann wrote:
Adding a soc-audio sound driver internally uses snd_soc_register_device,
which tries to bind it with the codec. The adding of the driver is
deferred because the codec
Naveen,
On Sun, Mar 10, 2013 at 7:09 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
@@ -317,7 +346,7 @@ static int ntc_thermistor_get_ohm(struct ntc_data *data)
return data-pdata-read_ohm(data-pdev);
if (data-pdata-read_uV) {
- read_uV =
On 3/11/2013 8:15 AM, Jason Gunthorpe wrote:
On Sun, Mar 10, 2013 at 07:46:04PM -1000, Mitch Bradley wrote:
So it seems that we are faced with two requirements that are somewhat at
odds with one another.
1) Some of the root port bridge registers have to be accessed via config
space access
On Mon, Mar 11, 2013 at 11:50:19AM -1000, Mitch Bradley wrote:
However - the driver runs the core in a 'root port bridge mode' where
the config header register block you are looking at is inhibited. The
Marvell IP block requires software support to run in bridge mode. So
Marvell really
On 3/11/2013 1:25 PM, Jason Gunthorpe wrote:
On Mon, Mar 11, 2013 at 11:50:19AM -1000, Mitch Bradley wrote:
However - the driver runs the core in a 'root port bridge mode' where
the config header register block you are looking at is inhibited. The
Marvell IP block requires software support
Hi Guennadi,
On 03/11/2013 04:03 PM, Guennadi Liakhovetski wrote:
Hi Sylwester
Thanks for continuing this work! You have made a great progress compared
to my initial version, and I should really have looked at each your
submitted new revision, unfortunately, I haven't managed that. So, sorry
On Mon, Mar 11, 2013 at 23:23:32, Hunter, Jon wrote:
On 03/08/2013 08:25 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon Hunter jon-hun...@ti.com wrote:
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of RAM and uses the TWL4030 power
On Mon, 2013-03-11 at 22:36 +0800, Wei Yongjun wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
The variable 'mmc' is initialized but never used
otherwise, so remove the unused variable.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/mmc/host/wmt-sdmmc.c | 2
Adds support for High Speed I2C driver found in Exynos5 and later
SoCs from Samsung. This driver currently supports Auto mode.
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by:
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