On Wednesday 24 April 2013 09:58 PM, Mike Turquette wrote:
Quoting Nishanth Menon (2013-04-14 14:19:17)
Overall strategy introduced here is simple: a clock node described in
device tree blob is used to identify the exact clock provided in the
SoC specific data. This is then linked back using
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing uart_unregister_driver() and uninit before return
from mpc52xx_uart_init() in the error handling case.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/tty/serial/mpc52xx_uart.c | 11 ---
1 file changed,
From: Dan Carpenter dan.carpen...@oracle.com
Date: Thu, 25 Apr 2013 10:44:20 +0300
The changed variable should be a 64 bit type, otherwise it can't store
all the features. The way the code is now the test for whether
NETIF_F_RXCSUM changed is always false and we return immediately.
The changed variable should be a 64 bit type, otherwise it can't store
all the features. The way the code is now the test for whether
NETIF_F_RXCSUM changed is always false and we return immediately.
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
diff --git
On Thu, Apr 25, 2013 at 06:44:28AM +0100, Shawn Guo wrote:
On Wed, Apr 24, 2013 at 06:28:12PM +0100, Lorenzo Pieralisi wrote:
This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: Lorenzo Pieralisi
On Wed, Apr 24, 2013 at 08:58:20PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
[...]
+ - compatible:
+ Usage: required
+ Value type: string
+ Definition: should be one of:
+ arm,arm710t
+
2013/4/24 Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com:
HI,
The follow patch series switch the at91 to DT pre-processor
So we can use macro for AIC and Pinctrl instead of magic
ARM: at91: dt: switch to pre-processor (2013-04-24 22:54:39 +0800)
On 4/25/2013 1:26 PM, David Miller wrote:
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 22 Apr 2013 23:50:36 +0530
In earlier case phy fixup are added in board file as this is no more the case
so adding support for phy register fixup in Device Tree
Signed-off-by: Mugunthan V N
On Thu, Apr 25, 2013 at 11:35:20AM +0800, Shawn Guo wrote:
On Wed, Apr 24, 2013 at 09:45:40PM +0200, Sascha Hauer wrote:
Hi Markus,
On Wed, Apr 24, 2013 at 04:36:30PM +0200, Markus Pargmann wrote:
Add devicetree support for this audio soc fabric driver.
@@ -32,8 +35,12 @@ static
Hi Thomas,
On 23/04/13 16:09, Thomas Gleixner wrote:
On Tue, 23 Apr 2013, James Hogan wrote:
+pdc_write(priv, PDC_IRQ_ROUTE, irq_route);
+spin_unlock_irqrestore(priv-lock, flags);
+}
+
+static void perip_irq_unmask(struct irq_data *data)
+{
+struct pdc_intc_priv *priv =
On Sat, Apr 13, 2013 at 08:21:39AM +0400, Alexander Shiyan wrote:
+static void __init clps711x_add_gpio(void)
+{
+ const struct resource clps711x_gpio0_res[] = {
+ DEFINE_RES_MEM(PADR, SZ_1),
+ DEFINE_RES_MEM(PADDR, SZ_1),
+ };
...
Don't do this - this is
On Thu, Apr 18, 2013 at 4:17 PM, Lee Jones lee.jo...@linaro.org wrote:
Using the new DMA DT bindings and API, we can register the DMA40 driver
as Device Tree capable. Now, when a client attempts to allocate a
channel using the DMA DT bindings via its own node, we are able to parse
the request
On Thu, Apr 25, 2013 at 11:50:30AM +0800, Shawn Guo wrote:
On Wed, Apr 24, 2013 at 04:36:36PM +0200, Markus Pargmann wrote:
+/*
+ * Pointer to AC97 reset functions for specific boards
+ */
+#if IS_ENABLED(CONFIG_MACH_PCA100)
+extern void pca100_ac97_cold_reset(struct snd_ac97 *ac97);
On Thu, Apr 25, 2013 at 03:31:07PM +0400, Alexander Shiyan wrote:
On Sat, Apr 13, 2013 at 08:21:39AM +0400, Alexander Shiyan wrote:
+static void __init clps711x_add_gpio(void)
+{
+ const struct resource clps711x_gpio0_res[] = {
+ DEFINE_RES_MEM(PADR, SZ_1),
+
Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de
---
Documentation/devicetree/usage-model.txt | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/usage-model.txt
b/Documentation/devicetree/usage-model.txt
index ef9d06c..0efedaa
Hi Lukasz Majewski,
Sorry for late review but I am currently working on restructuring the
whole exynos thermal driver and this support of LDO can be added as
feature as not all socs support this. This is also suggested by
Eduardo. All your other patches looks fine.
Thanks,
Amit Daniel
On Thu,
On Wed, Apr 24, 2013 at 9:43 AM, Lee Jones lee.jo...@linaro.org wrote:
usb: musb: ux500: add device tree probing support
This patch will allow ux500-musb to be probed and configured solely from
configuration found in Device Tree.
Cc: Felipe Balbi ba...@ti.com
Cc: linux-...@vger.kernel.org
changes from v1 (for patch 2 and 3):
- add prefix linux for compatible property (for both tx and rx)
- rename spdif_transceiver.c to spdif_transmitter.c
- add bindings documentation
Marek Belisko (3):
ASoC: spdif_transceiver: Change driver filename to
spdif_transmitter.c.
ASoC:
Transceiver usually means receiver + transmitter. This codec can do only
transmit. Update driver accordingly.
Signed-off-by: Marek Belisko marek.beli...@streamunlimited.com
---
sound/soc/codecs/Makefile |2 +-
.../{spdif_transciever.c = spdif_transmitter.c} |0
Add devicetree support for this dummy audio soc driver.
Signed-off-by: Michal Bachraty michal.bachr...@streamunlimited.com
Signed-off-by: Marek Belisko marek.beli...@streamunlimited.com
---
.../bindings/sound/spdif-transmitter.txt | 10 ++
sound/soc/codecs/spdif_transmitter.c
Add devicetree support for this dummy audio soc driver.
Signed-off-by: Michal Bachraty michal.bachr...@streamunlimited.com
Signed-off-by: Marek Belisko marek.beli...@streamunlimited.com
---
.../devicetree/bindings/sound/spdif-receiver.txt | 10 ++
sound/soc/codecs/spdif_receiver.c
On Wed, Apr 24, 2013 at 4:47 PM, Tomasz Figa t.f...@samsung.com wrote:
On Wednesday 24 of April 2013 16:27:09 Linus Walleij wrote:
On Tue, Apr 23, 2013 at 2:09 PM, Tomasz Figa t.f...@samsung.com wrote:
On Tuesday 23 of April 2013 14:03:12 Linus Walleij wrote:
This does not apply to my devel
On Wed, Apr 24, 2013 at 01:50:49AM +0100, Laura Abbott wrote:
By default on ARM systems, the coherent DMA mask (lowest
address) is set to ~0 or 0x. Currently,
of_platform_device_create_pdata sets the coherent DMA mask to
32 bits. This prevents coherent dma allocations from
On Mon, Apr 22, 2013 at 2:37 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Mon, Apr 22, 2013 at 11:57:14AM +0200, Linus Walleij wrote:
Hi Mark, seeking an ACK on this to take it through the
ARM SoC tree.
Since the arm-soc tree is locked down now I may as well just apply it so
On Tuesday 23 April 2013, Tomasz Figa wrote:
This series intends to fix support for Universal C210 board in mainline.
Main difference from other boards based on Exynos 4210 is that hardware
revision of the SoC used on Universal C210 does not support MCT timers
and legacy PWM timers must be
On 24/04/13 15:51, James Hogan wrote:
On 24/04/13 14:26, Catalin Marinas wrote:
On 23 April 2013 17:06, James Hogan james.ho...@imgtec.com wrote:
It's certainly heading in that direction a lot. For this patchset I
could get away with dropping arch/metag/soc/*, and deal with anything
that
On Sun, Apr 21, 2013 at 9:13 PM, Rob Herring robherri...@gmail.com wrote:
From: Rob Herring rob.herr...@calxeda.com
ibmebus is the last remaining user of of_platform_driver and the
conversion to a regular platform driver is trivial.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc:
On 04/25/13 23:46, Arnd Bergmann wrote:
On Universal C210 board, both with and without DT:
Tested-by: Tomasz Figat.f...@samsung.com
Reviewed-by: Arnd Bergmanna...@arndb.de
Olof, Kgene, I think we should have this one in 3.10 since it fixes
a regression. It looks bigger than it really is
On Thu, 2013-04-25 at 03:56 -0400, David Miller wrote:
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 22 Apr 2013 23:50:36 +0530
In earlier case phy fixup are added in board file as this is no more the
case
so adding support for phy register fixup in Device Tree
Signed-off-by:
On 4/25/2013 6:33 AM, Catalin Marinas wrote:
On Wed, Apr 24, 2013 at 01:50:49AM +0100, Laura Abbott wrote:
By default on ARM systems, the coherent DMA mask (lowest
address) is set to ~0 or 0x. Currently,
of_platform_device_create_pdata sets the coherent DMA mask to
32 bits. This
On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
Ben, Can I have your Ack for this? The change is straightforward and
neither of the 2 drivers used the id parameter that is removed.
Didn't you get my mail about a compile failure caused by this patch ?
Or did you send an update that I
On Thu, Apr 25, 2013 at 10:13:34AM -0400, Eduardo Valentin wrote:
diff --git a/drivers/thermal/db8500_cpufreq_cooling.c
b/drivers/thermal/db8500_cpufreq_cooling.c
index 21419851..786d192 100644
--- a/drivers/thermal/db8500_cpufreq_cooling.c
+++ b/drivers/thermal/db8500_cpufreq_cooling.c
@@
On Thu, Apr 25, 2013 at 10:09:57AM -0700, Laura Abbott wrote:
I thought about this as well but in arch/arm/mm/mm.h:
#ifdef CONFIG_ZONE_DMA
extern phys_addr_t arm_dma_limit;
#else
#define arm_dma_limit ((phys_addr_t)~0)
#endif
arm_dma_limit is explicitly cast to phys_addr_t, which means
Iterating through subnodes with libfdt is a little painful to write as we
need something like this:
for (depth = 0, count = 0,
offset = fdt_next_node(fdt, parent_offset, depth);
(offset = 0) (depth 0);
offset = fdt_next_node(fdt, offset, depth)) {
if (depth == 1) {
Rob,
Can I get your ack on this binding or do you think we need to change
something?
Thanks,
Stephen
On 04/15/13 14:33, Stephen Boyd wrote:
On 04/15/13 14:20, Rob Herring wrote:
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd sb...@codeaurora.org wrote:
@@ -26,3 +30,52 @@ Example:
On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
Ben, Can I have your Ack for this? The change is straightforward and
neither of the 2 drivers used the id parameter that is removed.
Didn't you get my mail about a compile failure
On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
Ben, Can I have your Ack for this? The change is straightforward and
neither of the 2 drivers used the id parameter that is
On 04/25/2013 03:12 PM, Benjamin Herrenschmidt wrote:
On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
[...]
You need patch 2 of this series to fix this:
driver core: move to_platform_driver to platform_device.h
which as Arnd
On Thu, Apr 25, 2013 at 6:11 PM, Nathan Fontenot
nf...@linux.vnet.ibm.com wrote:
Hi Grant,
I finally got some time to play around with this on powerpc/pseries.
Everything looks the same in the device tree, though I am seeing an
issue with of_property_update(). The routine appears to work and
On 04/15/2013 04:33 PM, Stephen Boyd wrote:
On 04/15/13 14:20, Rob Herring wrote:
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd sb...@codeaurora.org wrote:
@@ -26,3 +30,52 @@ Example:
1 10 0xf08;
clock-frequency = 1;
};
+
+**
On 04/25/2013 07:27 AM, Uwe Kleine-König wrote:
Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de
---
Documentation/devicetree/usage-model.txt | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
Applied.
Thanks,
Rob
diff --git
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
Add asm/soc-tz1090/gpio.h with definitions to number all the GPIOs
available on-chip. This is for use by the pinctrl and GPIO drivers.
Signed-off-by: James Hogan james.ho...@imgtec.com
Usually the specific pins and
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC) registers.
Signed-off-by: James Hogan
On 04/25/13 14:47, Rob Herring wrote:
On 04/15/2013 04:33 PM, Stephen Boyd wrote:
On 04/15/13 14:20, Rob Herring wrote:
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd sb...@codeaurora.org wrote:
@@ -26,3 +30,52 @@ Example:
1 10 0xf08;
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated by
On 04/25/2013 05:48 PM, Stephen Boyd wrote:
On 04/25/13 14:47, Rob Herring wrote:
On 04/15/2013 04:33 PM, Stephen Boyd wrote:
On 04/15/13 14:20, Rob Herring wrote:
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd sb...@codeaurora.org wrote:
@@ -26,3 +30,52 @@ Example:
On 04/25/13 16:06, Rob Herring wrote:
On 04/25/2013 05:48 PM, Stephen Boyd wrote:
We don't really care about CNTFRQ because it's duplicated into each
view. We do care about CNTNSAR. Luckily the spec just works there in
the sense that we can use CNTTIDR in conjunction with CNTACRn and
On Wed, Apr 24, 2013 at 12:28 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
In order to extend the current cpu nodes bindings to newer CPUs
inclusive of AArch64 and to update support for older ARM CPUs this
patch updates device tree documentation for the cpu nodes bindings.
Main
Without WLAN we cannot switch omap4 to use device tree
only booting. This patch can be reverted when the
binding for wl12xx is added.
Cc: Luciano Coelho coe...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Tony
This is needed to get wl12xx working with device tree based
booting.
Note that we claim the various GPIO inputs in the regulator
as the proper muxing is needed to enable and disable the
regulator.
Also, we want to use non-removable instead of ti,non-removable
as the ti,non-removable also sets
This should work assuming the board-4430sdp.c works, but it seems
that I don't have the 1283 PG 2.21 connectivity device on
my blaze. Anybody got a spare connectivity device for blaze?
Also, if somebody has the schematics, please provide a patch
for the missing GPIO muxes for blaze, see the the
Hi Eduardo,
On 25 April 2013 21:58, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Eduardo,
Hello Lukasz,
On 25-04-2013 08:30, Lukasz Majewski wrote:
This patch series provide various fixes for TMU block.
First of all it fixes a problem with get_cpu_frequency() lockup at
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