On 20 June 2013 11:11, Rahul Sharma rahul.sha...@samsung.com wrote:
Adding information about clocks to mixer and hdmi dt
nodes. Also removed the updated fields for hpd property.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Please rebase you patch on top of [1] or fold this into it.
On 20 June 2013 11:11, Rahul Sharma rahul.sha...@samsung.com wrote:
Add hdmi, mixer, ddc device tree nodes for Exynos 5420 SoC.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 15 +++
arch/arm/boot/dts/exynos5420.dtsi
Quoting Linus Walleij (2013-06-09 03:55:47)
+static void pll_clk_disable(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_pll(hw);
+ u32 val;
+
+ return;
Is the early return intentional? Everything else looks good.
Acked-by: Mike Turquette mturque...@linaro.org
+
+
On Wednesday, June 19, 2013 9:43 PM, Arnd Bergmann wrote:
On Wednesday 19 June 2013, Jingoo Han wrote:
Then, do you mean the following?
static int __exit exynos_pcie_remove(struct platform_device *pdev)
{
struct pcie_port *pp = platform_get_drvdata(pdev);
ok Sachin. Thanks.
On Thu, Jun 20, 2013 at 12:08 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
On 20 June 2013 11:11, Rahul Sharma rahul.sha...@samsung.com wrote:
Add hdmi, mixer, ddc device tree nodes for Exynos 5420 SoC.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Thanks Chander,
I am posting v2 with the suggested changes.
regards,
Rahul Sharma.
On Thu, Jun 20, 2013 at 11:45 AM, Chander Kashyap
chander.kash...@linaro.org wrote:
On 20 June 2013 11:11, Rahul Sharma rahul.sha...@samsung.com wrote:
Add dt nodes and clocks for hdmi subsystem. It also add
Hi,
This series of patches introduces PCIe support for Samsung Exynos5440,
and is based on the latest 'linux-next' tree (20130619).
These patches was tested with Intel e1000e LAN card on Exynos5440.
This PATCH v6 follows:
* PATCH v5, sent on June, 13th 2013
* PATCH v4, sent on June, 12th 2013
Hi Rahul,
On Thursday 20 of June 2013 11:11:50 Rahul Sharma wrote:
Add pinctrl node for hdmi-hpd gpio pin to exynos5420
device tree files.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam siva.kal...@samsung.com
Signed-off-by: Jingoo Han
Enable PCIe support for Exynos5440 which has two PCIe controllers.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/Kconfig |1 +
arch/arm/mach-exynos/Kconfig |2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |8 ++
arch/arm/boot/dts/exynos5440.dtsi | 40 -
2 files changed, 47
Hi Rahul,
On Thursday 20 of June 2013 07:41:53 Rahul Sharma wrote:
Hi Tomasz, Lucas,
How does this patch look to you ? Please share your views.
Looks fine now. Have my
Reviewed-by: Tomasz Figa t.f...@samsung.com
for the whole series.
Best regards,
Tomasz
regards,
Rahul Sharma.
On
Dear Jingoo Han,
On Thu, 20 Jun 2013 16:12:24 +0900, Jingoo Han wrote:
- pinctrl {
+ pin_ctrl: pinctrl {
compatible = samsung,exynos5440-pinctrl;
I know I'm nitpicking, but isn't this change completely unrelated to
PCIe support?
Thomas
--
Thomas Petazzoni, Free
On 06/17/2013 07:29 AM, Linus Walleij wrote:
On Fri, May 31, 2013 at 9:34 AM, Michal Simek mon...@monstr.eu wrote:
On 05/31/2013 09:14 AM, Linus Walleij wrote:
It's OK, but fix the boolean member so as to just needing to
be present:
xlnx,is-dual;
Rather than
xlnx,is-dual = 1;
Surely
On Thursday, June 20, 2013 4:49 PM, Thomas Petazzoni wrote:
Dear Jingoo Han,
On Thu, 20 Jun 2013 16:12:24 +0900, Jingoo Han wrote:
- pinctrl {
+ pin_ctrl: pinctrl {
compatible = samsung,exynos5440-pinctrl;
I know I'm nitpicking, but isn't this change completely
Dear Jingoo Han,
On Thu, 20 Jun 2013 16:57:32 +0900, Jingoo Han wrote:
- pinctrl {
+ pin_ctrl: pinctrl {
compatible = samsung,exynos5440-pinctrl;
I know I'm nitpicking, but isn't this change completely unrelated to
PCIe support?
This change is related to PCIe
Hi Jingoo,
On Thursday 20 of June 2013 16:12:24 Jingoo Han wrote:
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |8 ++
On Thu, Jun 20, 2013 at 8:38 AM, Mike Turquette mturque...@linaro.org wrote:
Quoting Linus Walleij (2013-06-09 03:55:47)
+static void pll_clk_disable(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_pll(hw);
+ u32 val;
+
+ return;
Is the early return intentional?
On Thursday, June 20, 2013 5:04 PM, Tomasz Figa wrote:
Hi Jingoo,
On Thursday 20 of June 2013 16:12:24 Jingoo Han wrote:
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
---
Hi Oleksandr,
On Wed, Jun 19, 2013 at 03:24:02PM +0300, Oleksandr Kozaruk wrote:
From: Graeme Gregory g...@slimlogic.co.uk
The TWL6025 was never released beyond sample form and was replaced by
the PhoenixLite range of chips - TWL6032. Change the references to
reference the TWL6032 class and
Palmas has SMPS10 regulator which can generate two voltage level 3.75 and 5V.
This SMPS10 has two outputs OUT1 and OUT2 and having one input IN1.
SMPS10-OUT2 is always connected to SMPS10-IN1 via following logic:
- Through parasitic diode (no sw control)
- In bypass mode (bit configuration is
SMPS10 has two outputs OUT1 and OUT2 and have one input IN1.
SMPS10-OUT2 is connected to SMPS10-IN1 and can be configured either
in BOOST mode or BYPASS mode. regulator_enable of SMPS10-OUT2 configures
it in BOOST mode. For BYPASS mode regulator_allow_bypass() API can be
used. SMPS10-OUT1 is
Added a property to indicate if the regulator supports bypass mode.
Also modified of_get_regulation_constraints() to check for that
property and set appropriate constraints.
Cc: Laxman Dewangan ldewan...@nvidia.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Hi,
On Wed, Jun 19, 2013 at 11:27:46AM +0530, Keerthy wrote:
From: J Keerthy j-keer...@ti.com
The Patch series adds TPS659038 PMIC support in the palmas MFD and Regulator
drivers. The TPS659038 has almost the same registers as of the earlier
supported variants of PALMAS family such as the
On Thursday, June 20, 2013 5:00 PM, Thomas Petazzoni wrote:
Dear Jingoo Han,
On Thu, 20 Jun 2013 16:57:32 +0900, Jingoo Han wrote:
- pinctrl {
+ pin_ctrl: pinctrl {
compatible = samsung,exynos5440-pinctrl;
I know I'm nitpicking, but isn't this
Hi,
On Wed, Jun 19, 2013 at 11:27:49AM +0530, Keerthy wrote:
From: J Keerthy j-keer...@ti.com
The Patch adds TPS659038 PMIC support in the palmas mfd driver.
The TPS659038 has almost the same registers as of the earlier
supported variants of PALMAS family such as the TWL6035.
The
Hi,
On Monday 17 June 2013 09:39 AM, Chanwoo Choi wrote:
On 06/14/2013 10:10 PM, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by:
On Thursday 20 June 2013, Jingoo Han wrote:
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
___
devicetree-discuss mailing
Hi,
On Thu, Jun 20, 2013 at 04:34:42AM +, J, KEERTHY wrote:
-Original Message-
From: J, KEERTHY
Sent: Wednesday, June 19, 2013 11:28 AM
To: linux-o...@vger.kernel.org
Cc: broo...@kernel.org; J, KEERTHY; ldewan...@nvidia.com;
sa...@linux.intel.com;
On Thu, Jun 20, 2013 at 9:51 AM, Michal Simek mon...@monstr.eu wrote:
On 06/17/2013 07:29 AM, Linus Walleij wrote:
I think of_property_read_bool() will accept
xlnx,is-dual = 1; to mean the same as xlnx,is-dual;
try it.
First of all sorry for delay.
You are right that
On Thu, Jun 20, 2013 at 09:13:06AM +, J, KEERTHY wrote:
Could you please pull this patch?
I'm reverting this one for now as of_match_device is not define for
!CONFIG_OF.
So the of_match_device parts can come under #ifdef CONFIG_OF?
Nevermind, you were just missing an of_device.h
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated by device tree and supports interrupts for
all GPIOs.
Signed-off-by: James Hogan
Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.
These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate, drive-strength, and power-on-start (pos).
The pdc_gpio0 and pdc_gpio1 pins can also be muxed
This patchset adds GPIO and pin controller drivers for the TZ1090, for
both the general GPIOs/pins, and the low power (PDC) GPIOs/pins.
LinusW: Please consider taking these for v3.11. The pinctrl ones need to
go via your pinctrl tree due to the dependence on the new pinconf
bindings.
Changes in
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring
Hi,
This series of patches introduces PCIe support for Samsung Exynos5440,
and is based on the latest 'linux-next' tree (20130619).
These patches was tested with Intel e1000e LAN card on Exynos5440.
This PATCH v7 follows:
* PATCH v6, sent on June, 20th 2013
* PATCH v5, sent on June, 13th 2013
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam siva.kal...@samsung.com
Signed-off-by: Jingoo Han
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/exynos5440.dtsi | 38 +
1 file changed, 38 insertions(+)
diff
Enable PCIe support for Exynos5440 which has two PCIe controllers.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/Kconfig |1 +
arch/arm/mach-exynos/Kconfig |2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
This patch adds pcie controller node for exynos5440-ssdk5440,
and also adds a phandle for pin controller node.
Signed-off-by: Jingoo Han jg1@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |8
arch/arm/boot/dts/exynos5440.dtsi
On Thursday 20 of June 2013 17:25:12 Jingoo Han wrote:
On Thursday, June 20, 2013 5:04 PM, Tomasz Figa wrote:
Hi Jingoo,
On Thursday 20 of June 2013 16:12:24 Jingoo Han wrote:
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
2013/6/20 Alexey Brodkin alexey.brod...@synopsys.com:
[snip]
In general MDIO register gets polled by libphy once in a couple of
seconds, so delay of 25 milliseconds IMHO is fine.
+int arc_mdio_probe(struct device_node *dev_node, struct arc_emac_priv
*priv)
+{
+ snprintf(bus-id,
On Thursday, June 20, 2013 6:32 PM, Jingoo Han wrote:
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam
On Thursday 20 June 2013, Jingoo Han wrote:
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam
On Thursday 20 June 2013, Jingoo Han wrote:
2. patch adding label to the pinctrl node (which is a prerequisite) and
board-specific properties of PCIe nodes.
[PATCH] ARM: dts: Add pcie controller node for exynos5440-ssdk5440
arch/arm/boot/dts/exynos5440-ssdk5440.dts
+
+
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM, Arnd Bergmann wrote:
On Wednesday 12 June 2013 19:19:05 Jingoo Han wrote:
+
+/* synopsis specific PCIE configuration registers*/
+#define
On 6/14/2013 3:50 PM, Philip Avinash wrote:
From: KV Sujith sujit...@ti.com
- Add of_device_id for Davinci GPIO driver.
- Add function to populate data from DT.
- Modify the probe to read from DT if DT match is found.
- Add DT binding documentation for Davinci GPIO properties in a new file
2013/6/20 Alexey Brodkin alexey.brod...@synopsys.com:
On 06/20/2013 01:57 PM, Florian Fainelli wrote:
2013/6/20 Alexey Brodkin alexey.brod...@synopsys.com:
[snip]
In general MDIO register gets polled by libphy once in a couple of
seconds, so delay of 25 milliseconds IMHO is fine.
+int
On Thursday 20 June 2013 02:07 PM, Kishon Vijay Abraham I wrote:
SMPS10 has two outputs OUT1 and OUT2 and have one input IN1.
SMPS10-OUT2 is connected to SMPS10-IN1 and can be configured either
in BOOST mode or BYPASS mode. regulator_enable of SMPS10-OUT2 configures
it in BOOST mode. For BYPASS
On Thursday, June 20, 2013 6:59 PM, Pratyush Anand wrote:
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM, Arnd Bergmann wrote:
On Wednesday 12 June 2013 19:19:05 Jingoo Han wrote:
+
+/* synopsis
On 06/20/2013 11:23 AM, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 9:51 AM, Michal Simek mon...@monstr.eu wrote:
On 06/17/2013 07:29 AM, Linus Walleij wrote:
I think of_property_read_bool() will accept
xlnx,is-dual = 1; to mean the same as xlnx,is-dual;
try it.
First of all sorry for
On Thursday, June 20, 2013 7:17 PM, Arnd Bergmann wrote:
On Thursday 20 June 2013, Jingoo Han wrote:
2. patch adding label to the pinctrl node (which is a prerequisite) and
board-specific properties of PCIe nodes.
[PATCH] ARM: dts: Add pcie controller node for exynos5440-ssdk5440
On 6/14/2013 3:15 PM, Philip Avinash wrote:
Replace /include/ by #include for da850 device tree files, in order to
use the C pre-processor, making use of #define features possible.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Added this to my v3.11/dt branch.
Thanks,
Sekhar
On 06/10/2013 09:14 AM, Tushar Behera wrote:
On 06/08/2013 05:22 PM, Tomasz Figa wrote:
Hi Tushar,
On Thursday 06 of June 2013 16:32:52 Tushar Behera wrote:
Cpufreq driver for EXYNOS4210 is not a platform driver, hence it is not
possible to provide the regulator supply name through DT
On Thu, Jun 20, 2013 at 02:07:37PM +0530, Kishon Vijay Abraham I wrote:
Added a property to indicate if the regulator supports bypass mode.
Also modified of_get_regulation_constraints() to check for that
property and set appropriate constraints.
Applied, thanks.
signature.asc
Description:
Hi,
On 6/20/2013 4:28 PM, Jingoo Han wrote:
On Thursday, June 20, 2013 6:59 PM, Pratyush Anand wrote:
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM, Arnd Bergmann wrote:
On Wednesday 12 June 2013 19:19:05
On Thu, Jun 20, 2013 at 12:59 PM, Michal Simek mon...@monstr.eu wrote:
On 06/20/2013 11:23 AM, Linus Walleij wrote:
What about something like this:
static bool is_dual (struct device_node *np)
{
struct property *prop = of_find_property(np, xlnx,is-dual, NULL);
int ret;
u32
On Thursday, June 20, 2013 8:26 PM, Pratyush Anand wrote:
On 6/20/2013 4:28 PM, Jingoo Han wrote:
On Thursday, June 20, 2013 6:59 PM, Pratyush Anand wrote:
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM,
On Thursday 20 of June 2013 20:04:47 Jingoo Han wrote:
On Thursday, June 20, 2013 7:17 PM, Arnd Bergmann wrote:
On Thursday 20 June 2013, Jingoo Han wrote:
2. patch adding label to the pinctrl node (which is a prerequisite)
and
board-specific properties of PCIe nodes.
On 06/20/2013 01:40 AM, Benoit Cousson wrote:
On 06/19/2013 09:05 AM, Roger Quadros wrote:
On 06/19/2013 03:23 PM, Benoit Cousson wrote:
On 06/19/2013 07:05 AM, Florian Vaussard wrote:
Hello,
On 06/19/2013 01:03 PM, Roger Quadros wrote:
On 06/19/2013 01:10 PM, Benoit Cousson wrote:
On
Include *.dtsi files from *.dts using the preprocessor to set a good
example for future device tree files. Files included in the old way
don't get pre-processed.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: devicetree-discuss@lists.ozlabs.org
---
arch/metag/boot/dts/skeleton.dts |
Add symlink to include/dt-bindings from arch/metag/boot/dts/include/ to
match the one in arch/arm/... (see the commit below) so that
preprocessed device tree files can include various useful constant
definitions.
Commit c58299aa87544a590c62bda0bf52b69fa56cb8d5 (kbuild: create an
include chroot
On 06/20/2013 01:33 PM, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 12:59 PM, Michal Simek mon...@monstr.eu wrote:
On 06/20/2013 11:23 AM, Linus Walleij wrote:
What about something like this:
static bool is_dual (struct device_node *np)
{
struct property *prop = of_find_property(np,
Hi,
This series of patches introduces PCIe support for Samsung Exynos5440,
and is based on the latest 'linux-next' tree (20130619).
These patches was tested with Intel e1000e LAN card on Exynos5440.
This PATCH v8 follows:
* PATCH v7, sent on June, 20th 2013
* PATCH v6, sent on June, 20th 2013
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam siva.kal...@samsung.com
Signed-off-by: Jingoo Han
Enable PCIe support for Exynos5440 which has two PCIe controllers.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/Kconfig |1 +
arch/arm/mach-exynos/Kconfig |2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/exynos5440.dtsi | 38 +
1 file changed, 38 insertions(+)
diff
On 18/06/13 10:05, Linus Walleij wrote:
On Tue, Jun 18, 2013 at 10:51 AM, James Hogan james.ho...@imgtec.com wrote:
Should we be standardizing the pins/groups/function properties too,
since the strings are pretty much passed straight through? The usage
seems pretty similar between the
This patch adds pcie controller node for exynos5440-ssdk5440,
and also adds a phandle for pin controller node.
Signed-off-by: Jingoo Han jg1@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |8
arch/arm/boot/dts/exynos5440.dtsi
Provide RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device. Provide
pin multiplexer information for USB host pins.
We also relocate omap3_pmx_core pin definations so that they
are close to omap3_pmx_wkup pin definations.
NOTE: The reset control will be replaced
Hi Benoit,
Patch 1 adds USB host support for beagle-XM.
Patch 2 cleans up pin comments for USB host pins.
Changes in v4:
- Rebased to todays for_3.11/dts branch
- added disclaimer about temporary usage of regulator framework for
GPIO RESET lines.
cheers,
-roger
Roger Quadros (2):
ARM: dts:
On Sun, Jun 16, 2013 at 11:05:53PM -0500, Timur Tabi wrote:
Markus Pargmann wrote:
Hi,
This series adds DT support for phycore-ac97. Beside ac97 support, the
series
adds imx-pcm-fiq and generic DMA bindings to fsl-ssi.
In version 8 I fixed the build issues by seperating the DT
I2C nodes shares many properties across exynos5 SoCs (exynos5250
and exyno5420). Common code is moved to exynos5.dtsi which is
included in exyno5250 and exynos5420 SoC files.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi| 36
From: Andrew Bresticker abres...@chromium.org
This adds device-tree nodes for the i2c busses on Exynos
5420 platforms.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 32
Hdmi Subsystem nodes shares many properties across exynos5 SoCs
(exynos5250 and exyno5420). Common code is moved to exynos5.dtsi
which is included in exyno5250 and exynos5420 SoC files.
It also renames the hdmi and mixer nodes as per dt naming
convention in the format name@phy_add.
On Mon, Jun 17, 2013 at 10:36:57AM +0800, Shawn Guo wrote:
On Sun, Jun 16, 2013 at 03:25:06PM +0200, Markus Pargmann wrote:
Markus Pargmann (11):
ASoC: imx-pcm-dma: DT support
ASoC: imx-pcm-fiq: Introduce pcm-fiq-params
ASoC: fsl: Move soc_ac97_ops from imx-ssi to
Add hdmi, mixer, ddc device tree nodes for Exynos 5420 SoC.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 20
arch/arm/boot/dts/exynos5420.dtsi |8
2 files changed, 28 insertions(+)
diff --git
From: Sachin Kamat sachin.ka...@linaro.org
Exynos SoCs use pinctrl to configure GPIOs. Update the document
to reflect this change.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Documentation/devicetree/bindings/video/exynos_hdmi.txt
Adding information about clocks to the binding documentation
for exynos mixer and hdmi.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Documentation/devicetree/bindings/video/exynos_hdmi.txt | 14 +-
Documentation/devicetree/bindings/video/exynos_mixer.txt |4
2
On Thursday 20 June 2013, Jingoo Han wrote:
diff --git a/Documentation/devicetree/bindings/pci/exynos-pcie.txt
b/Documentation/devicetree/bindings/pci/exynos-pcie.txt
new file mode 100644
index 000..f71d835
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/exynos-pcie.txt
@@
fsl_ssi and imx-ssi can be both enabled at the same time. To be able to
add AC97 support to fsl_ssi, soc_ac97_ops have to be available to both
drivers.
fsl_ssi has DT support and should be the only driver at some point in
the future. This patch moves the definition of soc_ac97_ops to fsl_ssi.
This patch copies some parts from imx-ssi to support AC97 on
imx27-pca100 and imx35-pcm043. This is a implementation of the
ac97-slave mode.
For ac97, the registers have to be setup earlier than for other ssi
modes because there is some communication with the external device
before actual
Add support for non-dma pcm for imx platforms with imx-pcm-fiq support.
Instead of imx-pcm-audio, in this case imx-pcm-fiq-audio device is added
and the SIER flags are set differently.
We need imx-pcm-fiq for some boards that use an incompatible codec.
imx-pcm-fiq handles those codecs differently
There may be some platforms using fsl-ssi that do not have a DMA driver
with generic DMA bindings. So this patch adds support for the generic
DMA bindings, while still accepting the old fsl,dma-events property if
dmas is not found.
Signed-off-by: Markus Pargmann m...@pengutronix.de
Tested-by:
Add devicetree support for phycore-ac97 driver in a seperated driver for
DT loading. The seperation reduces the confusion with the old style
initialization of this driver via late_initcall. Also this driver is
using fsl-ssi instead of imx-ssi.
platform_of_node and cpu_of_node are set according to
Hi,
This series adds DT support for phycore-ac97. Beside ac97 support, the series
adds imx-pcm-fiq and generic DMA bindings to fsl-ssi.
Version 9 contains some style fixes.
Regards,
Markus
Changes in v9:
- Style and compile fixes.
- Removed ASoC: fsl: Kconfig: Use fsl-ssi for phycore-ac97.
This patch removes the NO_DT flag. The pdev pointer may have a proper
of_node with the dmas property, so we can use it to request DMA
channels.
Signed-off-by: Markus Pargmann m...@pengutronix.de
Tested-by: Shawn Guo shawn@linaro.org
---
Notes:
Changes in v6:
- After rebasing onto
Update the fsl-ssi bindings. DMA is no required property anymore and
uses the generic DMA bindings. imx-fiq is a new alternative to DMA
Signed-off-by: Markus Pargmann m...@pengutronix.de
Tested-by: Shawn Guo shawn@linaro.org
---
Notes:
Changes in v9:
- Remove space before tab
Cleaner parameter passing for imx-pcm-fiq. Create a seperated fiq-params
struct to pass all arguments.
Signed-off-by: Markus Pargmann m...@pengutronix.de
Tested-by: Shawn Guo shawn@linaro.org
---
Notes:
Changes in v9:
- Remove semicolon in function
Changes in v7:
- Fix
Signed-off-by: Markus Pargmann m...@pengutronix.de
Tested-by: Shawn Guo shawn@linaro.org
---
arch/arm/mach-imx/mach-pca100.c | 7 +--
arch/arm/mach-imx/mach-pcm043.c | 7 +--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-imx/mach-pca100.c
Hi,
On Thursday 20 June 2013 04:22 PM, Laxman Dewangan wrote:
On Thursday 20 June 2013 02:07 PM, Kishon Vijay Abraham I wrote:
SMPS10 has two outputs OUT1 and OUT2 and have one input IN1.
SMPS10-OUT2 is connected to SMPS10-IN1 and can be configured either
in BOOST mode or BYPASS mode.
From: Stuart Menefy stuart.men...@st.com
This is a simple driver for the global timer module found in the Cortex
A9-MP cores from revision r1p0 onwards. This should be able to perform
the functions of the system timer and the local timer in an SMP system.
The global timer has the following
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
CC: Stephen Gallimore stephen.gallim...@st.com
CC: Stuart Menefy
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx Tx functionality.
It support all industry standard baud
This patch add pinctrl support to ST SoCs.
About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.
Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
CC: Stephen Gallimore stephen.gallim...@st.com
CC: Stuart Menefy stuart.men...@st.com
CC: Arnd Bergmann a...@arndb.de
CC: Linus
This patch is generated after re-running savedefconfig on top of
multi_v7_defconfig which gets rid of some of the options, as they are
now slected by mach level or other Kconfigs.
The reason to generate this patch is because, it becomes confusing when
some of these options dissapear as part of
This patch adds stih415 and stih416 support to multi_v7_defconfig.
CONFIG_ARM_ERRATA_754322 is removed as it is selected by the sti
mach level kconfig.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
arch/arm/configs/multi_v7_defconfig |4 +++-
1 files changed, 3
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with
standard set-top box IPs.
This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED.
Signed-off-by: Srinivas
Thanks Roger,
I'll take them for 3.12. I was already late for my 3.11 pull request.
Regards,
Benoit
Texas Instruments France SA, 821 Avenue Jack Kilby, 06270 Villeneuve Loubet.
036 420 040 R.C.S Antibes. Capital de EUR 12.654.784
-Original Message-
From: Quadros, Roger
Sent:
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