On Wednesday 19 June 2013 02:52 AM, Sylwester Nawrocki wrote:
Hi Kishon,
I've noticed there is a little inconsistency between the code and documentation.
On 06/13/2013 10:43 AM, Kishon Vijay Abraham I wrote:
+3. Creating the PHY
+
+The PHY driver should create the PHY in order for other
Hi,
On Mon, Jun 24, 2013 at 11:01:56AM +0530, Kishon Vijay Abraham I wrote:
@@ -397,9 +407,10 @@ static int omap2430_musb_init(struct musb *musb)
if (glue-status != OMAP_MUSB_UNKNOWN)
omap_musb_set_mailbox(glue);
- usb_phy_init(musb-xceiv);
+ phy_init(musb-phy);
On 06/20/2013 08:57 PM, Alexandre Belloni wrote:
The Nuvoton NAU7802 ADC is a 24-bit 2-channels I2C ADC, with adjustable
gain and sampling rates.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx Tx
* Tero Kristo t-kri...@ti.com [130624 00:51]:
On 06/21/2013 10:25 AM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [130619 06:25]:
Now that the OMAP4 PRCM clock data has been converted to device tree
representation, it is no longer needed as static clock data. OMAP4
clock init routine
Hi Prabhakar,
On Sat June 22 2013 17:03:03 Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
This patch adds video sync properties as part of endpoint
properties and also support to parse them in the parser.
Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com
Cc:
Thankyou for the comments.
On 21/06/13 16:56, Thomas Gleixner wrote:
On Fri, 21 Jun 2013, Srinivas KANDAGATLA wrote:
+static void gt_clockevent_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *clk)
+{
+unsigned long ctrl;
+
+ctrl =
On Wed, Jun 19, 2013 at 11:58 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 06/11/2013 04:03 PM, Laurent Pinchart wrote:
+- tristate: A boolean, put the pin into high impedance state when set.
The other patch defines bias-high-impedance which is more likely
to be the string used.
Anyway:
s5m8767 regulator is used on Exynos platforms which use pin controller
to configure GPIOs. Update the example accordingly.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../bindings/regulator/s5m8767-regulator.txt | 12 ++--
1 file changed, 6 insertions(+), 6
On Thu, Jun 20, 2013 at 12:10 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 06/14/2013 09:42 AM, Heiko Stübner wrote:
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-low-power-mode
On Thu, Jun 20, 2013 at 2:12 PM, Michal Simek mon...@monstr.eu wrote:
xlnx,is-dual is always present in the HW and in all DTSes and it
is generated for several years
Based on my experience with hardware guys what happen when they add
new channel is that they will use xlnx,is-dual = 2 for 3
Hi!
On 05/28/2013 05:08 PM, ext Jean-Christophe PLAGNIOL-VILLARD wrote:
Today in the current of implementation we populate all the ressources
at of_platform_populate time. But this leed to a chicken-egg dilemat
some the irq present in DT are from platform_device too. And you can
not resolve
On 6/21/2013 3:23 PM, Sekhar Nori wrote:
From: Matt Porter mpor...@ti.com
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default
* Sekhar Nori nsek...@ti.com [130621 03:21]:
On 6/21/2013 2:36 AM, Joel A Fernandes wrote:
From: Matt Porter mpor...@ti.com
Enable TI EDMA option on OMAP and TI_PRIV_EDMA
Signed-off-by: Matt Porter mpor...@ti.com
Signed-off-by: Joel A Fernandes joelag...@ti.com
This will have to
Hi,
For merging this series, I suggest the following sets:
* Joel A Fernandes joelag...@ti.com [130620 14:13]:
Joel A Fernandes (3):
edma: config: Enable config options for EDMA
da8xx: config: Enable MMC and FS options
ARM: davinci: Fix compiler warnings in devices-da8xx
Matt
On 6/24/2013 3:47 PM, Tony Lindgren wrote:
* Sekhar Nori nsek...@ti.com [130621 03:21]:
On 6/21/2013 2:36 AM, Joel A Fernandes wrote:
From: Matt Porter mpor...@ti.com
Enable TI EDMA option on OMAP and TI_PRIV_EDMA
Signed-off-by: Matt Porter mpor...@ti.com
Signed-off-by: Joel A Fernandes
On 06/21/2013 08:58 PM, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe
On 6/22/2013 3:23 AM, Joel A Fernandes wrote:
Hi Arnd,
On Fri, Jun 21, 2013 at 1:44 PM, Arnd Bergmann a...@arndb.de wrote:
On Friday 21 June 2013, Joel A Fernandes wrote:
I think we are talking about different things, I agree the 'select
DMADEVICES' can be dropped but lets please keep the
On 6/24/2013 4:53 PM, Sekhar Nori wrote:
On 6/22/2013 3:23 AM, Joel A Fernandes wrote:
Hi Arnd,
On Fri, Jun 21, 2013 at 1:44 PM, Arnd Bergmann a...@arndb.de wrote:
On Friday 21 June 2013, Joel A Fernandes wrote:
I think we are talking about different things, I agree the 'select
DMADEVICES'
Sourav,
On 6/24/2013 3:49 PM, Tony Lindgren wrote:
Hi,
For merging this series, I suggest the following sets:
* Joel A Fernandes joelag...@ti.com [130620 14:13]:
spi: omap2-mcspi: add generic DMA request support to the DT binding
spi: omap2-mcspi: convert to
Hi,
On Thu, Jun 20, 2013 at 04:35:16PM +0530, J Keerthy wrote:
The Patch adds TPS659038 PMIC support in the palmas mfd driver.
The TPS659038 has almost the same registers as of the earlier
supported variants of PALMAS family such as the TWL6035.
The critical differences between TPS659038
Hi Sekhar,
On Tue, May 21, 2013 at 19:38:02, Manjunathappa, Prakash wrote:
function-mask property is a mask for a pin at each pin configure offset
in a pincontrol register.
Got 1/3 and 2/3 accepted, I do not know if this gets merged via DaVinci tree or
pincontrol tree. Could you please
On Monday 24 June 2013 05:09 PM, Sekhar Nori wrote:
Sourav,
On 6/24/2013 3:49 PM, Tony Lindgren wrote:
Hi,
For merging this series, I suggest the following sets:
* Joel A Fernandesjoelag...@ti.com [130620 14:13]:
spi: omap2-mcspi: add generic DMA request support to the DT binding
On 6/22/2013 8:23 AM, Joel A Fernandes wrote:
config TI_EDMA
tristate TI EDMA support
default m if 'ARCH_DAVINCI || ARCH_OMAP1 || ARCH_OMAP2
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
MMC depends on EDMA specially on AM33xx there's no PIO mode AFAIK. The
Hi Linus,
On 06/17/2013 11:13 AM, Linus Walleij wrote:
On Mon, Jun 17, 2013 at 8:21 AM, Michal Simek mon...@monstr.eu wrote:
On 06/17/2013 07:50 AM, Linus Walleij wrote:
On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com
wrote:
+- xlnx,tri-default : if n-th bit is 1,
On Fri, Jun 21, 2013 at 3:41 PM, Srinivas KANDAGATLA
srinivas.kandaga...@st.com wrote:
Hi Linus W,
If its not too late can this patch be considered for 3.11 via pinctrl tree?
There is a build dependecy with regmap_field apis pulled by Mark Brown
in regmap repository.
This seems fairly
From: Matt Porter mpor...@ti.com
The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter mpor...@ti.com
Signed-off-by: Joel A Fernandes joelag...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Documentation/devicetree/bindings/spi/omap-spi.txt
On Sat, Jun 22, 2013 at 12:44 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 06/13/2013 02:59 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
This is identical to of_parse_phandle_with_args(), except that the
number of argument cells is fixed, rather than being parsed
Hi Tomasz,
Thanks for the review.
On 06/23/2013 12:12 PM, Tomasz Figa wrote:
On Friday 21 of June 2013 14:50:17 Sylwester Nawrocki wrote:
Add separate nodes for the CAMCLK pin and turn off pull-up on camera
ports A, B. The video bus pins and the clock output (CAMCLK) pin need
separate nodes
On 24/06/13 12:57, Linus Walleij wrote:
On Fri, Jun 21, 2013 at 3:41 PM, Srinivas KANDAGATLA
srinivas.kandaga...@st.com wrote:
Hi Linus W,
If its not too late can this patch be considered for 3.11 via pinctrl tree?
There is a build dependecy with regmap_field apis pulled by Mark Brown
in
On Sun, Jun 23, 2013 at 10:51:10AM +0200, Markus Pargmann wrote:
spll_gate was added with commit b7eed2076183994dbda2c19bc7fba99b65a135e3
ARM: imx27: add a clock gate to activate SPLL clock.
spll_gate is missing in the devicetree clock documentation for imx27. This
patch adds it to the list
On Thu, 20 Jun 2013 10:26:28 +0100, James Hogan james.ho...@imgtec.com wrote:
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated
On Mon, Jun 24, 2013 at 01:57:56PM +0200, Linus Walleij wrote:
This seems fairly complete, but I cannot have such a basic dependency onto
the regmap tree this late in the merge window, i.e. I'm not ready to pull
all of regmap into the pinctrl tree. I'd consider this for merging
for the next
On 24/06/13 14:34, Grant Likely wrote:
On Thu, 20 Jun 2013 10:26:28 +0100, James Hogan james.ho...@imgtec.com
wrote:
diff --git a/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
b/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
new file mode 100644
index 000..e017d4b
---
On Mon, Jun 24, 2013 at 6:53 AM, Sekhar Nori nsek...@ti.com wrote:
On 6/22/2013 8:23 AM, Joel A Fernandes wrote:
config TI_EDMA
tristate TI EDMA support
default m if 'ARCH_DAVINCI || ARCH_OMAP1 || ARCH_OMAP2
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
MMC
On Thu, Jun 20, 2013 at 11:26 AM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC) registers.
Signed-off-by: James Hogan
On Thu, Jun 20, 2013 at 11:26 AM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.
These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate,
On Mon, Jun 24, 2013 at 05:31:59PM +0530, Sourav Poddar wrote:
The binding definition is based on the generic DMA request binding
Applied, thanks.
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On Thu, Jun 20, 2013 at 11:26 AM, James Hogan james.ho...@imgtec.com wrote:
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan
On Mon, Jun 24, 2013 at 03:06:57PM +0530, Sachin Kamat wrote:
s5m8767 regulator is used on Exynos platforms which use pin controller
to configure GPIOs. Update the example accordingly.
This smells bad, why does a driver using GPIOs through the GPIO API see
a change in the binding?
On 24/06/13 15:48, James Hogan wrote:
On 24/06/13 14:34, Grant Likely wrote:
Similarly, can this driver use the generic irq chip to eliminate the
above hooks?
hmm, I could probably get away with it for irq callbacks since a bank's
IRQ cannot be shared with non-Linux threads/cores.
I just
On 24/06/13 16:04, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 11:26 AM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC)
From: Stuart Menefy stuart.men...@st.com
This is a simple driver for the global timer module found in the Cortex
A9-MP cores from revision r1p0 onwards. This should be able to perform
the functions of the system timer and the local timer in an SMP system.
The global timer has the following
On 06/22/2013 12:23 PM, Jon Loeliger wrote:
Great! I didn't see any objections, and the week is basically over.
Are we good for a release today?
Hear Ye! Hear Ye!
With a Mandate from the Masses for a tagged release,
your wish has finally been granted!
Excellent! Thank you very much. I
Hi Hans,
Thanks for the review.
On Mon, Jun 24, 2013 at 1:21 PM, Hans Verkuil hverk...@xs4all.nl wrote:
Hi Prabhakar,
On Sat June 22 2013 17:03:03 Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
This patch adds video sync properties as part of endpoint
properties and
On Monday 24 June 2013 16:49:08 zhangfei gao wrote:
Dear Arnd Vinod
The suggestion of using dma_get_slave_channel instead of filter works here.
Dma driver should modify accordingly.
The changes all look good to me, thanks a lot for following up!
However, you should really follow the
Hi all,
I am dealing with a lingering problem related to init and probing of platform
devices early (before initcalls) in the kernel boot process. The problem,
which is nothing new, is related to how platform devices are created in the
kernel from DT and when they become available. Platform
On 06/24/2013 12:37 PM, Alexandre Belloni wrote:
On 24/06/2013 08:41, Lars-Peter Clausen wrote:
On 06/20/2013 08:57 PM, Alexandre Belloni wrote:
The Nuvoton NAU7802 ADC is a 24-bit 2-channels I2C ADC, with adjustable
gain and sampling rates.
Signed-off-by: Alexandre Belloni
This patch series includes some fixes and extensions to the Exynos
dts files to add the camera and magnetometer sensor support for TRATS2
board. It depends on a patch from Tomasz adding initial TRATS2 board
dts file [1].
Changes since v1 (are also listed at individual patches, if any):
-
Add separate nodes for the CAMCLK pin and turn off pull-up on camera
ports A, B. The video bus pins and the clock output (CAMCLK) pin need
separate nodes since full camera port is not used in some configurations,
e.g. for MIPI CSI-2 bus only CAMCLK is required and data/clock signal
use separate
The Exynos4 SPI controller uses the PL330 DMA controller which has
migrated to the generic DMA bindings since commit b5be04d35dbb2e00
spi: s3c64xx: Modify SPI driver to use generic DMA DT support.
Use the generic bindings to specify the corresponding DMA to make
the SPI usable again on Exynos4x12
This patch adds common FIMC and MIPI CSIS device nodes for Exynos4 SoCs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 68
1 file changed, 68
This patch enables the front camera using the internal
camera ISP (FIMC-IS).
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4412-trats2.dts | 91 +++
1 file changed, 91
From: Jacek Anaszewski j.anaszew...@samsung.com
This patch adds AK8975 magnetometer node and corresponding
i2c-gpio bus node for TRATS2 board.
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Sylwester Nawrocki
Hi,
On 06/18/2013 11:49 AM, Felipe Balbi wrote:
On Mon, Jun 17, 2013 at 12:16:35PM +0200, Sylwester Nawrocki wrote:
I have already used this API for our MIPI CSI-2/DSIM DPHYs driver,
the RFC patch series can be found at [1].
Thanks,
Sylwester
[1]
On Mon, 24 Jun 2013, Srinivas KANDAGATLA wrote:
From: Stuart Menefy stuart.men...@st.com
This is a simple driver for the global timer module found in the Cortex
A9-MP cores from revision r1p0 onwards. This should be able to perform
the functions of the system timer and the local timer in an
On 06/24/13 08:53, Srinivas KANDAGATLA wrote:
+
+static void gt_clockevents_stop(struct clock_event_device *clk)
+{
+ gt_clockevent_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
+ disable_percpu_irq(clk-irq);
+}
+
+static int __cpuinit gt_clockevents_setup(struct clock_event_device *clk)
On Mon, Jun 24, 2013 at 6:23 AM, Sekhar Nori nsek...@ti.com wrote:
On 6/22/2013 3:23 AM, Joel A Fernandes wrote:
Hi Arnd,
On Fri, Jun 21, 2013 at 1:44 PM, Arnd Bergmann a...@arndb.de wrote:
On Friday 21 June 2013, Joel A Fernandes wrote:
I think we are talking about different things, I agree
On Saturday 22 June 2013, Joel A Fernandes wrote:
config TI_EDMA
tristate TI EDMA support
default m if 'ARCH_DAVINCI || ARCH_OMAP1 || ARCH_OMAP2
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
MMC depends on EDMA specially on AM33xx there's no
On Mon, Jun 24, 2013 at 3:28 PM, Arnd Bergmann a...@arndb.de wrote:
On Saturday 22 June 2013, Joel A Fernandes wrote:
config TI_EDMA
tristate TI EDMA support
default m if 'ARCH_DAVINCI || ARCH_OMAP1 || ARCH_OMAP2
select DMA_ENGINE
select
On Monday 24 June 2013, Joel A Fernandes wrote:
Yes sure, right now they are defined as follows in include/linux/edma.h:
#if defined(CONFIG_TI_EDMA) || defined(CONFIG_TI_EDMA_MODULE)
bool edma_filter_fn(struct dma_chan *, void *);
#else
static inline bool edma_filter_fn(struct
On 24/06/13 21:06, Stephen Boyd wrote:
On 06/24/13 08:53, Srinivas KANDAGATLA wrote:
+
+static void gt_clockevents_stop(struct clock_event_device *clk)
+{
+gt_clockevent_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
+disable_percpu_irq(clk-irq);
+}
+
+static int __cpuinit
On 24/06/13 21:01, Thomas Gleixner wrote:
On Mon, 24 Jun 2013, Srinivas KANDAGATLA wrote:
From: Stuart Menefy stuart.men...@st.com
This is a simple driver for the global timer module found in the Cortex
A9-MP cores from revision r1p0 onwards. This should be able to perform
the functions of
On 06/24/13 14:08, Srinivas KANDAGATLA wrote:
On 24/06/13 21:06, Stephen Boyd wrote:
On 06/24/13 08:53, Srinivas KANDAGATLA wrote:
+
+static void gt_clockevents_stop(struct clock_event_device *clk)
+{
+ gt_clockevent_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
+ disable_percpu_irq(clk-irq);
On 06/22/2013 03:23 AM, Gerhard Sittig wrote:
...
On Fri, Jun 21, 2013 at 15:31 -0600, Stephen Warren wrote:
On 06/21/2013 12:09 PM, Gerhard Sittig wrote:
update the device tree binding documentation for the GPIO matrix keypad
driver: mention the driver's selecting all columns at once, reword
On Thu, Jun 20, 2013 at 8:10 PM, David Daney ddaney.c...@gmail.com wrote:
On 06/17/2013 01:51 AM, Linus Walleij wrote:
+#include asm/octeon/octeon.h
+#include asm/octeon/cvmx-gpio-defs.h
I cannot find this in my tree.
Weird, I see them here:
On 06/24/13 08:53, Srinivas KANDAGATLA wrote:
+#include linux/clkdev.h
Why do you need this include?
+#include asm/mach/irq.h
And this one?
+static u64 gt_counter_read(void)
+{
+ u64 counter;
+ u32 lower;
+ u32 upper, old_upper;
+
+ upper = readl_relaxed(gt_base +
On 06/22/2013 03:36 AM, Gerhard Sittig wrote:
On Fri, Jun 21, 2013 at 15:34 -0600, Stephen Warren wrote:
On 06/21/2013 12:09 PM, Gerhard Sittig wrote:
extend the device tree adjustable hardware configuration:
- allow for differing polarity of the row and column GPIO pins
- optionally fully
On 06/22/2013 03:50 AM, Gerhard Sittig wrote:
...
The patch set doesn't introduce that behaviour, but merely
describes it in more detail. It doesn't even introduce the
interrupt discussion into the binding document in a strict sense,
but expands on it in the hope for improved usability of
On 06/22/2013 04:00 AM, Gerhard Sittig wrote:
On Fri, Jun 21, 2013 at 15:41 -0600, Stephen Warren wrote:
On 06/21/2013 12:09 PM, Gerhard Sittig wrote:
diff --git a/Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt
b/Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt
On 06/22/2013 04:17 AM, Gerhard Sittig wrote:
On Fri, Jun 21, 2013 at 16:00 -0600, Stephen Warren wrote:
On 06/21/2013 12:09 PM, Gerhard Sittig wrote:
querying keyboards isn't a time critical task and does not depend on
exact timing in the microseconds order -- the timeouts and delays are
On Mon, Jun 24, 2013 at 08:21:43AM +0100, Srinivas KANDAGATLA wrote:
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop
Thanks for looking at this again.
I will be away from my office until the middle of July, so I will not be
able to generate and test a revised patch until then.
David Daney
On 06/24/2013 03:06 PM, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 8:10 PM, David Daney ddaney.c...@gmail.com
Bjorn Helgaas wrote:
On Fri, Jun 21, 2013 at 04:24:54PM +0900, Jingoo Han wrote:
Exynos5440 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
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