On Mon, Jul 15, 2013 at 02:40:39PM +0800, Robin Gong wrote:
+static const struct of_device_id pfuze_dt_ids[] = {
+ { .compatible = fsl,pfuze100, .data = (void *)PFUZE_ID_PFUZE100},
You do not use .data in the driver at all, and can just drop it.
good catch. .driver_data of
On Sun, Jul 14, 2013 at 8:13 PM, Guenter Roeck li...@roeck-us.net wrote:
On Sun, Jul 14, 2013 at 01:46:45AM +0200, Linus Walleij wrote: Maybe some
just consider this some documentation, think it has been
defined by someone who thought it over and merge it without looking
closely.
For my
On Fri, Jul 12, 2013 at 03:47:17PM +0100, Rob Herring wrote:
On Fri, May 17, 2013 at 10:20 AM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
In order to extend the current cpu nodes bindings to newer CPUs
inclusive of AArch64 and to update support for older ARM CPUs this
patch updates
On 07/15/2013 01:09 PM, Kozaruk, Oleksandr wrote:
[...]
+ ret = devm_request_threaded_irq(dev, irq, NULL,
+ twl6030_gpadc_irq_handler,
+ IRQF_ONESHOT, twl6030_gpadc, gpadc);
You access memory in the interrupt
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx Tx
On 07/15/2013 01:56 PM, Grygorii Strashko wrote:
Hi All,
I have a question regarding this patch and IIO in general
- Does IIO provide sync mechanism with system wide suspend/resume or this
should be handled by each driver itself?
What if during system suspend iio_read_channel_raw() (or
On 07/15/2013 02:27 PM, Oleksandr Kravchenko wrote:
Thank you for review! But I don't completely understand one of your comment:
+static int als_probe(struct i2c_client *client, const struct i2c_device_id
*id)
[...]
+ if (client-irq) {
+ ret =
Hi Benoit,
On 06/20/2013 05:11 PM, Cousson, Benoit wrote:
Thanks Roger,
I'll take them for 3.12. I was already late for my 3.11 pull request.
Please disregard these patches. I'll send a new version based on the reset-gpio
driver.
cheers,
-roger
On Jul 5, 2013, at 1:27 AM, hongbo.zh...@freescale.com
hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang hongbo.zh...@freescale.com
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
On Jul 5, 2013, at 1:27 AM, hongbo.zh...@freescale.com
hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang hongbo.zh...@freescale.com
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
Hi Tony,
On 06/18/2013 07:04 PM, Roger Quadros wrote:
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree boots on Panda and uEVM.
Looks
From: Dinh Nguyen dingu...@altera.com
Add bindings for SD/MMC for SOCFPGA.
Add syscon to the altr,sys-mgr binding.
Signed-off-by: Dinh Nguyen dingu...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
CC: Arnd Bergmann a...@arndb.de
CC: Olof
Hi Sylwester,
Thanks for the review.
On Mon, Jul 15, 2013 at 2:03 AM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
Hi Prabhakar,
On 07/13/2013 01:12 PM, Prabhakar Lad wrote:
From: Lad, Prabhakarprabhakar.cse...@gmail.com
add OF support for the adv7343 driver.
Signed-off-by:
2013/7/12 Mark Brown broo...@kernel.org:
On Thu, Jul 11, 2013 at 06:15:53PM +0200, Richard Genoud wrote:
Please always try to use commit logs that look like normal commit logs
for the subsystem.
Ok, I'll pay attention to that.
switch (freq) {
- case 11289600:
case 1200:
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.
This will allow to deprecate the name based API, once every
user is removed.
Signed-off-by: Thomas Petazzoni
Here's the new MBus DT binding, implementing the changes proposed
by Thomas when we discussed the previous patchset:
http://www.spinics.net/lists/arm-kernel/msg257170.html
As far as I know, this round fixes *all* the concerns raised in the past
and therefore I'd like to get Acked-by's from all
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.
This will allow to deprecate the name based API, once every
user is removed.
Signed-off-by: Thomas Petazzoni
Now that mbus device tree binding has been introduced, remove the address
decoding window management from this driver.
A suitable 'ranges' entry should be added to the devbus-compatible node in
the device tree, as described by the mbus binding documentation.
Acked-by: Greg Kroah-Hartman
We introduce a common initialization function mvebu_mbus_common_init()
that will be used by both legacy and device-tree initialization code.
This patch is an intermediate step, which will allow to introduce the
DT binding for this driver in a less intrusive way.
Signed-off-by: Thomas Petazzoni
This patch adds the most fundamental device-tree initialization.
We only introduce what's required to be able to probe the mvebu-mbus
driver from the DT. Follow-up patches will extend the device tree binding,
allowing to describe static address decoding windows.
Signed-off-by: Thomas Petazzoni
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.
This will allow to deprecate the name based API, once every
user is removed.
Signed-off-by: Thomas Petazzoni
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.
This will allow to deprecate the name based API, once every
user is removed.
Signed-off-by: Thomas Petazzoni
This patch adds static window allocation to the device tree binding.
Each first-child of the mbus-compatible node, with a suitable 'ranges'
property, declaring an address translation, will trigger an address
decoding window allocation.
Signed-off-by: Ezequiel Garcia
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
This tables were used together with the name-based MBus window
creation API. Since that's has been removed, we can also remove
the tables.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/bus/mvebu-mbus.c
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
Now that every user of the deprecated name-based API has been
converted to using the ID-based API, let's remove the former one.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/bus/mvebu-mbus.c | 38
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
The new device tree layout encodes the window's target ID and attribute
in the PCIe controller node's ranges property. This allows to parse
such entries to obtain such information and use the recently introduced
MBus API to create the
The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.
This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit
2013/7/12 Mark Brown broo...@kernel.org:
On Thu, Jul 11, 2013 at 06:15:54PM +0200, Richard Genoud wrote:
From: Nicolas Ferre nicolas.fe...@atmel.com
Description of the Asoc machine driver for an at91sam9x5 based board
ASoC.
+sam9x5 pins:
+ * LOUT
+ * ROUT
+ * LHPOUT
+ * RHPOUT
+ *
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/armada-370-db.dts | 2 +-
arch/arm/boot/dts/armada-370-mirabox.dts | 2 +-
arch/arm/boot/dts/armada-370-rd.dts | 2 +-
arch/arm/boot/dts/armada-370.dtsi| 2 +-
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the
hardware.
Moving the PCIe nodes, we now need to introduce an extra cell to
encode the window target ID
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
These structures were only different in the mapping tables.
Now that those tables have been removed, it doesn't make any sense
to keep different structures.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
In order to access the SoC BootROM, we need to declare a mapping
(through a ranges property). The mbus driver will use this property
to allocate a suitable address decoding window.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/armada-370-db.dts
On Mon, Jul 15, 2013 at 08:29:15AM -0600, Jonathan Corbet wrote:
On Mon, 15 Jul 2013 10:36:22 +0200
Linus Walleij linus.wall...@linaro.org wrote:
Devicetree is supposed to describe the hardware, but in many cases there
is
an overlap between hardware description and configuration
Now that the mbus device tree binding has been introduced, we can
switch over to it.
Also, and since the initialization of the mbus driver is quite
fundamental for the system to work properly, this patch adds a BUG()
in case mbus fails to initialize.
Signed-off-by: Ezequiel Garcia
The address decoding window to access the BootROM should not be
allocated programatically, but instead declared in the device tree.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/mach-mvebu/platsmp.c | 25 -
1 file changed, 24
Now that mbus has been added to the device tree, it's possible to
move the DeviceBus out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the hardware.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
On Sat, Jul 13, 2013 at 12:15:12AM +0800, Robin Gong wrote:
Please fix your mail program to word wrap between paragraphs.
On Fri, Jul 12, 2013 at 03:40:37PM +0100, Mark Brown wrote:
+static const int pfuze100_swbst[] = {
+ 500, 505, 510, 515,
+};
This looks like a
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
After replacing the MBus name-based by the new ID-based API
let's fix the general description of the driver at the beginning
of the file.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/bus/mvebu-mbus.c |
On Mon, Jul 15, 2013 at 04:53:46PM +0200, Richard Genoud wrote:
2013/7/12 Mark Brown broo...@kernel.org:
This isn't going to work with systems which have a variable clock as the
input to the CODEC. If it's imposing constraints the driver needs to
allow setting the clock to zero as a way
Hello,
Following the discussion of last week with Florian Fainelli and Grant
Likely [1], this patch set introduces DT-based support for fixed PHYs
through an additional OF API, and uses it in the context of the
Marvell mvneta network driver.
Grant, Rob, your opinions as DT maintainers are
Some Ethernet MACs have a fixed link, and are not connected to a
normal MDIO-managed PHY device. For those situations, a Device Tree
binding allows to describe a fixed link, as a fixed-link property
of the Ethernet device Device Tree node.
This patch adds:
* A documentation for the Device Tree
The fixed_phy_add() function allows to register a fixed PHY. However,
when this function gets called *after* fixed_mdio_bus_init() (which
gets called at the module_init stage), then the fixed PHY is not
registered into the phylib.
In order to address this, we add a call to mdiobus_scan() in
Following the introduction of of_phy_register_fixed_link(), this patch
introduces fixed link support in the mvneta driver, for Marvell Armada
370/XP SOCs.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
.../bindings/net/marvell-armada-370-neta.txt | 24
From: Mathieu J. Poirier mathieu.poir...@linaro.org
Adding a simple device tree binding for the specification of key sequences.
Definition of the keys found in the sequence are located in
'include/uapi/linux/input.h'.
For the sysrq driver, holding the sequence of keys down for a specific amount
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Acked-by: Chanwoo Choi
Hello Thomas,
2013/7/15 Thomas Petazzoni thomas.petazz...@free-electrons.com:
The fixed_phy_add() function allows to register a fixed PHY. However,
when this function gets called *after* fixed_mdio_bus_init() (which
gets called at the module_init stage), then the fixed PHY is not
registered
Hello Thomas,
2013/7/15 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Some Ethernet MACs have a fixed link, and are not connected to a
normal MDIO-managed PHY device. For those situations, a Device Tree
binding allows to describe a fixed link, as a fixed-link property
of the Ethernet
On Mon, Jul 15, 2013 at 09:09:02PM +0530, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
On 07/15/2013 04:54 PM, Oleksandr Kravchenko wrote:
I can't to find devm_iio_device_alloc() in my kernel v3.11-rc1
It doesn't exist yet, but it should be too hard to implement one.
- Lars
On Mon, Jul 15, 2013 at 3:35 PM, Lars-Peter Clausen l...@metafoo.de wrote:
On 07/15/2013 02:27 PM,
On Sun, Jul 14, 2013 at 01:46:45AM +0200, Linus Walleij wrote:
On Sat, Jul 13, 2013 at 10:49 PM, Guenter Roeck li...@roeck-us.net wrote:
On Sat, Jul 13, 2013 at 08:26:47PM +0100, Wolfram Sang wrote:
I think the KS would be a good opportunity to present the status quo,
show some rules of
On Mon, Jul 15, 2013 at 09:56:20AM -0700, Greg KH wrote:
How about a hint for subsystem maintainers as to what exactly we should
be looking for with these bindings? I for one have no idea what is
right vs. wrong with them, so a document explaining this would be
good to have.
Or if we
Hi Sylwester,
On Mon, Jul 15, 2013 at 1:12 AM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
Hi Prabhakar,
[Snip]
Something similar to fid_polarity.
Then as I suggested earlier, let's just add 'sync-on-green-active' DT
property for that. I wouldn't expect the DT properties to be
On 07/15/2013 08:35:07 AM, Kumar Gala wrote:
On Jul 5, 2013, at 1:27 AM, hongbo.zh...@freescale.com
hongbo.zh...@freescale.com wrote:
+dma0: dma@100300 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,elo3-dma;
why does this require a new compatible?
The binding has
On 07/15/2013 05:34:58 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang hongbo.zh...@freescale.com
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang hongbo.zh...@freescale.com
---
From: Stephen Warren swar...@nvidia.com
This is identical to of_parse_phandle_with_args(), except that the
number of argument cells is fixed, rather than being parsed out of the
node referenced by each phandle.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
drivers/of/base.c | 67
From: Stephen Warren swar...@nvidia.com
This change makes documentation of the the gpio-ranges property shorter
and more succinct, more consistent with the style of the rest of the
document, and not mention Linux-specifics such as the API
pinctrl_request_gpio(); DT binding documents should be OS
From: Stephen Warren swar...@nvidia.com
Use the new of_parse_phandle_with_fixed_args() to implement the
corrected gpio-ranges DT property definition.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
drivers/gpio/gpiolib-of.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: Stephen Warren swar...@nvidia.com
Commit bd69f73 of: Create function for counting number of phandles in
a property renamed of_parse_phandle_with_args(), and created a wrapper
function that implemented the original name. However, the documentation
of the original function was not moved,
From: Stephen Warren swar...@nvidia.com
This property is no longer required by the GPIO binding. Remove it.
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
---
This should presumably be applied along with the previous changes
v2: Squash spear and
On Mon, Jul 15, 2013 at 06:06:00PM +0100, Mark Brown wrote:
On Mon, Jul 15, 2013 at 09:56:20AM -0700, Greg KH wrote:
How about a hint for subsystem maintainers as to what exactly we should
be looking for with these bindings? I for one have no idea what is
right vs. wrong with them, so a
clocks need to get prepared before they can get enabled,
fix the MPC512x PSC SPI master's initialization
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-mpc512x-psc.c
this series introduces support for the common clock framework (CCF,
COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform, a
resulting debugfs clk_summary is at the end of the message after the
stats
although the series does touch several subsystems -- serial, spi, net
(can, fs_enet),
must prepare clocks before enabling them, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN
clocks need to get prepared before they can get enabled, and after
disabling them they can get unprepared
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
this addresses the clock driver aka provider's side of clocks
- prepare for future 'clks ID' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Signed-off-by: Gerhard Sittig g...@denx.de
---
include/dt-bindings/clock/mpc512x-clock.h | 59 +
1
this addresses the client side of device tree based clock lookups:
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu,
viu, mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the
shared mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
this change introduces a clock infrastructure implementation for the
MPC512x PowerPC platform which follows the COMMON_CLK approach and uses
common clock drivers shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic
after PSC related clock specifiers were added to the device tree,
the former 'psc%d_mclk' isn't needed any longer to lookup clock items
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
adapt the DIU clock initialization to the COMMON_CLK approach: device
tree based clock lookup, prepare and unprepare for clocks, work with
frequencies not dividers, call the appropriate clk_*() routines and
don't access CCM registers, remove the pre-enable workaround in the
platform's clock driver
On 07/15/2013 04:34 AM, Lorenzo Pieralisi wrote:
On Fri, Jul 12, 2013 at 03:47:17PM +0100, Rob Herring wrote:
On Fri, May 17, 2013 at 10:20 AM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
In order to extend the current cpu nodes bindings to newer CPUs
inclusive of AArch64 and to update
On 07/15/2013 01:40 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
This property is no longer required by the GPIO binding. Remove it.
Won't this break compatibility with older kernel? It is one thing to
deprecate, but removal is another. If the relevant maintainers don't
On Mon, Jul 15, 2013 at 08:47:34PM +0200, Gerhard Sittig wrote:
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -104,7 +104,7 @@ static unsigned long
On Mon, Jul 15, 2013 at 11:41:57AM -0700, Greg KH wrote:
On Mon, Jul 15, 2013 at 06:06:00PM +0100, Mark Brown wrote:
At the minute it's about at the level of saying that if you're not sure
or don't know you should get the devicetree-discuss mailing list to
review it. Ideally someone would
On Mon, Jul 15, 2013 at 08:47:30PM +0200, Gerhard Sittig wrote:
clocks need to get prepared before they can get enabled,
fix the MPC512x PSC SPI master's initialization
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c |2 +-
1 file changed, 1 insertion(+), 1
On Fri, Jul 12, 2013 at 10:44 AM, Daniel Drake d...@laptop.org wrote:
Based on the outcomes of the Best practice device tree design for display
subsystems discussion I have drafted a DT binding. Comments much appreciated.
At a high level, it uses a super node as something for the driver to
Hi,
On Sunday 14 of July 2013 00:09:55 Russell King - ARM Linux wrote:
On Sun, Jul 14, 2013 at 12:16:58AM +0200, Sylwester Nawrocki wrote:
On 07/13/2013 11:02 PM, Russell King - ARM Linux wrote:
On Sat, Jul 13, 2013 at 10:43:29PM +0200, Sylwester Nawrocki wrote:
I wasn't aware of it,
ping ?
On 6/28/2013 4:25 PM, Rohit Vaswani wrote:
This series re-organizes the platsmp.c and adds SMP support for
MSM8660, MSM8960 and MSM8974.
We convert to using the cpus property in device tree and
add a enable-method property for arm32.
This helps select the appropriate release sequence for
On Mon, Jul 15, 2013 at 4:29 PM, Jonathan Corbet cor...@lwn.net wrote:
Do we need a kernel summit discussion, or do we just need a good
document? Or, to phrase the question another way, are we lacking a
consensus among the clueful regarding how device tree bindings should be
designed, or are
On Mon, Jul 15, 2013 at 02:23:30PM -0600, Daniel Drake wrote:
On Fri, Jul 12, 2013 at 10:44 AM, Daniel Drake d...@laptop.org wrote:
Based on the outcomes of the Best practice device tree design for display
subsystems discussion I have drafted a DT binding. Comments much
appreciated.
At
with device tree based clock lookup, the MCLK name no longer
depends on the PSC index
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
On Mon, Jul 15, 2013 at 11:46:01PM +0200, Gerhard Sittig wrote:
with device tree based clock lookup, the MCLK name no longer
depends on the PSC index
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |8 ++--
1 file changed, 2 insertions(+), 6
On 07/15/2013 01:34 PM, Rob Herring wrote:
On 07/15/2013 01:40 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
This property is no longer required by the GPIO binding. Remove it.
Won't this break compatibility with older kernel? It is one thing to
deprecate, but removal
On 07/16/2013 12:51 AM, Felipe Balbi wrote:
On Mon, Jul 15, 2013 at 09:09:02PM +0530, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Add a header declaration to allow drivers (such as watchdog)
to access this exported API.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
include/linux/time-orion.h | 7 +++
1 file changed, 7 insertions(+)
create mode 100644 include/linux/time-orion.h
diff --git
The TIMER_CTRL register allows to control timer and watchdog counters,
so it's a register shared between the clocksource and the watchdog
drivers. In order to prevent race-conditions the clocksource driver
exposed a thread-safe API. Use the API.
Signed-off-by: Ezequiel Garcia
Until now the watchdog driver was using the timer control register
to access the watchdog counter register. This is not appropriate,
given the timer control register should be controlled by the clocksource
driver alone.
Fix this by passing the correct register address to the driver and making
Name this file to something a bit more judicious.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
Documentation/devicetree/bindings/watchdog/{marvel.txt = orion-wdt.txt} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename
The watchdog driver now needs two 'reg' property cells. The first one
is for the register containing the watchdog counter, while the second
one is for the RSTOUT register.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/kirkwood.dtsi | 3 ++-
1 file
This is a purely cosmetic commit: we replace hardcoded values that
representing bits by BIT(), which is slightly more readable.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/watchdog/orion_wdt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Now that the 'reg' property meaning has been changed,
this commit updates the deivce-tree binding documentation.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
Documentation/devicetree/bindings/watchdog/orion-wdt.txt | 8 +---
1 file changed, 5 insertions(+), 3
The mach/bridge-regs.h header is not needed anymore, so we can remove it.
This commit allows to use this driver on multiplatforms builds.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/watchdog/orion_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi Stephen,
On Friday 12 July 2013 08:42:41 Stephen Warren wrote:
On 07/12/2013 05:01 AM, Laurent Pinchart wrote:
On Thursday 11 July 2013 14:06:44 Stephen Warren wrote:
On 07/11/2013 01:32 PM, Thierry Reding wrote:
On Thu, Jul 11, 2013 at 11:50:48AM -0600, Stephen Warren wrote:
On
On 07/15/2013 10:36 AM, mathieu.poir...@linaro.org wrote:
From: Mathieu J. Poirier mathieu.poir...@linaro.org
Adding a simple device tree binding for the specification of key sequences.
Definition of the keys found in the sequence are located in
'include/uapi/linux/input.h'.
For the sysrq
On 07/15/2013 07:50 PM, Shawn Guo wrote:
Hi Philipp,
On Thu, May 30, 2013 at 11:09:00AM +0200, Philipp Zabel wrote:
This driver implements a reset controller device that toggle a gpio
connected to a reset pin of a peripheral IC. The delay between assertion
and de-assertion of the reset
On Mon, Jul 15, 2013 at 09:35:52PM -0600, Stephen Warren wrote:
It's a little bit late to register gpio-reset driver at module_init
time, because gpio-reset provides reset control via gpio for other
devices which are mostly probed at module_init time too. And it
becomes even worse, when
100 matches
Mail list logo
