[Bug 107319] [amdgpu] [4.14+] [patch] amdgpu uses raw rlc_hdr values, causing kernel OOPS on big endian architectures

https://bugs.freedesktop.org/show_bug.cgi?id=107319 A. Wilcox changed: What|Removed |Added Attachment #140751|0 |1 is patch|

[Bug 107319] [amdgpu] [4.14+] [patch] amdgpu uses raw rlc_hdr values, causing kernel OOPS on big endian architectures

https://bugs.freedesktop.org/show_bug.cgi?id=107319 Bug ID: 107319 Summary: [amdgpu] [4.14+] [patch] amdgpu uses raw rlc_hdr values, causing kernel OOPS on big endian architectures Product: DRI Version: XOrg git

Re: [PATCH RESEND 3/7] of: address: Add parent pointer to the __of_translate_address args

Hi Maxime, I love your patch! Perhaps something to improve: [auto build test WARNING on ] url: https://github.com/0day-ci/linux/commits/Maxime-Ripard/sunxi-Add-DT-representation-for-the-MBUS-controller/20180721-052652 base: reproduce: # apt-get install sparse make

[drm-tip:drm-tip 7/8] debug.c:undefined reference to `save_stack_trace'

Hi Rodrigo, It's probably a bug fix that unveils the link errors. tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 20532651221ed29af16e2db0a7ec8b9bd482c994 commit: 315fade0d9f3edbf2592599056c8defbdd95a3ab [7/8] Merge remote-tracking branch 'drm-intel/topic/core-for-CI' into

Re: [PATCH] mm, oom: distinguish blockable mode for mmu notifiers

On Mon, 16 Jul 2018 13:50:58 +0200 Michal Hocko wrote: > From: Michal Hocko > > There are several blockable mmu notifiers which might sleep in > mmu_notifier_invalidate_range_start and that is a problem for the > oom_reaper because it needs to guarantee a forward progress so it cannot > depend

Re: [PATCH RESEND 5/7] drm/sun4i: Rely on dma-parent for our RAM offset

Hi Maxime, I love your patch! Yet something to improve: [auto build test ERROR on ] url: https://github.com/0day-ci/linux/commits/Maxime-Ripard/sunxi-Add-DT-representation-for-the-MBUS-controller/20180721-052652 base: config: arm-sunxi_defconfig (attached as .config) compiler:

Re: [PATCH] mm, oom: distinguish blockable mode for mmu notifiers

On Tue, 17 Jul 2018 10:12:01 +0200 Michal Hocko wrote: > > Any suggestions regarding how the driver developers can test this code > > path? I don't think we presently have a way to fake an oom-killing > > event? Perhaps we should add such a thing, given the problems we're > > having with that

Re: [PATCH RESEND 3/7] of: address: Add parent pointer to the __of_translate_address args

Hi Maxime, I love your patch! Perhaps something to improve: [auto build test WARNING on ] url: https://github.com/0day-ci/linux/commits/Maxime-Ripard/sunxi-Add-DT-representation-for-the-MBUS-controller/20180721-052652 base: config: i386-randconfig-a1-201828 (attached as .config)

Re: [PATCH RESEND 3/7] of: address: Add parent pointer to the __of_translate_address args

Hi Maxime, I love your patch! Yet something to improve: [auto build test ERROR on ] url: https://github.com/0day-ci/linux/commits/Maxime-Ripard/sunxi-Add-DT-representation-for-the-MBUS-controller/20180721-052652 base: config: x86_64-randconfig-x011-201828 (attached as .config) compiler:

[Bug 195231] Continuous messages of "*ERROR* UVD not responding, trying to reset the VCPU!!!" and frozen screen

https://bugzilla.kernel.org/show_bug.cgi?id=195231 Rogério Brito (rbr...@ime.usp.br) changed: What|Removed |Added Status|NEW |RESOLVED

Re: [PATCH V4 6/8] backlight: qcom-wled: Add support for WLED4 peripheral

Hi! > >@@ -332,6 +529,7 @@ static u32 wled_values(const struct wled_var_cfg *cfg, > >u32 idx) > > } > > #defineWLED3 3 > >+#define WLED4 4 > > Are these macros always going to define 3 to be 3 and 4 to be 4. If so we > probably don't need them (and they should be removed from

[PATCH 10/10] drm/vmwgfx: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 466336b34fff..1e0fb3c79b50 100644 ---

[PATCH 06/10] drm/imx: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/imx/ipuv3-plane.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index 203f247d4854..1bd4de03ce9e 100644 ---

[PATCH 08/10] drm/sun4i: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/sun4i/sun4i_layer.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c index 750ad24de1d7..78f77af8805a 100644 ---

[PATCH 09/10] drm/vc4: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/vc4/vc4_plane.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 9d7a36f148cf..688ad9bb0f08 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++

[PATCH 07/10] drm: rcar-du: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 4 +--- drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c index

[PATCH 05/10] drm/exynos: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/exynos/exynos_drm_plane.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index eb9915da7dec..681328fbe7de 100644 ---

[PATCH 03/10] drm: mali-dp: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/arm/malidp_planes.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 29409a65d864..49c37f6dd63e 100644 ---

[PATCH 01/10] drm/atomic: Add __drm_atomic_helper_plane_reset

There are a lot of drivers that subclass drm_plane_state, all of them duplicate the code that links toghether the plane with plane_state. On top of that, drivers that enable core properties also have to duplicate the code for initializing the properties to their default values, which in all cases

[PATCH 00/10] Add helper for plane reset

Drivers that subclass drm_plane need to copy the logic for linking the drm_plane with its state and to initialize core properties to their default values. E.g (alpha and rotation) Having a helper to reset the plane_state makes sense because of multiple reasons: 1. Eliminate code duplication. 2.

[PATCH 02/10] drm/amd/display: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index

[PATCH 04/10] drm: atmel-hlcdc: Use __drm_atomic_helper_plane_reset instead of copying the logic

Signed-off-by: Alexandru Gheorghe --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 04440064b9b7..9330a076e15a 100644

[PATCH v3 17/19] drm/msm: Add pm_suspend/resume callbacks to msm_kms

From: Jeykumar Sankaran Used by the dpu driver for custom suspend/resume. Changes in v3: - None Signed-off-by: Jeykumar Sankaran [seanpaul split this out of the megapatch] Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_drv.c | 10 ++ drivers/gpu/drm/msm/msm_kms.h | 3 +++ 2

[PATCH v3 18/19] dt-bindings: msm/disp: Add bindings for Snapdragon 845 DPU

From: Jeykumar Sankaran Adds bindings for Snapdragon 845 display processing unit Changes in v2: - Use SoC specific compatibles for mdss and dpu (Rob Herring) - Use assigned-clocks to set initial clock frequency (Rob Herring) Changes in v3 (all suggested by Rob Herring): - Rename mdss_phys to

[PATCH v3 19/19] drm/msm: Add SDM845 DPU support

From: Jeykumar Sankaran SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a top level wrapper consisting of Display Processing Unit (DPU) and display peripheral modules such as Display Serial Interface (DSI) and DisplayPort (DP). MDSS functions essentially as a back-end

[PATCH v3 16/19] drm/msm: Add .commit() callback to msm_kms functions

From: Jeykumar Sankaran Called right before wait_for_commit_done() to perform kickoff for active crtcs. Changes in v3: - None Signed-off-by: Jeykumar Sankaran [seanpaul split this out of the megapatch] Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_atomic.c | 5 +

[PATCH v3 13/19] drm/msm: #define MDP version numbers

From: Jeykumar Sankaran Useful for incoming DPU support Changes in v3: - None Signed-off-by: Jeykumar Sankaran [seanpaul split this from the dpu megapatch] Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_drv.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff

[PATCH v3 15/19] drm/msm: #define MAX_ in msm_drv.h

From: Jeykumar Sankaran dpu uses these elsewhere in the driver (in addition to increasing MAX_PLANES, that'll come later), so pull them out into #define. Changes in v3: - None Signed-off-by: Jeykumar Sankaran [seanpaul pulled this out of the dpu megapatch] Signed-off-by: Sean Paul ---

[PATCH v3 14/19] drm/msm: Use labels for unwinding in the error path

From: Jeykumar Sankaran This simplifies cleanup, to make sure nothing drops out in case of error. Changes in v3: - None Signed-off-by: Jeykumar Sankaran [seanpaul split out of dpu megapatch and renamed labels] Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_drv.c | 44

[PATCH v3 12/19] drm/msm: Clean up dangling atomic_wq

I missed this during the atomic conversion Changes in v3: - None Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_drv.c | 4 drivers/gpu/drm/msm/msm_drv.h | 1 - 2 files changed, 5 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index

[PATCH v3 11/19] drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor

From: Abhinav Kumar Make the pclk_rate u64 to accommodate higher pixel clock rates. Changes in v3: - Converted pclk_rate to u32 (Archit) - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar Cc: Archit Taneja Signed-off-by: Abhinav Kumar Signed-off-by: Sean Paul ---

[PATCH v3 09/19] drm/msm/mdp5: subclass msm_mdss for mdp5

From: Rajesh Yadav SoCs having mdp5 or dpu have identical tree like device hierarchy where MDSS top level wrapper manages common power resources for all child devices. Subclass msm_mdss so that msm_mdss includes common defines and mdp5/dpu mdss derivations to include any extensions. Add mdss

[PATCH v3 10/19] drm/msm: enable zpos normalization

From: Jeykumar Sankaran Enable drm core zpos normalization for planes. Changes in v3: - None Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/msm_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git

[PATCH v3 07/19] drm/msm/dsi: set encoder mode for DRM bridge explicitly

From: Abhinav Kumar Currently, DRM bridge for DPU relies on the default video mode setting to set the encoder mode. Add an explicit call to set the encoder mode for bridges. Changes in v3: - None Reviewed-by: Archit Taneja Signed-off-by: Abhinav Kumar Signed-off-by: Sean Paul ---

[PATCH v3 08/19] drm/msm: Move wait_for_vblanks into mdp complete_commit() hooks

DPU doesn't use this, so push it into the mdp drivers. Changes in v3: - None Signed-off-by: Sean Paul Signed-off-by: Rajesh Yadav --- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 2 ++ drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 2 ++ drivers/gpu/drm/msm/msm_atomic.c | 2 -- 3 files

[PATCH v3 05/19] drm/msm/dsi: Use one connector for dual DSI mode

From: Chandan Uddaraju Current DSI driver uses two connectors for dual DSI case even though we only have one panel. Fix this by implementing one connector/bridge for dual DSI use case. Use master DSI controllers to register one connector/bridge. Changes in v3: - None Reviewed-by: Archit Taneja

[PATCH v3 04/19] drm/msm/dsi: adjust dsi timing for dual dsi mode

From: Chandan Uddaraju For dual dsi mode, the horizontal timing needs to be divided by half since both the dsi controllers will be driving this panel. Adjust the pixel clock and DSI timing accordingly. Changes in v3: - Added Archit's R-b - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar

[PATCH v3 03/19] drm: add msm compressed format modifiers

From: Jeykumar Sankaran Qualcomm Snapdragon chipsets uses compressed format to optimize BW across multiple IP's. This change adds needed modifier support in drm for a simple 4x4 tile based compressed variants of base formats. Changes in v3: - Removed duplicate entry for

[PATCH v3 06/19] drm/msm/dsi: initialize postdiv_lock before use for 10nm pll

From: Rajesh Yadav postdiv_lock spinlock was used before initialization for 10nm pll. It causes following spin_bug: "BUG: spinlock bad magic on CPU#0". Initialize spinlock before its usage. Changes in v3: - Added Archit's R-b Reviewed-by: Archit Taneja Signed-off-by: Rajesh Yadav

[PATCH v3 02/19] drm: Add support for pps and compression mode command packet

From: vkorjani After enabling DSC we need to send compression mode command packet and pps data packet, for which 2 new data types are added 07h Compression Mode Data Type Write , short write, 2 parameters 0Ah PPS Long Write (word count determines number of bytes) This patch adds support to

[PATCH v3 00/19] drm/msm: Add support for SDM845 Display Processing Unit (DPU)

Hello! Here's v3 (well, kind of v2/v3) I revved the dt-bindings in the meantime. Refer to [1] for all of the gory details on the driver. It's been baking in linux-next for ~week now and the outstanding dt-bindings changes are sorted, so I figured it's time for another try. Note that I've removed

[PATCH v3 01/19] dt-bindings: msm/dsi: Add mdp transfer time to msm dsi binding

From: Jeykumar Sankaran Adds mdp transfer time to msm dsi binding Changes in v3: - Added Rob's R-b Reviewed-by: Rob Herring Signed-off-by: Jeykumar Sankaran Signed-off-by: Rajesh Yadav Signed-off-by: Sean Paul --- .../devicetree/bindings/display/msm/dsi.txt | 16 1

[Bug 107311] seemingly random GPU hangs, no input

https://bugs.freedesktop.org/show_bug.cgi?id=107311 --- Comment #3 from dwagner --- >From how you describe it, you are experiencing the same bugs that I reported in https://bugs.freedesktop.org/show_bug.cgi?id=102322 -- You are receiving this mail because: You are the assignee for the

[PATCH] omapfb: encoder-tpd12s015: remove redundant pointer 'in'

From: Colin Ian King Pointer 'in' is being assigned but is never used hence it is redundant and can be removed. Cleans up clang warning: warning: variable 'in' set but not used [-Wunused-but-set-variable] Signed-off-by: Colin Ian King ---

Re: [PATCH 2/2] drm/scheduler: remove sched field from the entity

Nayan Deshmukh writes: > The scheduler of the entity is decided by the run queue on which > it is queued. This patch avoids us the effort required to maintain > a sync between rq and sched field when we start shifting entites > among different rqs. Reviewed-by: Eric Anholt signature.asc

Re: [PATCH 1/2] drm/scheduler: modify API to avoid redundancy

Nayan Deshmukh writes: > entity has a scheduler field and we don't need the sched argument > in any of the functions where entity is provided. > > Signed-off-by: Nayan Deshmukh > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c| 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 13

[Bug 107311] seemingly random GPU hangs, no input

https://bugs.freedesktop.org/show_bug.cgi?id=107311 --- Comment #2 from Roshless --- Created attachment 140738 --> https://bugs.freedesktop.org/attachment.cgi?id=140738=edit different order if it means anything -- You are receiving this mail because: You are the assignee for the

[Bug 107311] seemingly random GPU hangs, no input

https://bugs.freedesktop.org/show_bug.cgi?id=107311 --- Comment #1 from Roshless --- Created attachment 140737 --> https://bugs.freedesktop.org/attachment.cgi?id=140737=edit different message -- You are receiving this mail because: You are the assignee for the

Re: [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

On Fri, Jul 20, 2018 at 09:18:12AM -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > According to DP spec (2.9.3.1 of DP 1.4) if > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD > 02200h through 0220Fh shall contain the DPRX's true capability. These >

Re: [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

On Fri, Jul 20, 2018 at 09:18:12AM -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > According to DP spec (2.9.3.1 of DP 1.4) if > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD > 02200h through 0220Fh shall contain the DPRX's true capability. These >

Re: [PATCH 1/2] drm/dp: add extended receiver capability field present bit

On Fri, Jul 20, 2018 at 09:18:11AM -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > This bit was added to DP Training Aux RD interval with DP 1.3. Via > descriptiion of the spec this field indicates the panels true > capabilities are described in DPCD address space 02200h through

[Bug 107311] seemingly random GPU hangs, no input

https://bugs.freedesktop.org/show_bug.cgi?id=107311 Bug ID: 107311 Summary: seemingly random GPU hangs, no input Product: DRI Version: DRI git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW

[Bug 107310] intel-gpu-overlay crashes on startup, being aborted

https://bugs.freedesktop.org/show_bug.cgi?id=107310 --- Comment #1 from Chris Wilson --- It intentionally doesn't adapt to different versions of the tracepoints, I suspect you need v4.19 currently (and v4.19 won't be for another 3 months...) -- You are receiving this mail because: You are the

[Bug 107310] intel-gpu-overlay crashes on startup, being aborted

https://bugs.freedesktop.org/show_bug.cgi?id=107310 leozinho29...@hotmail.com changed: What|Removed |Added Summary|intel-gpu-tools crashes on |intel-gpu-overlay crashes

[Bug 107310] intel-gpu-tools crashes on startup, being aborted

https://bugs.freedesktop.org/show_bug.cgi?id=107310 Bug ID: 107310 Summary: intel-gpu-tools crashes on startup, being aborted Product: DRI Version: unspecified Hardware: Other OS: All Status: NEW

[Bug 107045] [4.18rc2] RX470 dGPU on hybrid laptop freezes screen after use

https://bugs.freedesktop.org/show_bug.cgi?id=107045 Michel Dänzer changed: What|Removed |Added Whiteboard|| CC|

[Bug 107277] Raven: pci_pm_suspend takes over 1 second

https://bugs.freedesktop.org/show_bug.cgi?id=107277 --- Comment #12 from Michel Dänzer --- (In reply to Paul Menzel from comment #11) > > Does this patch help? > > It looks like it. > > Tested-by: Paul Menzel Cool, thanks for testing. Looks like that cut down suspend time by ~600 ms. Would

[PATCH 1/2] drm/dp: add extended receiver capability field present bit

From: Matt Atwood This bit was added to DP Training Aux RD interval with DP 1.3. Via descriptiion of the spec this field indicates the panels true capabilities are described in DPCD address space 02200h through 022FFh. v2: version comment update v3: version comment correction, commit message

[PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

From: Matt Atwood According to DP spec (2.9.3.1 of DP 1.4) if EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD 02200h through 0220Fh shall contain the DPRX's true capability. These values will match 0h through Fh, except for DPCD_REV, MAX_LINK_RATE,

[GIT PULL] drm/imx: cleanup and csi improvements

Hi Dave, please consider merging these cleanups and CSI capture format support additions. regards Philipp The following changes since commit bbe4a089e299efe696ef520e58513c12c0d497c9: gpu: ipu-csi: Check for field type alternate (2018-07-16 16:56:35 +0200) are available in the Git repository

[Bug 107277] Raven: pci_pm_suspend takes over 1 second

https://bugs.freedesktop.org/show_bug.cgi?id=107277 --- Comment #11 from Paul Menzel --- Created attachment 140734 --> https://bugs.freedesktop.org/attachment.cgi?id=140734=edit HTML output of `sudo ./sleepgraph.py -config config/suspend-callgraph.cfg` with filter for amdgpu (In reply to

[GIT PULL] drm/imx: imx-drm ldb and ipu-v3 csi fixes

Hi Dave, is there still room to get this into v4.18? The LDB bind patch fixes a possible loss of LVDS display output on boot on devices where the bootloader shows a splash screen and leaves the display enabled. The CSI patch fixes interlaced capture from V4L2 subdevices that report

[Bug 107045] [4.18rc2] RX470 dGPU on hybrid laptop freezes screen after use

https://bugs.freedesktop.org/show_bug.cgi?id=107045 --- Comment #16 from taij...@posteo.de --- Oh and this service thingy naturally works just fine with amdgpu either blacklisted or 4.14-lts with dc=0. -- You are receiving this mail because: You are the assignee for the

[Bug 107045] [4.18rc2] RX470 dGPU on hybrid laptop freezes screen after use

https://bugs.freedesktop.org/show_bug.cgi?id=107045 --- Comment #15 from taij...@posteo.de --- Created attachment 140733 --> https://bugs.freedesktop.org/attachment.cgi?id=140733=edit dmesg output 4.18rc5 + drm-fixes-2018-07-20 OK, so I have some new, probably interesting dmesg output with the

[Bug 105684] Loading amdgpu hits general protection fault: 0000 [#1] SMP NOPTI

https://bugs.freedesktop.org/show_bug.cgi?id=105684 --- Comment #34 from Paul Menzel --- Booting with `systemd.unit=multi-user.target`, that means GDM is not started, amdgpu doesn’t crash. [ 14.975926] [drm] Found VCN firmware Version: 1.73 Family ID: 18 [ 15.144612] amdgpu: [powerplay] dpm

[PATCH RESEND 2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller

The MBUS controller drives the MBUS that other devices in the SoC will use to perform DMA. It also has a register interface that allows to monitor and control the bandwidth and priorities for masters on that bus. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/sunxi-mbus.txt

[PATCH RESEND 6/7] clk: sunxi-ng: sun5i: Export the MBUS clock

The MBUS clock is used by the MBUS controller, so let's export it so that we can use it in our DT node. Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- drivers/clk/sunxi-ng/ccu-sun5i.h | 4 include/dt-bindings/clock/sun5i-ccu.h | 2 +- 2 files changed, 1 insertion(+), 5

[PATCH RESEND 7/7] ARM: dts: sun5i: Add the MBUS controller

The MBUS (and its associated controller) is the bus in the Allwinner SoCs that DMA devices use in the system to access the memory. Among other things (and depending on the SoC generation), it can also enforce priorities or report bandwidth usages on a per-master basis. One of the most notable

[PATCH RESEND 4/7] of: address: Add support for the dma-parent property

Some SoCs have devices that are using a separate bus from the main bus to perform DMA. These buses might have some restrictions and/or different mapping than from the CPU side, so we'd need to express those using the usual dma-ranges, but using a different DT node than the node's parent. Add

[PATCH RESEND 5/7] drm/sun4i: Rely on dma-parent for our RAM offset

Now that we can express our DMA topology, rely on those property instead of hardcoding an offset from the dma_addr_t which wasn't really great. We still need to add some code to deal with the old DT that would lack that property, but we move the offset to the DRM device dma_pfn_offset to be able

[PATCH RESEND 3/7] of: address: Add parent pointer to the __of_translate_address args

The __of_translate_address function is used to translate the device tree addresses to physical addresses using the various ranges property to create the offset. However, it's shared between the CPU addresses (based on the ranges property) and the DMA addresses (based on dma-ranges). Since we're

[PATCH RESEND 1/7] dt-bindings: Add a dma-parent property

The current DT bindings assume that the DMA will be performed by the devices through their parent DT node, and rely on that assumption for the address translation using dma-ranges. However, some SoCs have devices that will perform DMA through another bus, with separate address translation rules.

[PATCH RESEND 0/7] sunxi: Add DT representation for the MBUS controller

Hi, We've had for quite some time to hack around in our drivers to take into account the fact that our DMA accesses are not done through the parent node, but through another bus with a different mapping than the CPU for the RAM (0 instead of 0x4000 for most SoCs). After some discussion after

Re: [PATCH 1/2] drm/scheduler: modify API to avoid redundancy

Am 20.07.2018 um 14:21 schrieb Nayan Deshmukh: entity has a scheduler field and we don't need the sched argument in any of the functions where entity is provided. Signed-off-by: Nayan Deshmukh Reviewed-by: Christian König for the series. --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|

[PATCH 3/4] drm/virtio: Fix virtio gpu fbdev deinitialization.

Module parameter virtio_gpu_fbdev is used to enable or disable fbdev in virtio. It is checked during fbdev initialization, but is not checked during deinitialization. Moving fbdev destruction to virtgpu_kms.c instead of virtgpu_display.c places deinitialization to the same file as initialization,

[PATCH 4/4] drm/virtio: Fix connector leak during virtio-gpu deinitialization.

Attaching CRTC to a connector increases its reference count, preventing it from correct deinitialization. Following kernel log is printed when the leak is found: Console: switching to colour VGA+ 80x25 WARNING: at drivers/gpu/drm/drm_mode_config.c:431 ... Call

[PATCH 1/4] drm/virtio: Fix memory leak during framebuffer destruction.

In function virtio_gpufb_create, a virtio_gpu_object is allocated for framebuffer using virtio_gpu_alloc_object. In virtio_gpu_fbdev_destroy, instead of freeing the object, pointer to it is set to NULL. This leads to memory leak during framebuffer destruction, which is reported to kmesg with a

[PATCH 2/4] drm/virtio: Remove incorrect kfree during connector destruction.

In function virtio_gpu_conn_destroy a pointer to a containing structure virtio_gpu_output is received using drm_connector_to_virtio_gpu_output (container_of), and then it is passed to kfree function. But this pointer points to a member of array (vgdev->outputs + index) (see vgdev_output_init):

[PATCH 0/4] Fix virtio-gpu deinitialization paths.

This series of patches aims to fix some bugs and memory leaks in virtio-gpu deinitialization paths. While denitialization paths is not usually executed in any virtio-gpu usecase, it is useful for testing during implementation of virtio-gpu device part. Damir Shaikhutdinov (4): drm/virtio: Fix

Re: [PATCH 01/21] dt-bindings: msm/dsi: Add mdp transfer time to msm dsi binding

On Mon, Jul 09, 2018 at 01:31:37PM -0400, Sean Paul wrote: > From: Jeykumar Sankaran > > Adds mdp transfer time to msm dsi binding > > Signed-off-by: Jeykumar Sankaran > Signed-off-by: Rajesh Yadav > Signed-off-by: Sean Paul > --- > .../devicetree/bindings/display/msm/dsi.txt | 16

Re: [PATCH V4 7/8] backlight: qcom-wled: add support for short circuit handling

On 09/07/18 11:22, Kiran Gunda wrote: Handle the short circuit interrupt and check if the short circuit interrupt is valid. Re-enable the module to check if it goes away. Disable the module altogether if the short circuit event persists. Signed-off-by: Kiran Gunda Reviewed-by: Bjorn Andersson

Re: [PATCH V4 6/8] backlight: qcom-wled: Add support for WLED4 peripheral

On 09/07/18 11:22, Kiran Gunda wrote: WLED4 peripheral is present on some PMICs like pmi8998 and pm660l. It has a different register map and configurations are also different. Add support for it. Signed-off-by: Kiran Gunda --- Changes from V3: - The WLED3 specific changes are splitted

Re: [PATCH V4 5/8] backlight: qcom-wled: Restructure the driver for WLED3

On 09/07/18 11:22, Kiran Gunda wrote: Restructure the driver to add the support for new WLED peripherals. Signed-off-by: Kiran Gunda Acked-by: Daniel Thompson --- Changes from V3: - This is the new patch after splitting the "backlight: qcom-wled: Add support for WLED4

[Bug 107309] libGL error: MESA-LOADER: failed to retrieve device information on virgl

https://bugs.freedesktop.org/show_bug.cgi?id=107309 Bug ID: 107309 Summary: libGL error: MESA-LOADER: failed to retrieve device information on virgl Product: DRI Version: XOrg git Hardware: Other OS: All

Re: [PATCH V4 4/8] backlight: qcom-wled: Rename PM8941* to WLED3

On 09/07/18 11:22, Kiran Gunda wrote: Rename the PM8941* references as WLED3 to make the driver generic and have WLED support for other PMICs. Signed-off-by: Kiran Gunda --- Changes from V3: - Changed the MODULE_DESCRIPTION drivers/video/backlight/qcom-wled.c | 248

Re: [PATCH V4 3/8] backlight: qcom-wled: Add new properties for PMI8998

On 09/07/18 11:22, Kiran Gunda wrote: Update the bindings with the new properties used for PMI8998. Signed-off-by: Kiran Gunda Acked-by: Daniel Thompson --- Changes from V3: - Removed the default values. - Removed pmi8998 example.

[Bug 200607] [amdgpu] Polaris10 driver crash with DC enabled

https://bugzilla.kernel.org/show_bug.cgi?id=200607 Parker Reed (parker.l.r...@gmail.com) changed: What|Removed |Added Summary|[amdgpu] Polaris10 driver |[amdgpu]

Re: [PATCH 25/25] drm/armada: add iturbt_709 plane property to control YUV colorspace

On Fri, Jul 20, 2018 at 12:39:30PM +0100, Russell King - ARM Linux wrote: > On Mon, Jan 01, 2018 at 12:17:35PM +, Russell King - ARM Linux wrote: > > On Wed, Dec 13, 2017 at 06:22:14PM +0200, Ville Syrjälä wrote: > > > On Wed, Dec 13, 2017 at 11:12:18AM -0500, Ilia Mirkin wrote: > > > > On

[PATCH 2/2] drm/scheduler: remove sched field from the entity

The scheduler of the entity is decided by the run queue on which it is queued. This patch avoids us the effort required to maintain a sync between rq and sched field when we start shifting entites among different rqs. Signed-off-by: Nayan Deshmukh --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|

[PATCH 1/2] drm/scheduler: modify API to avoid redundancy

entity has a scheduler field and we don't need the sched argument in any of the functions where entity is provided. Signed-off-by: Nayan Deshmukh --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 13 +

Re: [PATCH v3 0/2] fbdev/core: Disable console-lock warnings when fb.lockless_register_fb is set

On (07/19/18 12:15), Thomas Zimmermann wrote: > this is version 3 of the WARN_CONSOLE_UNLOCKED patch set. The > macro prints a warning if the console's critical sections are > entered without holding the console lock. This patch set allows > to disable the warnings while debugging the console. >

[PATCH libdrm] tests/modetest: Add modetest_atomic tool

This is a modetest like tool but using atomic API. With modetest_atomic it is mandatory to specify a mode ("-s") and a plane ("-P") to display a pattern on screen. "-v" does a loop swapping between two framebuffers for each active planes. modetest_atomic doesn't offer cursor support

[PATCH libdrm] tests/util: Add support for stm module

Signed-off-by: Benjamin Gaignard --- tests/util/kms.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/util/kms.c b/tests/util/kms.c index 8b3e7878..a2d1d7ba 100644 --- a/tests/util/kms.c +++ b/tests/util/kms.c @@ -144,6 +144,7 @@ static const char * const modules[] = {

[PATCH] drm/cirrus: Use drm_framebuffer_put to avoid kernel oops in clean-up

In the Cirrus driver, the regular clean-up code also performs the clean-up of a failed initialization. If the fbdev's framebuffer was not initialized, the clean-up will fail within drm_framebuffer_unregister_private. Booting with cirrus.bpp=16 triggers this bug. The framebuffer is currently

[Bug 101478] Display not working after a certain commit

https://bugs.freedesktop.org/show_bug.cgi?id=101478 John changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because:

Re: [PATCH v2] drm/amd/display/dc/dce: Fix multiple potential integer overflows

Hi Alex, Harry, I wonder if this patch should have been tagged for stable. Thanks -- Gustavo On 07/04/2018 08:22 AM, Gustavo A. R. Silva wrote: > Add suffix ULL to constant 5 and cast variables target_pix_clk_khz and > feedback_divider to uint64_t in order to avoid multiple potential integer >

[PATCH v15] drm/bridge: add support for sn65dsi86 bridge driver

Add support for TI's sn65dsi86 dsi2edp bridge chip. The chip converts DSI transmitted signal to eDP signal, which is fed to the connected eDP panel. This chip can be controlled via either i2c interface or dsi interface. Currently in driver all the control registers are being accessed through i2c

[PATCH] gpu/drm/hisilicon: Convert drm_atomic_helper_suspend/resume()

convert drm_atomic_helper_suspend/resume() to use drm_mode_config_helper_suspend/resume(). Fixed one sparse warning by making hibmc_drm_interrupt static. Signed-off-by: Souptick Joarder Signed-off-by: Ajit Negi --- drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 24

Re: [alsa-devel] [PATCH v2 0/3] Make the audio component binding more generic

On 7/19/18 1:56 PM, Takashi Iwai wrote: On Thu, 19 Jul 2018 15:05:45 +0200, Pierre-Louis Bossart wrote: On 7/19/18 12:50 AM, Takashi Iwai wrote: On Wed, 18 Jul 2018 22:54:35 +0200, Pierre-Louis Bossart wrote: On 07/17/2018 04:26 AM, Takashi Iwai wrote: Hi, this is a preliminiary patch

Re: [alsa-devel] [PATCH v2 0/3] Make the audio component binding more generic

On 7/19/18 12:50 AM, Takashi Iwai wrote: On Wed, 18 Jul 2018 22:54:35 +0200, Pierre-Louis Bossart wrote: On 07/17/2018 04:26 AM, Takashi Iwai wrote: Hi, this is a preliminiary patch set to convert the existing i915 / HD-audio component binding to be applicable to other drivers like radeon

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