Hi
Am 05.07.21 um 23:29 schrieb Melissa Wen:
On 07/05, Daniel Vetter wrote:
On Mon, Jul 05, 2021 at 12:05:28PM +0200, Thomas Zimmermann wrote:
Hi
Am 05.07.21 um 11:27 schrieb Daniel Vetter:
On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
Vkms copies each plane's
Hi
Am 05.07.21 um 16:20 schrieb Daniel Vetter:
On Mon, Jul 05, 2021 at 12:05:28PM +0200, Thomas Zimmermann wrote:
Hi
Am 05.07.21 um 11:27 schrieb Daniel Vetter:
On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
Vkms copies each plane's framebuffer into the output buffer;
I am also hitting this with upstream. Reverting d02117f8efaa ("drm/ttm: remove
special handling for non GEM drivers") also fixed it for me.
The change log for that commit reads:
drm/ttm: remove special handling for non GEM drivers
vmwgfx is the only driver actually using this. Move
[Public]
Thank you for the patch, Yingliang.
There is a similar patch sent out last Saturday and under review. Please check
it.
[PATCH 3/4] drm/amdgpu: unlock on error in amdgpu_ras_debugfs
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Yang
Yingliang
Sent: Monday,
add algea.cao and andy.yan
在 2021/7/5 22:03, Benjamin Gaignard 写道:
Add a new dw_hdmi_plat_data struct and new compatible for rk3568.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 28 +
1 file changed, 28 insertions(+)
diff --git
Alex,
I think we should pull these through amd-staging-drm-next.
Regards,
Luben
On 2021-07-04 11:18 a.m., Luben Tuikov wrote:
> Series is,
> Reviewed-by: Luben Tuikov
>
> Regards,
> Luben
>
> On 2021-07-03 5:44 a.m., Dan Carpenter wrote:
>> If amdgpu_eeprom_read() returns a negative error code
Commit "drm/vc4: hdmi: Convert to gpiod" changes the behavior of
vc4_hdmi_connector_detect() which results into CPU hangs in case there
is no HDMI connected. Let's restore the old behavior.
Reported-by: Nathan Chancellor
Reported-by: Ojaswin Mujoo
Fixes: 6800234ceee0 ("drm/vc4: hdmi: Convert to
On 07/05, Daniel Vetter wrote:
> On Mon, Jul 05, 2021 at 12:05:28PM +0200, Thomas Zimmermann wrote:
> > Hi
> >
> > Am 05.07.21 um 11:27 schrieb Daniel Vetter:
> > > On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
> > > > Vkms copies each plane's framebuffer into the output
Hi Nathan,
I may have just spotted something in these logs...
On Fri, Jul 02, 2021 at 10:55:17PM -0700, Nathan Chancellor wrote:
> [2.340956] pci :0c:00.1: Adding to iommu group 4
> [2.340996] pci :0c:00.2: Adding to iommu group 4
> [2.341038] pci :0c:00.3: Adding to
https://bugzilla.kernel.org/show_bug.cgi?id=209457
--- Comment #31 from Leandro Jacques (ls...@yahoo.com) ---
How to file a bug to the linux-firmware project for the amdgpu driver? After
the downgrade I haven't experienced any issues anymore.
--
You may reply to this email to add a comment.
https://bugzilla.kernel.org/show_bug.cgi?id=213391
--- Comment #29 from Leandro Jacques (ls...@yahoo.com) ---
How to file a bug to the linux-firmware project for the amdgpu driver? After
the downgrade I haven't experienced any issues anymore.
--
You may reply to this email to add a comment.
Hi Nirmoy,
Many thanks for this information. We will test this patch asap.
Have a nice day,
Christian
On 05 July 2021 at 10:26pm, Nirmoy wrote:
> Hi Christian,
>
>
> This issue looks similar to the one Mikel Rychliski fixed recently :
https://patchwork.freedesktop.org/patch/440791. Let us
On Mon, Jul 05, 2021 at 04:03:14PM +0300, Oded Gabbay wrote:
> + rc = sg_alloc_table(*sgt, nents, GFP_KERNEL | __GFP_ZERO);
> + if (rc)
> + goto error_free;
If you are not going to include a CPU list then I suggest setting
sg_table->orig_nents == 0
And using only the nents
On Mon, Jul 5, 2021 at 9:39 AM Michel Dänzer wrote:
>
> On 2021-07-03 9:59 p.m., Mario Kleiner wrote:
> > Generated using make headers_install from the drm-next
> > tree - git://anongit.freedesktop.org/drm/drm
> > branch - drm-next
> > commit - 8a02ea42bc1d4c448caf1bab0e05899dad503f74
> >
> > The
Hi Laurent
On Fri, 2 Jul 2021 at 21:19, Laurent Pinchart
wrote:
>
> Hi Dave,
>
> On Fri, Jul 02, 2021 at 06:44:22PM +0100, Dave Stevenson wrote:
> > On Fri, 2 Jul 2021 at 17:47, Laurent Pinchart wrote:
> > > On Mon, Jun 21, 2021 at 04:59:51PM +0300, Laurent Pinchart wrote:
> > >> On Mon, Jun 21,
Am 01.07.21 um 15:24 schrieb Pekka Paalanen:
> On Thu, 1 Jul 2021 14:50:13 +0200
> Werner Sembach wrote:
>
>> Am 01.07.21 um 10:07 schrieb Pekka Paalanen:
>>
>>> On Wed, 30 Jun 2021 11:20:18 +0200
>>> Werner Sembach wrote:
>>>
Am 30.06.21 um 10:41 schrieb Pekka Paalanen:
> On
Hi Laurent.
Thanks to you, Jani, and Jagan for your replies.
I'm replying to Laurent's email as it has the greatest number of
discussion points.
Noted that NWL DSI and Exynos DSI have undergone the conversion to
bridges - hopefully I can take those as vague examples.
On Fri, 2 Jul 2021 at
On 05/07/2021 15:25, Daniel Vetter wrote:
On Mon, Jul 05, 2021 at 09:34:22AM +0100, Tvrtko Ursulin wrote:
On 02/07/2021 20:22, Daniel Vetter wrote:
On Fri, Jul 02, 2021 at 03:31:08PM +0100, Tvrtko Ursulin wrote:
On 01/07/2021 16:10, Matthew Auld wrote:
The CPU domain should be static for
On Mon, Jul 05, 2021 at 10:15:45AM +0800, Desmond Cheong Zhi Xi wrote:
> On 3/7/21 3:07 am, Daniel Vetter wrote:
> > On Fri, Jul 02, 2021 at 12:53:53AM +0800, Desmond Cheong Zhi Xi wrote:
> > > This patch series addresses potential use-after-free errors when
> > > dereferencing pointers to struct
On Mon, Jul 05, 2021 at 09:34:22AM +0100, Tvrtko Ursulin wrote:
> On 02/07/2021 20:22, Daniel Vetter wrote:
> > On Fri, Jul 02, 2021 at 03:31:08PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 01/07/2021 16:10, Matthew Auld wrote:
> > > > The CPU domain should be static for discrete, and on DG1 we
On Mon, Jul 05, 2021 at 12:05:28PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 05.07.21 um 11:27 schrieb Daniel Vetter:
> > On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
> > > Vkms copies each plane's framebuffer into the output buffer; essentially
> > > using a shadow
The CPU domain should be static for discrete, and on DG1 we don't need
any flushing since everything is already coherent, so really all this
does is an object wait, for which we have an ioctl. Longer term the
desired caching should be an immutable creation time property for the
BO, which can be
Convert all the drm_i915_gem_set_domain bits to proper kernel doc.
Suggested-by: Daniel Vetter
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Maarten Lankhorst
Cc: Tvrtko Ursulin
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Jason Ekstrand
Cc: Daniel Vetter
Cc: Ramalingam C
---
It's a noop on DG1, and in the future when need to support other devices
which let us control the coherency, then it should be an immutable
creation time property for the BO. This will likely be controlled
through a new gem_create_ext extension.
v2: add some kernel doc for the discrete changes,
Convert all the drm_i915_gem_caching bits to proper kernel doc.
Suggested-by: Daniel Vetter
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Maarten Lankhorst
Cc: Tvrtko Ursulin
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Jason Ekstrand
Cc: Daniel Vetter
Cc: Ramalingam C
---
For discrete, users of pin_map() needs to obey the same rules at the TTM
backend, where we map system only objects as WB, and everything else as
WC. The simplest for now is to just force the correct mapping type as
per the new rules for discrete.
Suggested-by: Thomas Hellström
Signed-off-by:
On 02/07/2021 02:40, Chunyou Tang wrote:
> Hi Steve,
>> You didn't answer my previous question:
>>
>>> Is this device working with the kbase/DDK proprietary driver?
>
> I don't know whether I used kbase/DDK,I only know I used the driver of
> panfrost in linux 5.11.
kbase is the Linux kernel
When it fail to create crtc_event kthread, it just jump to err_msm_uninit,
while the 'ret' is not updated. So assign the return code before that.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Reported-by: Hulk Robot
Signed-off-by: Wei Li
Reviewed-by: Abhinav Kumar
---
From: Tomer Tayar
Implement the calls to the dma-buf kernel api to create a dma-buf
object backed by FD.
We block the option to mmap the DMA-BUF object because we don't support
DIRECT_IO and implicit P2P. We only implement support for explicit P2P
through importing the FD of the DMA-BUF.
In
User process might want to share the device memory with another
driver/device, and to allow it to access it over PCIe (P2P).
To enable this, we utilize the dma-buf mechanism and add a dma-buf
exporter support, so the other driver can import the device memory and
access it.
The device memory is
Hi,
I'm sending v4 of this patch-set following the long email thread.
I want to thank Jason for reviewing v3 and pointing out the errors, saving
us time later to debug it :)
I consulted with Christian on how to fix patch 2 (the implementation) and
at the end of the day I shamelessly copied the
Move the PLL constants to the RO data section by declaring them as
static const. No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 70 --
1 file changed, 31 insertions(+), 39 deletions(-)
diff --git
The _set_plls() functions compute a pixel clock's PLL values
and program the hardware accordingly. This happens during atomic
commits.
For atomic modesetting, it's better to separate computation and
programming from each other. This will allow to compute the PLL
value during atomic checks and
Several PLL functions compute values for different device types. Split
them up to make the code more readable. No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 256 ++---
1 file changed, 146 insertions(+), 110 deletions(-)
The CRTC state in mgag200 will hold PLL values for modeset operations.
Simple KMS helpers already support custom state for planes. Extend the
helpers to support custom CRTC state as well.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_simple_kms_helper.c | 39 +++--
Replace P_ARRAY_SIZE by array pre-initializing and ARRAY_SIZE(). No
functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
PLL setup can fail if the display mode's clock is not supported by
any PLL configuration. Compute the PLL values during atomic check, so
that atomic commits can fail at the appropriate time. If successful,
use the values in the atomic-update phase.
Signed-off-by: Thomas Zimmermann
---
Move PLL compute and update functionality to distict places within
the file. Contains some minor style cleanups, but no functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 737 +
1 file changed, 369 insertions(+), 368
The fields in struct mgag200_pll_values currently hold the bits of
each register. Store the PLL values instead and let the PLL-update
code figure out the bits for each register.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 153 +++--
1 file
The compute function for G200SE pixle PLLs handles two revisions with
different algorithms. Split it accordingly to make it readable.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 165 +++--
1 file changed, 97 insertions(+), 68 deletions(-)
The S parameter is controls the loop filter bandwidth when programming
the PLL. It's currently stored as part of P (i.e., the clock divider.)
Add a separate variable for S prepares the PLL code for a further
refactoring.
Signed-off-by: Thomas Zimmermann
---
Return -EINVAL if there's no PLL configuration for the given pixel
clock.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
Put the clock-selection code into each of the PLL-update functions to
make them select the correct pixel clock.
The pixel clock for video output was not actually set before programming
the clock's values. It worked because the device had the correct clock
pre-set.
Signed-off-by: Thomas
Split the PLL setup code into computation and update functions; compute
the PLL values during atomic checks, update the PLL during atomic commits;
cleanup the whole thing.
The current PLL setup code for mgag200 mixes up computation if the PLL
values and programming the HW. Both is done during
On Mon, Jul 5, 2021 at 5:43 PM Marek Szyprowski
wrote:
>
> On 05.07.2021 14:00, Jagan Teki wrote:
> > On Mon, Jul 5, 2021 at 5:18 PM Marek Szyprowski
> > wrote:
> >> On 04.07.2021 11:02, Jagan Teki wrote:
> >>> Use drm_panel_bridge to replace manual panel and
> >>> bridge_chain handling code.
>
On 05.07.2021 14:00, Jagan Teki wrote:
> On Mon, Jul 5, 2021 at 5:18 PM Marek Szyprowski
> wrote:
>> On 04.07.2021 11:02, Jagan Teki wrote:
>>> Use drm_panel_bridge to replace manual panel and
>>> bridge_chain handling code.
>>>
>>> This makes the driver simpler to allow all components
>>> in the
On Mon, Jul 5, 2021 at 5:18 PM Marek Szyprowski
wrote:
>
> On 04.07.2021 11:02, Jagan Teki wrote:
> > Use drm_panel_bridge to replace manual panel and
> > bridge_chain handling code.
> >
> > This makes the driver simpler to allow all components
> > in the display pipeline to be treated as bridges
On Fri, 02 Jul 2021, Tvrtko Ursulin wrote:
> On 01/07/2021 21:23, Matt Roper wrote:
>> From: Lucas De Marchi
>>
>> Besides the arch version returned by GRAPHICS_VER(), new platforms
>> contain a "release id" to make clear the difference from one platform to
>> another. Although for the first
Quoting Daniel Vetter (2021-07-02 23:17:08)
> We're not consistently recommending these for developers only.
>
> I stumbled over this due to DRM_I915_LOW_LEVEL_TRACEPOINTS, which was
> added in
>
> commit 354d036fcf70654cff2e2cbdda54a835d219b9d2
> Author: Tvrtko Ursulin
> Date: Tue Feb 21
On 04.07.2021 11:02, Jagan Teki wrote:
> Use drm_panel_bridge to replace manual panel and
> bridge_chain handling code.
>
> This makes the driver simpler to allow all components
> in the display pipeline to be treated as bridges by
> cleaning the way to generic connector handling.
>
>
Hi,
will you review my patch?
Best regards
Thomas
Am 24.06.21 um 12:50 schrieb Lucas Stach:
Am Donnerstag, dem 24.06.2021 um 12:47 +0200 schrieb Thomas Zimmermann:
Hi
Am 24.06.21 um 11:11 schrieb Lucas Stach:
Am Donnerstag, dem 24.06.2021 um 10:58 +0200 schrieb Thomas Zimmermann:
Moving
Hi
Am 05.07.21 um 11:27 schrieb Daniel Vetter:
On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
Vkms copies each plane's framebuffer into the output buffer; essentially
using a shadow buffer. DRM provides struct drm_shadow_plane_state, which
handles the details of
On Fri, Jul 2, 2021 at 10:12 PM Laurent Pinchart
wrote:
>
> Hi Dave,
>
> (Expanding the CC list a bit)
>
> On Fri, Jul 02, 2021 at 12:03:31PM +0100, Dave Stevenson wrote:
> > Hi All
> >
> > I'm trying to get DSI devices working reliably on the Raspberry Pi,
> > but I'm hitting a number of places
On 05/07/2021 09:29, Boris Brezillon wrote:
> This should help limit the number of ioctls when submitting multiple
> jobs. The new ioctl also supports syncobj timelines and BO access flags.
>
> v4:
> * Implement panfrost_ioctl_submit() as a wrapper around
> panfrost_submit_job()
> * Replace
On Mon, Jul 05, 2021 at 10:29:48AM +0200, Boris Brezillon wrote:
> This should help limit the number of ioctls when submitting multiple
> jobs. The new ioctl also supports syncobj timelines and BO access flags.
>
> v4:
> * Implement panfrost_ioctl_submit() as a wrapper around
>
On Mon, Jul 05, 2021 at 09:46:29AM +0200, Thomas Zimmermann wrote:
> Vkms copies each plane's framebuffer into the output buffer; essentially
> using a shadow buffer. DRM provides struct drm_shadow_plane_state, which
> handles the details of mapping/unmapping shadow buffers into memory for
>
On Tue, 29 Jun 2021, Kuogee Hsieh wrote:
> From: Rajkumar Subbiah
>
> Commit 2f015ec6eab6 ("drm/dp_mst: Add sideband down request tracing +
> selftests") added some debug code for sideband message tracing. But
> it seems to have unintentionally changed the behavior on sideband message
> failure.
Signed-off-by: Cai Huoqing
Reviewed-by: Karol Herbst
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 4f3a5357dd56..c5624048de5e 100644
---
On 05/07/2021 09:29, Boris Brezillon wrote:
> Needed to keep VkQueues isolated from each other.
>
> v4:
> * Make panfrost_ioctl_create_submitqueue() return the queue ID
> instead of a queue object
>
> v3:
> * Limit the number of submitqueue per context to 16
> * Fix a deadlock
>
>
On Fri, 02 Jul 2021, Laurent Pinchart wrote:
> On Fri, Jul 02, 2021 at 12:03:31PM +0100, Dave Stevenson wrote:
>> Hi All
>>
>> I'm trying to get DSI devices working reliably on the Raspberry Pi,
>> but I'm hitting a number of places where it isn't clear as to the
>> expected behaviour within
On 05/07/2021 09:43, Boris Brezillon wrote:
> Hi Steven,
>
> On Mon, 5 Jul 2021 09:22:39 +0100
> Steven Price wrote:
>
>> On 02/07/2021 19:11, Boris Brezillon wrote:
>>> On Fri, 2 Jul 2021 12:49:55 -0400
>>> Alyssa Rosenzweig wrote:
>>>
>> ```
>>> #define
Hi Steven,
On Mon, 5 Jul 2021 09:22:39 +0100
Steven Price wrote:
> On 02/07/2021 19:11, Boris Brezillon wrote:
> > On Fri, 2 Jul 2021 12:49:55 -0400
> > Alyssa Rosenzweig wrote:
> >
> ```
> > #define PANFROST_BO_REF_EXCLUSIVE 0x1
> > +#define
On Mon, Jul 05, 2021 at 11:21:22AM +0300, Jani Nikula wrote:
> On Sat, 03 Jul 2021, Corentin Labbe wrote:
> > Hello
> >
> > On next-20210701, my screen is stuck (see attached photo).
> > I bisect the problem to:
> > git bisect start
> > # good: [62fb9874f5da54fdb243003b386128037319b219] Linux
On 02/07/2021 20:22, Daniel Vetter wrote:
On Fri, Jul 02, 2021 at 03:31:08PM +0100, Tvrtko Ursulin wrote:
On 01/07/2021 16:10, Matthew Auld wrote:
The CPU domain should be static for discrete, and on DG1 we don't need
any flushing since everything is already coherent, so really all this
We now have a new ioctl that allows submitting multiple jobs at once
(among other things) and we support timelined syncobjs. Bump the
minor version number to reflect those changes.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 4 +++-
1
This should help limit the number of ioctls when submitting multiple
jobs. The new ioctl also supports syncobj timelines and BO access flags.
v4:
* Implement panfrost_ioctl_submit() as a wrapper around
panfrost_submit_job()
* Replace stride fields by a version field which is mapped to
a
Needed to keep VkQueues isolated from each other.
v4:
* Make panfrost_ioctl_create_submitqueue() return the queue ID
instead of a queue object
v3:
* Limit the number of submitqueue per context to 16
* Fix a deadlock
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/Makefile
Now that we have a new SUBMIT ioctl dealing with timelined syncojbs we
can advertise the feature.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
So we can re-use it from elsewhere.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 52 ++---
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
So we don't have to change the prototype if we extend the function.
v3:
* Fix subject
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_job.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git
Jobs reading from the same BO should not be serialized. Add access
flags so we can relax the implicit dependencies in that case. We force
exclusive access for now to keep the behavior unchanged, but a new
SUBMIT ioctl taking explicit access flags will be introduced.
Signed-off-by: Boris Brezillon
Hello,
This is an attempt at providing a new submit ioctl that's more
Vulkan-friendly than the existing one. This ioctl
1/ allows passing several out syncobjs so we can easily update
several fence/semaphore in a single ioctl() call
2/ allows passing several jobs so we don't have to have one
Hi Christian,
This issue looks similar to the one Mikel Rychliski fixed recently :
https://patchwork.freedesktop.org/patch/440791. Let us know if this helps.
Regards,
Nirmoy
On 7/3/2021 9:30 AM, Christian Zigotzky wrote:
Hi All,
Xorg doesn't work anymore after the latest DRM updates.
On 02/07/2021 19:11, Boris Brezillon wrote:
> On Fri, 2 Jul 2021 12:49:55 -0400
> Alyssa Rosenzweig wrote:
>
```
> #define PANFROST_BO_REF_EXCLUSIVE0x1
> +#define PANFROST_BO_REF_NO_IMPLICIT_DEP 0x2
```
This seems logically backwards. NO_IMPLICIT_DEP
On Sat, 03 Jul 2021, Corentin Labbe wrote:
> Hello
>
> On next-20210701, my screen is stuck (see attached photo).
> I bisect the problem to:
> git bisect start
> # good: [62fb9874f5da54fdb243003b386128037319b219] Linux 5.13
> git bisect good 62fb9874f5da54fdb243003b386128037319b219
> # bad:
Vkms copies each plane's framebuffer into the output buffer; essentially
using a shadow buffer. DRM provides struct drm_shadow_plane_state, which
handles the details of mapping/unmapping shadow buffers into memory for
active planes.
Convert vkms to the helpers. Makes vkms use shared code and
Replace vkms' prepare_fb and cleanup_fb functions with the generic
code for shadow-buffered planes. No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/vkms/vkms_plane.c | 38 +--
1 file changed, 1 insertion(+), 37 deletions(-)
diff --git
Store the shadow-buffer mapping's address in struct vkms_composer and
use the value when composing the output. It's the same value as stored
in the GEM SHMEM BO, but frees the composer code from its dependency
on GEM SHMEM.
Using struct dma_buf_map is how framebuffer access is supposed to be.
The
Subclass struct drm_shadow_plane_state for VKMS planes and update
all plane-state callbacks accordingly.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/vkms/vkms_composer.c | 2 +-
drivers/gpu/drm/vkms/vkms_drv.h | 5 +++--
drivers/gpu/drm/vkms/vkms_plane.c| 16
Export the implementation of duplicate, destroy and reset helpers for
shadow-buffered plane state. Useful for drivers that subclass struct
drm_shadow_plane_state.
The exported functions are wrappers around plane-state implementation,
but using them is the correct thing to do for drivers.
On 2021-07-03 9:59 p.m., Mario Kleiner wrote:
> Generated using make headers_install from the drm-next
> tree - git://anongit.freedesktop.org/drm/drm
> branch - drm-next
> commit - 8a02ea42bc1d4c448caf1bab0e05899dad503f74
>
> The changes were as follows (shortlog from
>
On Sat, Jul 3, 2021 at 1:55 PM Nathan Chancellor wrote:
>
> Hi Will and Robin,
>
> On Fri, Jul 02, 2021 at 04:13:50PM +0100, Robin Murphy wrote:
> > On 2021-07-02 14:58, Will Deacon wrote:
> > > Hi Nathan,
> > >
> > > On Thu, Jul 01, 2021 at 12:52:20AM -0700, Nathan Chancellor wrote:
> > > > On
On 6/10/21 12:17 AM, Dmitry Baryshkov wrote:
> Move a call to mdp5_encoder_set_intf_mode() after
> msm_dsi_modeset_init(), removing set_encoder_mode callback.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 +++
> 1 file changed, 3
On Fri, Jun 25, 2021 at 6:52 AM Rob Herring wrote:
>
> On Tue, Jun 15, 2021 at 08:33:12PM +1000, Alistair Francis wrote:
> > Add support for the 10.3" E Ink panel described at:
> > https://www.eink.com/product.html?type=productdetail=7
> >
> > Signed-off-by: Alistair Francis
> > ---
> > v2:
> >
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