On Wed, May 24, 2023 at 03:35:41PM +1000, David Airlie wrote:
> On Wed, May 24, 2023 at 3:26 PM Luis Chamberlain wrote:
> >
> > Hey Dave, just curious if there was going to be another follow up patch
> > for this or if it was already posted. I don't see it clearly so just
> > wanted to double
On Wed, May 24, 2023 at 3:26 PM Luis Chamberlain wrote:
>
> On Wed, May 03, 2023 at 01:19:31PM +1000, Dave Airlie wrote:
> > >
> > > >
> > > >> > the GROUP until after the FIRMWARE, so this can't work, as it already
> > > >> > will have included all the ones below, hence why I bracketed top and
>
On Wed, May 03, 2023 at 01:19:31PM +1000, Dave Airlie wrote:
> >
> > >
> > >> > the GROUP until after the FIRMWARE, so this can't work, as it already
> > >> > will have included all the ones below, hence why I bracketed top and
> > >> > bottom with a group.
> > >>
> > >> well... that is something
On Wed, 24 May 2023 at 03:10, Abhinav Kumar wrote:
>
>
>
> On 5/23/2023 4:53 PM, Dmitry Baryshkov wrote:
> > On Wed, 24 May 2023 at 02:37, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
> >>> Use drm_debugfs_add_file() for encoder's status file. This
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.c:1357:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.c:893:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:899:43:
warning: unused variable 'res_create_maximus_funcs'
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5296
Fixes: 00df97e1df57 ("drm/amd/display: Clean FPGA
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:957:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:101:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_resource.c:1390:43:
warning: unused variable 'res_create_maximus_funcs'
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5296
Fixes: 00df97e1df57 ("drm/amd/display: Clean FPGA
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:884:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:84:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1050:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:705:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.c:1355:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.c:899:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn321/dcn321_resource.c:1346:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn321/dcn321_resource.c:735:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:1356:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:894:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource.c:1360:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource.c:737:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1079:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:731:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
Eliminate the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_resource.c:889:43:
warning: unused variable 'res_create_maximus_funcs'
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5296
Fixes: 00df97e1df57 ("drm/amd/display: Clean FPGA
Eliminate the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1222:43:
warning: unused variable 'res_create_maximus_funcs'
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:658:38:
warning: unused variable 'debug_defaults_diags'
Reported-by:
On Tue, May 23, 2023 at 4:14 PM WANG Xuerui wrote:
>
> On 2023/5/22 16:02, Sui Jingfeng wrote:
> > Hi,
> >
> > On 2023/5/21 20:21, WANG Xuerui wrote:
> >>> --- /dev/null
> >>> +++ b/drivers/gpu/drm/loongson/Kconfig
> >>> @@ -0,0 +1,17 @@
> >>> +# SPDX-License-Identifier: GPL-2.0
> >>> +
> >>>
On Tue, May 23, 2023 at 4:14 PM WANG Xuerui wrote:
>
> On 5/22/23 21:13, Sui Jingfeng wrote:
> > Hi,
> >
> > On 2023/5/22 18:25, WANG Xuerui wrote:
> >> On 2023/5/22 18:17, Sui Jingfeng wrote:
> >>> Hi,
> >>>
> >>> On 2023/5/22 18:05, WANG Xuerui wrote:
> On 2023/5/22 17:49, Sui Jingfeng
Hi Thomas,
Could you help review this patch?
This is an issue leading to kernel panic found by Intel. Wendy has
confirmed issue resolved by this patch.
On 2023/4/14 下午 03:42, Jammy Huang wrote:
In resume, DP's launch function, ast_dp_launch, could wait at most 30
seconds before timeout to
Hi Thomas,
Do you have other suggestion for this patch??
Please kindly advise.
On 2023/4/25 下午 03:39, Jammy Huang wrote:
Hi Thomas,
I think DP501 is OK. It doesn't use ioregs in ast_dp501_read_edid().
On 2023/4/25 下午 03:27, Thomas Zimmermann wrote:
Hi
Am 25.04.23 um 09:03 schrieb Jammy
On Thu, May 18, 2023 at 03:39:02PM -0400, Nícolas F. R. A. Prado wrote:
> Fixes: adca62ec370c ("drm/bridge: anx7625: Support reading edid through aux
> channel")
> Fixes: 269332997a16 ("drm/bridge: anx7625: Return -EPROBE_DEFER if the dsi
> host was not found")
> Reported-by: "kernelci.org bot"
On 5/23/2023 4:53 PM, Dmitry Baryshkov wrote:
On Wed, 24 May 2023 at 02:37, Abhinav Kumar wrote:
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
Use drm_debugfs_add_file() for encoder's status file. This changes the
name of the status file from encoder%d/status to just encoder%d.
On Wed, 24 May 2023 at 02:37, Abhinav Kumar wrote:
>
>
>
> On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
> > Use drm_debugfs_add_file() for encoder's status file. This changes the
> > name of the status file from encoder%d/status to just encoder%d.
> >
> > Signed-off-by: Dmitry Baryshkov
>
>
Hi,
On Tue, May 23, 2023 at 2:39 PM Dmitry Torokhov
wrote:
>
> Hi Doug,
>
> On Tue, May 23, 2023 at 12:27:54PM -0700, Douglas Anderson wrote:
> >
> > The big motivation for this patch series is mostly described in the patch
> > ("drm/panel: Add a way for other devices to follow panel state"),
On Thu, May 18, 2023 at 8:34 PM Adam Ford wrote:
>
> On Thu, May 18, 2023 at 7:29 PM Fabio Estevam wrote:
> >
> > Hi Adam,
> >
> > On Thu, May 18, 2023 at 8:06 PM Adam Ford wrote:
> > >
> > > This series fixes the blanking pack size and the PMS calculation. It then
> > > adds support to allows
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
Use drm_debugfs_add_file() for encoder's status file. This changes the
name of the status file from encoder%d/status to just encoder%d.
Signed-off-by: Dmitry Baryshkov
This patch depends on
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
This define is used only in one place, in dpu_encoder debugfs code.
Inline the value and drop the define completely.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On Tue, May 23, 2023 at 3:55 PM Conor Dooley wrote:
>
> Hey Justin,
>
> On Tue, May 23, 2023 at 02:53:43PM -0700, Justin Chen wrote:
>
> > + compatible:
> > +enum:
> > + - brcm,asp-v2.0
> > + - brcm,bcm72165-asp
> > + - brcm,asp-v2.1
> > + - brcm,bcm74165-asp
>
> > +
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
This callback has been unused since the driver being added. Drop it now.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
Hey Justin,
On Tue, May 23, 2023 at 02:53:43PM -0700, Justin Chen wrote:
> + compatible:
> +enum:
> + - brcm,asp-v2.0
> + - brcm,bcm72165-asp
> + - brcm,asp-v2.1
> + - brcm,bcm74165-asp
> +compatible = "brcm,bcm72165-asp", "brcm,asp-v2.0";
You can't do this, as
Validate drm_amdgpu_gem_va addrs in amdgpu_gem_va_ioctl.
amdgpu_vm_bo_replace_map no longer needs to validate (and its
validations were insufficient either). amdgpu_vm_bo_map has internal
users and its validations are kept.
This is motivated by OOB access in amdgpu_vm_update_range when
On Mon, May 22, 2023 at 12:12 PM Christian König
wrote:
>
> Am 21.05.23 um 20:49 schrieb Chia-I Wu:
> > On Thu, May 18, 2023 at 1:12 PM Alex Deucher wrote:
> >> On Wed, May 17, 2023 at 5:27 PM Chia-I Wu wrote:
> >>> On Tue, May 9, 2023 at 11:33 AM Chia-I Wu wrote:
> Extend the address and
Reviewed-by: Simon Ser
On Tue, 23 May 2023 14:53:43 -0700, Justin Chen wrote:
> From: Florian Fainelli
>
> Add a binding document for the Broadcom ASP 2.0 Ethernet
> controller.
>
> Signed-off-by: Florian Fainelli
> Signed-off-by: Justin Chen
> ---
> v3
> - Adjust compatible string example to reference SoC
From: Joshua Ashton
Need to funnel the color caps through to these functions so it can check
that the hardware is capable.
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 35 ---
1 file changed, 23 insertions(+), 12
DC only has pre-blending degamma caps (plane/DPP) that is currently in
use for CRTC/post-blending degamma, so that we don't have HW caps to
perform plane and CRTC degamma at the same time. Reject atomic updates
when serspace sets both plane and CRTC degamma properties.
Signed-off-by: Melissa Wen
Map DC shaper LUT to DM CRTC color management. Shaper LUT can be used to
delinearize and/or normalize the color space for computational
efficiency and achiving specific visual styles. Blending usually occurs
in linear space and if a CRTC degamma 1D LUT is set to linearize the
color space, a custom
Inspired by regamma TF, follow similar steps to add TF + 1D LUT for
shaper func. Reuse regamma_tf property, since the driver doesn't support
shaper and out gamma at the same time. Only set shaper TF if setting
shaper LUT or 3D LUT. We could rename regamma_tf - if necessary to avoid
If shaper and 3D LUT data updates, lut_3d bit in update_flag is updated
and we need to call set_input_transfer_func to program DPP shaper and 3D
LUTs. Small cleanup of code style in the related if-condition.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 5
We took a similar path for CRTC color mgmt changes, since we remap CRTC
degamma to plane/DPP block. Here we can use the status of
`plane->color_mgmt_changed` to detect when a plane color property
changed and recreate the plane accordingly.
Co-developed-by: Joshua Ashton
Signed-off-by: Joshua
From: Joshua Ashton
Map DRM plane blend properties to DPP blend gamma. Plane blend is a
post-3D LUT curve that linearizes color space for blending. It may be
defined by a user-blob LUT and/or predefined transfer function. As
hardcoded curve (ROM) is not supported on blend gamma, we use AMD color
We already have the steps to program post-blending shaper/3D LUT on AMD
display driver, but unlike MPC 3D LUT, we don't need to acquire/release
DPP 3D LUT. We can reuse programming steps to map plane properties to
DC plane for pre-blending (plane) shaper/3D LUT setup.
Signed-off-by: Melissa Wen
From: Joshua Ashton
Unlike degamma, blend gamma doesn't support hardcoded curve
(predefined/ROM), but we can use AMD color module to fill blend gamma
parameters when we have non-linear plane gamma TF without plane gamma
LUT. The regular degamma path doesn't hit this.
Signed-off-by: Joshua
From: Joshua Ashton
With `dc_fixpt_from_s3132()` translation, we can just use it to set
hdr_mult.
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 3 +++
2
From: Joshua Ashton
Otherwise this is just initialized to 0. This needs to actually have a
value so that compute_curve can work for PQ EOTF.
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 2
From: Joshua Ashton
Set DC plane with user degamma LUT or predefined TF from driver-specific
plane color properties. If plane and CRTC degamma are set in the same
time, plane degamma has priority. That means, we only set CRTC degamma
if we don't have plane degamma LUT or TF to configure. We
Wire up DC 3D LUT to DM CRTC color management (post-blending). On AMD
display HW, we have to set a shaper LUT to delinearize or normalize the
color space before applying a 3D LUT (since we have a reduced number of
LUT entries). Therefore, we map DC shaper LUT to DM CRTC color mgmt in
the next
From: Joshua Ashton
Detach value translation from CTM to reuse it for programming HDR
multiplier property.
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 8 +---
drivers/gpu/drm/amd/display/include/fixed31_32.h | 12
The next patch adds pre-blending degamma to AMD color mgmt pipeline, but
pre-blending degamma caps (DPP) is currently in use to provide DRM CRTC
atomic degamma or implict degamma on legacy gamma. Detach degamma usage
regarging CRTC color properties to manage plane and CRTC color
correction
In the original dc_acquire_release_mpc_3dlut(), only current ctx is
considered, which doesn't fit the steps for atomic checking new ctx.
Therefore, create a function to handle 3D LUT resource for a given
context, so that we can check resources availability in atomic_check
time and handle failures
From: Joshua Ashton
Add predefined transfer function programming. There is no out gamma ROM,
but we can use AMD color modules to program LUT parameters from a
predefined TF and an empty regamma LUT (or bump up LUT parameters with
predefined TF setup).
Signed-off-by: Joshua Ashton
From: Joshua Ashton
When commiting planes, we copy color mgmt resources to the stream state.
Do the same for shaper and 3D LUTs.
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
Signed-off-by: Joshua Ashton
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file
From: Joshua Ashton
dc_acquire_release_mpc_3dlut_for_ctx initializes the bits required to
program 3DLUT in DC MPC hw block, applied in set_output_transfer_func().
Since acquire/release can fail, we should check resources availability
during atomic check considering the new context created. We
HW allows us to program shaper LUT without 3D LUT settings and it is
also good for testing shaper LUT behavior, therefore, DC driver should
allow acquiring both 3D and shaper LUT, but programing shaper LUT
without 3D LUT (not initialized).
Signed-off-by: Melissa Wen
---
On AMD HW, 3D LUT always assumes a preceding shaper 1D LUT used for
delinearizing and/or normalizing the color space before applying a 3D
LUT.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 14 +
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 10
We will wire up MPC 3D LUT to DM CRTC color pipeline in the next patch,
but so far, only for atomic interface. By checking
set_output_transfer_func in DC drivers with MPC 3D LUT support, we can
verify that regamma is only programmed when 3D LUT programming fails. As
a groundwork to introduce 3D
From: Joshua Ashton
Blend 1D LUT or a predefined transfer function can be set to linearize
content before blending, so that it's positioned just before blending
planes in the AMD color mgmt pipeline, and after 3D LUT (non-linear
space). Shaper and Blend LUTs are 1D LUTs that sandwich 3D LUT.
Describe some expected behavior of the AMD DM color mgmt programming.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
Create and attach driver-private properties for plane color management.
First add plane degamma LUT properties that means user-blob and its
size. We will add more plane color properties in the next commits. In
addition, we keep these driver-private plane properties limited by
defining
It follows the same path of out_transfer_func for stream updates, since
shaper LUT and 3D LUT is programmed in funcs.set_output_transfer_func()
and this function is called in the atomic commit_tail when
update_flags.bits.out_tf is set.
Signed-off-by: Melissa Wen
---
Add 3D LUT property for plane gamma correction using a 3D lookup table.
Since a 3D LUT has a limited number of entries in each dimension we want
to use them in an optimal fashion. This means using the 3D LUT in a
colorspace that is optimized for human vision, such as sRGB, PQ, or
another
Add property to set predefined transfer function to enable delinearizing
content with or without shaper LUT. Drivers should advertize this
property acoording to HW caps.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 +
From: Joshua Ashton
Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
nits for SDR content. So if you want, 203 nits for SDR
From: Joshua Ashton
Allow userspace to tell the kernel driver the input space and,
therefore, uses correct predefined transfer function (TF) to delinearize
content with or without LUT.
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
From: Harry Wentland
The region and segment calculation was incapable of dealing
with regions of more than 16 segments. We first fix this.
Now that we can support regions up to 256 elements we can
define a better segment distribution for near-linear LUTs
for our maximum of 256 HW-supported
Hook up driver-specific atomic operations for managing AMD color
properties and create AMD driver-specific color management properties
and attach them according to HW capabilities defined by `struct
dc_color_caps`. Add enumerated transfer function property to DRM CRTC
gamma to convert to wire
From: Harry Wentland
The shaper LUT requires a 10-bit value of the delta between
segments. We were using dc_fixpt_clamp_u0d10() to do that
but it doesn't do what we want it to do. It will preserve
10-bit precision after the decimal point, but that's not
quite what we want. We want 14-bit
This series is a refined version of our RFC [1] for AMD driver-specific
color management properties. It is a collection of contributions from
Joshua, Harry and I to enhance AMD KMS color pipeline for Steam
Deck/SteamOS by exposing the large set of color caps available in AMD
display HW.
We will add color mgmt properties to DRM planes in the next patches and
we want to track when one of this properties change to define atomic
commit behaviors. Using a similar approach from CRTC color props, we set
a color_mgmt_changed boolean whenever a plane color prop changes.
Signed-off-by:
Place it in drm_property where drm_property_replace_blob and
drm_property_lookup_blob live. Then we can use the DRM helper for
driver-specific KMS properties too.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/arm/malidp_crtc.c | 2 +-
drivers/gpu/drm/drm_atomic_uapi.c | 43
DRM_OBJECT_MAX_PROPERTY limits the number of properties to be attached
and we are increasing that value all time we add a new property (generic
or driver-specific).
In this series, we are adding 13 new KMS driver-specific properties for
AMD color manage:
- CRTC Gamma enumerated Transfer Function
From: Florian Fainelli
74165 is a 16nm process SoC with a 10/100 integrated Ethernet PHY,
utilize the recently defined 16nm EPHY macro to configure that PHY.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
Reviewed-by: Andrew Lunn
---
drivers/net/phy/bcm7xxx.c | 1 +
Add maintainers entry for ASP 2.0 Ethernet driver.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e2fd64c2ebdc..732a099f4a10 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
The ASP 2.0 Ethernet controller uses a brcm unimac.
Acked-by: Conor Dooley
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
Add support for the Broadcom ASP 2.0 Ethernet controller which is first
introduced with 72165. This controller features two distinct Ethernet
ports that can be independently operated.
This patch supports:
- Wake-on-LAN using magic packets
- basic ethtool operations (link, counters, message
Add mdio compat string for ASP 2.0 ethernet driver.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
Reviewed-by: Andrew Lunn
---
drivers/net/mdio/mdio-bcm-unimac.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/mdio/mdio-bcm-unimac.c
From: Florian Fainelli
Add a binding document for the Broadcom ASP 2.0 Ethernet
controller.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
v3
- Adjust compatible string example to reference SoC and HW ver
v3
- Minor formatting issues
- Change channel
Add support for the Broadcom ASP 2.0 Ethernet controller which is first
introduced with 72165.
Add support for 74165 10/100 integrated Ethernet PHY which also uses
the ASP 2.0 Ethernet controller.
Florian Fainelli (2):
dt-bindings: net: Brcm ASP 2.0 Ethernet controller
net: phy: bcm7xxx: Add
The internal_hpd flag is set to true by dp_bridge_hpd_enable() and set to
false by dp_bridge_hpd_disable() to handle GPIO pinmuxed into DP controller
case. HDP related interrupts can not be enabled until internal_hpd is set
to true. At current implementation dp_display_config_hpd() will initialize
On Tue, May 23, 2023 at 2:29 PM Nick Desaulniers
wrote:
>
> On Tue, May 23, 2023 at 2:20 PM Artur Weber wrote:
> >
> > Fixes compilation errors on older GCC versions (before 8.x) and Clang
> > after changes introduced in commit 6810bb390282 ("drm/panel: Add
> > Samsung S6D7AA0 panel controller
Hi Doug,
On Tue, May 23, 2023 at 12:27:54PM -0700, Douglas Anderson wrote:
>
> The big motivation for this patch series is mostly described in the patch
> ("drm/panel: Add a way for other devices to follow panel state"), but to
> quickly summarize here: for touchscreens that are connected to a
On Tue, May 23, 2023 at 2:20 PM Artur Weber wrote:
>
> Fixes compilation errors on older GCC versions (before 8.x) and Clang
> after changes introduced in commit 6810bb390282 ("drm/panel: Add
> Samsung S6D7AA0 panel controller driver"). Tested with GCC 13.1.1,
> GCC 6.4.0 and Clang 16.0.3.
Hi
Hi,
On 23/05/2023 20:02, Nathan Chancellor wrote:
> Hi Artur,
>
> On Fri, May 19, 2023 at 07:03:53PM +0200, Artur Weber wrote:
>> Initial driver for S6D7AA0-controlled panels. Currently, the following
>> panels are supported:
>>
>> - S6D7AA0-LSL080AL02 (Samsung Galaxy Tab 3 8.0)
>> -
Fixes compilation errors on older GCC versions (before 8.x) and Clang
after changes introduced in commit 6810bb390282 ("drm/panel: Add
Samsung S6D7AA0 panel controller driver"). Tested with GCC 13.1.1,
GCC 6.4.0 and Clang 16.0.3.
Signed-off-by: Artur Weber
---
On 5/19/2023 8:07 AM, Dmitry Baryshkov wrote:
The array of CRTC in the struct msm_drm_private duplicates a list of
CRTCs in the drm_device. Drop it and use the existing list for CRTC
enumeration.
Signed-off-by: Dmitry Baryshkov
---
This was a part of
Hi,
On Mon, May 22, 2023 at 1:01 AM cong yang
wrote:
>
> Hi,neil:
> Thank you for your reply, it's not that the polarity of reset is different.
> The state of this rst needs to be high during a certain period of time (when
> hid touch communicate,). I have tried to set the default property to
On Tue, 23 May 2023 at 22:39, Kuogee Hsieh wrote:
>
> devm_request_irq() will allocate irq and return with irq enabled.
> At current implementation irq are specified disabled after return from
> devm_request_irq() and re enabled later. It is redundant.
This is not correct. The disable_irq /
Clearing out report id and timestamp as means to detect unlanded reports
only works if report size is power of 2. That is, only when report size is
a sub-multiple of the OA buffer size can we be certain that reports will
land at the same place each time in the OA buffer (after rewind). If report
On 5/21/2023 3:28 AM, Marijn Suijten wrote:
On 2023-05-18 03:19:49, Dmitry Baryshkov wrote:
On 16/05/2023 23:20, Jessica Zhang wrote:
Add support for the 1080x2340 Visionox R66451 AMOLED DSI panel that
comes with the Qualcomm HDK8350 display expansion pack.
The panel enables display
On Tue, 23 May 2023 at 23:01, Abhinav Kumar wrote:
>
>
>
> On 5/21/2023 10:21 AM, Dmitry Baryshkov wrote:
> > Drop SSPP-specifig debugfs register dumps in favour of using
> > debugfs/dri/0/kms or devcoredump.
> >
>
> I did see another series which removes src_blk from the catalog (I am
> yet to
From: Markus Elfring
Date: Tue, 23 May 2023 21:56:55 +0200
* Assign the value “-ENOMEM” to the local variable “ret” only for
the exception handling.
* Use an additional label.
Signed-off-by: Markus Elfring
---
drivers/video/fbdev/core/fbcmap.c | 15 ++-
1 file changed, 10
From: Markus Elfring
Date: Tue, 23 May 2023 21:30:29 +0200
Move the assignment for the local variables “size” and “flags”
because the computed values were only used in a single if branch.
Signed-off-by: Markus Elfring
---
drivers/video/fbdev/core/fbcmap.c | 7 ---
1 file changed, 4
From: Markus Elfring
Date: Tue, 23 May 2023 22:04:33 +0200
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Move two variable assignments
Convert a variable initialisation into a later assignment
drivers/video/fbdev/core/fbcmap.c | 22
On 5/21/2023 10:21 AM, Dmitry Baryshkov wrote:
Drop SSPP-specifig debugfs register dumps in favour of using
debugfs/dri/0/kms or devcoredump.
I did see another series which removes src_blk from the catalog (I am
yet to review that one) . Lets assume that one is fine and this change
will
On 5/23/2023 11:56 AM, Abhinav Kumar wrote:
Hi Leonard
On 5/22/2023 7:39 PM, Leonard Lausen wrote:
Abhinav Kumar writes:
There is no need to add the 100ms delay back yet.
thanks for posting this but NAK on this patch till we post the
fix this
week.
Appreciate a bit of patience till
On Tue, May 23, 2023 at 12:23 PM Abhinav Kumar
wrote:
>
>
>
> On 5/23/2023 8:24 AM, Johan Hovold wrote:
> > On Fri, May 12, 2023 at 09:13:04PM +0300, Dmitry Baryshkov wrote:
> >> On 28/04/2023 02:28, Abhinav Kumar wrote:
> >>> On sc7280 where eDP is the primary display, PSR is causing
> >>> IGT
The internal_hpd flag is set to true by dp_bridge_hpd_enable() and set to
false by dp_bridge_hpd_disable() to handle GPIO pinmuxed into DP controller
case. HDP related interrupts can not be enabled until internal_hpd is set
to true. At current implementation dp_display_config_hpd() will initialize
devm_request_irq() will allocate irq and return with irq enabled.
At current implementation irq are specified disabled after return from
devm_request_irq() and re enabled later. It is redundant.
Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon
Chipsets")
Signed-off-by:
1) delete enable_irq() and disable_irq()
2) enable HDP plug/unpulg interrupts at hpd_enable/disable
Kuogee Hsieh (2):
drm/msm/dp: no need to disable irq after devm_request_irq()
drm/msm/dp: enable HDP plugin/unplugged interrupts at
hpd_enable/disable
drivers/gpu/drm/msm/dp/dp_catalog.c
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