From: Markus Elfring
Date: Mon, 5 Feb 2024 08:30:57 +0100
A wrapper function is available since the commit
890cc39a879906b63912482dfc41944579df2dc6
("drivers: provide devm_platform_get_and_ioremap_resource()").
Thus reuse existing functionality instead of keeping duplicate source code.
This
Hi Anatoliy,
Thank you for the patch.
On Tue, Jan 23, 2024 at 06:54:01PM -0800, Anatoliy Klymenko wrote:
> Filter out status register against the interrupts' mask.
>
> Some events are being reported via DP status register, even if
> corresponding interrupts have been disabled. One instance of
Hi Anatoliy,
Thank you for the patch.
On Tue, Jan 23, 2024 at 06:54:00PM -0800, Anatoliy Klymenko wrote:
> Clear status register as soon as we read it.
>
> Addressing comments from
> https://lore.kernel.org/dri-devel/beb551c7-bb7e-4cd0-b166-e9aad90c4...@ideasonboard.com/
>
> Signed-off-by:
Hi Adam,
thanks for working on this.
Am Samstag, 3. Februar 2024, 17:52:51 CET schrieb Adam Ford:
> From: Lucas Stach
>
> This adds the DT nodes for all the peripherals that make up the
> HDMI display pipeline.
>
> Signed-off-by: Lucas Stach
> Signed-off-by: Adam Ford
>
> ---
> V2: I took
Hello,
This series looks good. Tomi, could you get it merged through drm-misc ?
On Tue, Jan 23, 2024 at 06:53:57PM -0800, Anatoliy Klymenko wrote:
> Add few missing pieces to support ZynqMP DPSUB live video in mode.
>
> ZynqMP DPSUB supports 2 modes of operations in regard to video data
>
Hi Adam,
thanks for working on this.
Am Samstag, 3. Februar 2024, 17:52:46 CET schrieb Adam Ford:
> From: Lucas Stach
>
> The HDMI irqsteer is a secondary interrupt controller within the HDMI
> subsystem that maps all HDMI peripheral IRQs into a single upstream
> IRQ line.
>
> Signed-off-by:
Hi Adam,
thanks for working on this.
Am Samstag, 3. Februar 2024, 17:52:45 CET schrieb Adam Ford:
> From: Lucas Stach
>
> This adds the PGC and HDMI blk-ctrl nodes providing power control for
> HDMI subsystem peripherals.
>
> Signed-off-by: Adam Ford
> Signed-off-by: Lucas Stach
> ---
> V2:
On Mon, 6 Nov 2023 at 20:47, Jocelyn Falempe wrote:
>
> On 23/10/2023 10:30, Jocelyn Falempe wrote:
> > On 20/10/2023 14:06, Thomas Zimmermann wrote:
> >> (cc'ing lkml for feedback)
> >>
> >> Hi Jocelyn
> >>
> >> Am 19.10.23 um 15:55 schrieb Jocelyn Falempe:
> >>> We found a regression in v5.10
A few of the DRM_PANEL entries have become out of alphabetical order,
so move them around a bit to restore alpha order.
Signed-off-by: Randy Dunlap
Cc: Neil Armstrong
Cc: Jessica Zhang
Cc: Sam Ravnborg
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc:
Add HDCP2.x feature for DisplayPort.
When userspace request the kernel protect future content communicated
over the link with Content_Protection property, the feature will do
HDCP2.x authentication if the sink support HDCP2.X.
Changes in v2:
- remove switch case, and refine code to make more
Add tee client application, HDCP 1.x and 2.x authentication for DisplayPort
to support the HDCP feature.
mac.shen (3):
Subject: [PATCH] drm/mediatek/dp: Add tee client application for HDCP
feature
Subject: [PATCH] drm/mediatek/dp: Add HDCP2.x feature for DisplayPort
Subject: [PATCH]
Add tee client application which will be used for
HDCP 1.x and 2.x authentication in DisplayPort.
Changes in v2:
- remove ca folder, and change file name with lower case
- refine the tci_t structure to make the data to tee can
through this structure
- remove aux and regs from mtk_hdcp_info
Add HDCP1.x feature for DisplayPort.
If the sink support HDCP1.X only, the feature will do HDCP1.x
authentication when userspace request the kernel protect with
HDCP_Content_Type property as DRM_MODE_HDCP_CONTENT_TYPE0.
Changes in v2:
- remove useless code
- remove the prefix 'mdrv'
- do HDCP1.x
Correct typos of "translated".
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-devel@lists.freedesktop.org
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Reviewed-by: Simon Ser
Signed-off-by: Randy Dunlap
---
v2: add Reviewed-by, rebase
include/drm/drm_rect.h |4 ++--
1
On Sun, 4 Feb 2024 at 18:45, Marijn Suijten
wrote:
>
> When the topology calls for two interfaces on the current fixed topology
> of 2 DSC blocks, or uses 1 DSC block for a single interface (e.g. SC7280
> with only one DSC block), there should be no merging of DSC output.
>
> This is already
Hi Sam,
On Sun, 2024-02-04 at 20:21 +0100, Sam Ravnborg wrote:
> Assuming you agree with the patchset how do you want me to move forward?
> I can rebase on top of the latest -rc and collect acks if that helps.
>
> Arnd promised to pick up the patches until you got a git tree up,
> but I do not
Hi Andreas.
Congratulation being the new sparc co-maintainer!
On Tue, Dec 19, 2023 at 11:03:05PM +0100, Sam Ravnborg via B4 Relay wrote:
> This is the second attempt to sunset sun4m and sun4d.
> See [1] for the inital attempt.
I have now verified that the kernel can boot with qemu.
There was a
== INTF_MODE_VIDEO)
dsc_common_mode |= DSC_MODE_VIDEO;
---
base-commit: 01af33cc9894b4489fb68fa35c40e9fe85df63dc
change-id: 20240204-dpu-dsc-multiplex-49c14b73f3e0
Best regards,
--
Marijn Suijten
On Sun, 4 Feb 2024 at 18:04, Marijn Suijten
wrote:
>
> drm_mipi_dsi.h already provides a conversion function from MIPI_DSI_FMT_
> to bpp, named mipi_dsi_pixel_format_to_bpp().
>
> Signed-off-by: Marijn Suijten
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
> 1 file changed,
drm_mipi_dsi.h already provides a conversion function from MIPI_DSI_FMT_
to bpp, named mipi_dsi_pixel_format_to_bpp().
Signed-off-by: Marijn Suijten
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git
On Sun, Feb 4, 2024 at 6:00 AM Francesco Dolcini wrote:
>
> On Sat, Feb 03, 2024 at 10:52:46AM -0600, Adam Ford wrote:
> > From: Lucas Stach
> >
> > The HDMI irqsteer is a secondary interrupt controller within the HDMI
> > subsystem that maps all HDMI peripheral IRQs into a single upstream
> >
Hi Alexander,
Thanks your comments,
>
>
> Hi Sandor,
>
> thanks for the update.
>
> Am Mittwoch, 10. Januar 2024, 02:08:45 CET schrieb Sandor Yu:
> > Add a new DRM DisplayPort and HDMI bridge driver for Candence
> MHDP8501
> > used in i.MX8MQ SOC. MHDP8501 could support HDMI or DisplayPort
> >
Hi Alexander,
Thanks your comments,
> -Original Message-
> From: Alexander Stein
> Sent: 2024年1月17日 17:47
> To: dmitry.barysh...@linaro.org; andrzej.ha...@intel.com;
> neil.armstr...@linaro.org; Laurent Pinchart
> ; jo...@kwiboo.se;
> jernej.skra...@gmail.com; airl...@gmail.com;
On Sat, Feb 03, 2024 at 10:52:46AM -0600, Adam Ford wrote:
> From: Lucas Stach
>
> The HDMI irqsteer is a secondary interrupt controller within the HDMI
> subsystem that maps all HDMI peripheral IRQs into a single upstream
> IRQ line.
>
> Signed-off-by: Lucas Stach
This is missing your
Tested-by: Dang Huynh
On Saturday, January 27, 2024 9:48:45 AM UTC Manuel Traut wrote:
> This includes support for both the v0.1 units that were sent to developers
> and the v2.0 units from production.
On Sat, 27 Jan 2024 10:48:41 +0100, Manuel Traut wrote:
> This adds support for the BOE TH101MB31IG002 LCD Panel used in PineTab2 [1]
> and
> PineTab-V [2] as well as the devictrees for the PineTab2 v0.1 and v2.0.
>
> The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has
>
Hi Boris:
在 2024-02-04 18:07:56，"Boris Brezillon" 写道：
>On Sun, 4 Feb 2024 09:14:44 +0800 (CST)
>"Andy Yan" wrote:
>
>> Hi Boris：
>> I saw this warning sometimes（Run on a armbain based bookworm），not sure is a
>> know issue or something else。
>
>No it's not, and I didn't manage to reproduce
Add Cadence HDP-TX HDMI PHY driver for i.MX8MQ.
Cadence HDP-TX PHY could be put in either DP mode or
HDMI mode base on the configuration chosen.
HDMI PHY mode is configurated in the driver.
Signed-off-by: Sandor Yu
Tested-by: Alexander Stein
---
v12->v13:
- Fix build warning
v11->v12:
-
Add Cadence HDP-TX DisplayPort PHY driver for i.MX8MQ
Cadence HDP-TX PHY could be put in either DP mode or
HDMI mode base on the configuration chosen.
DisplayPort PHY mode is configurated in the driver.
Signed-off-by: Sandor Yu
---
v12->v13:
*No change.
v11->v12:
- Return error code to
Add bindings for Freescale iMX8MQ DP and HDMI PHY.
Signed-off-by: Sandor Yu
Reviewed-by: Rob Herring
---
v9->v13:
*No change.
.../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644
Add a new DRM DisplayPort and HDMI bridge driver for Candence MHDP8501
used in i.MX8MQ SOC. MHDP8501 could support HDMI or DisplayPort
standards according embedded Firmware running in the uCPU.
For iMX8MQ SOC, the DisplayPort/HDMI FW was loaded and activated by
SOC's ROM code. Bootload binary
Add bindings for Cadence MHDP8501 DisplayPort/HDMI bridge.
Signed-off-by: Sandor Yu
Reviewed-by: Krzysztof Kozlowski
---
v9->v13:
*No change.
.../display/bridge/cdns,mhdp8501.yaml | 104 ++
1 file changed, 104 insertions(+)
create mode 100644
Allow HDMI PHYs to be configured through the generic
functions through a custom structure added to the generic union.
The parameters added here are based on HDMI PHY
implementation practices. The current set of parameters
should cover the potential users.
Signed-off-by: Sandor Yu
Reviewed-by:
MHDP8546 mailbox access functions will be share to other mhdp driver
and Cadence HDP-TX HDMI/DP PHY drivers.
Create a new mhdp helper driver and move all those functions into.
cdns_mhdp_reg_write() is renamed to cdns_mhdp_dp_reg_write(),
because it use the DPTX command ID DPTX_WRITE_REGISTER.
The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
driver and Cadence HDP-TX PHY(HDMI/DP) drivers for Freescale i.MX8MQ.
The patch set compose of DRM bridge drivers and PHY drivers.
Both of them need by patch #1 and #2 to pass build.
DRM bridges driver patches:
#1: drm:
On Sun, 4 Feb 2024 09:14:44 +0800 (CST)
"Andy Yan" wrote:
> Hi Boris：
> I saw this warning sometimes（Run on a armbain based bookworm），not sure is a
> know issue or something else。
No it's not, and I didn't manage to reproduce locally. Looks like
you're using a 6.8 kernel, but my
On Thu, Feb 01, 2024 at 06:01:01PM +0100, Maxime Ripard wrote:
> On Fri, Jan 26, 2024 at 11:18:30PM +, Klymenko, Anatoliy wrote:
> > On Friday, January 26, 2024 4:26 AM, Maxime Ripard wrote:
> > > On Wed, Jan 17, 2024 at 04:23:43PM +0200, Laurent Pinchart wrote:
> > > > On Mon, Jan 15, 2024 at
On Sat, 3 Feb 2024 at 22:20, Ricardo B. Marliere wrote:
>
> Now that the driver core can properly handle constant struct bus_type,
> move the mipi_dsi_bus_type variable to be a constant structure as well,
> placing it into read-only memory which can not be modified at runtime.
>
> Cc: Greg
On Sat, 3 Feb 2024 at 22:20, Ricardo B. Marliere wrote:
>
> Now that the driver core can properly handle constant struct bus_type,
> move the dp_aux_bus_type variable to be a constant structure as well,
> placing it into read-only memory which can not be modified at runtime.
>
> Cc: Greg
On Sat, 3 Feb 2024 at 17:53, Adam Ford wrote:
>
> From: Lucas Stach
>
> This adds the driver for the Samsung HDMI PHY found on the
> i.MX8MP SoC.
>
> Signed-off-by: Lucas Stach
> Signed-off-by: Adam Ford
> Tested-by: Alexander Stein
> ---
> V4: Make lookup table hex values lower case.
>
>
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