Hi Adam,
On Tue, Feb 6, 2024 at 9:23 PM Adam Ford wrote:
>
> Two separate build warnings were reported. One from an
> uninitialized variable, and the other from returning 0
> instead of NULL from a pointer.
>
> Fixes: 059c53e877ca ("drm/bridge: imx: add driver for HDMI TX Parallel Video
>
Hi Adam,
Thanks for moving this forward.
On Fri, Jan 5, 2024 at 10:56 PM Adam Ford wrote:
>
> From: Lucas Stach
>
> Add binding for the i.MX8MP HDMI parallel video interface block.
>
> Signed-off-by: Lucas Stach
> Reviewed-by: Laurent Pinchart
> Reviewed-by: Conor Dooley
You missed your
On Fri, Dec 22, 2023 at 2:32 PM Manuel Traut wrote:
>
> From: Segfault
>
> The BOE TH101MB31IG002-28A panel is a WXGA panel.
> It is used in Pine64 Pinetab2 and PinetabV.
>
> Signed-off-by: Segfault
Please use a real name instead...
> +MODULE_AUTHOR("Alexander Warnecke ");
like here.
On Fri, Dec 15, 2023 at 4:01 PM Adam Ford wrote:
> Thanks for the list. I was able to successfully build the stable 6.6
> branch with those patches applied and I have the HDMI working.
> Unfortunately, I get build errors on the linux-next, so it's going to
> take me a little time to sort
Hi Adam,
On Fri, Dec 15, 2023 at 1:40 PM Adam Ford wrote:
> I started looking into this today, but there appears to be some
> dependencies missing because the PVI is just one small portion of
> this. The PVI needs to interact with the hdmi_blk_ctrl and the hdmi
> transmitter itself.
>
> It
Hi Adam,
On Sun, Dec 10, 2023 at 2:35 PM Adam Ford wrote:
> Lucas,
>
> It's been a few months since there has been any action. If you want,
> I can help apply the suggestions that Laurent has and re-submit with
> both of our names if you want. It would be nice to get this
> integrated.
It
Hi Lucas,
On Tue, Dec 12, 2023 at 3:19 PM Lucas Stach wrote:
> I don't really like this series. While we don't make any strong
> guarantees in this way, it breaks booting older kernels with a new DT.
I thought we needed only to guarantee that old DTs still run with
newer kernels, not the other
From: Fabio Estevam
On i.MX6SX, the LCDIF has an associated power domain.
i.MX8MQ does not have an LCDIF power domain, so pass only
"fsl,imx8mq-lcdif" as compatible string to fix the following
dt-schema warning:
imx8mq-evk.dtb: lcd-controller@3032: 'power-domains' is a require
From: Fabio Estevam
On i.MX6SX, the LCDIF has an associated power domain.
i.MX8MQ does not have an LCDIF power domain, so allow passing only
"fsl,imx8mq-lcdif" as compatible string to fix the following
dt-schema warning:
imx8mq-evk.dtb: lcd-controller@3032: 'power-domains' is
From: Fabio Estevam
On i.MX6SX, the LCDIF has an associated power domain.
However, i.MX8MQ does not have an LCDIF power domain.
imx8mq.dtsi has the following compatible string:
compatible = "fsl,imx8mq-lcdif", "fsl,imx6sx-lcdif";
which causes the following dt-schema warn
Hi Richard,
On Thu, Dec 7, 2023 at 10:43 AM Rafael J. Wysocki wrote:
> > Otherwise, the mmc driver will be defer probed after the init
> > executed, as you can imagine, the init will complain it can not find
> > the dev node specified by the 'root=/dev/xxx' in the kernel. command
> > line.
From: Fabio Estevam
i.MX23 has two LCDIF interrupts instead of a single one like other
i.MX devices.
Take this into account for properly describing the i.MX23 LCDIF
interrupts.
This fixes the following dt-schema warning:
imx23-olinuxino.dtb: lcdif@8003: interrupts: [[46], [45]] is too
From: Fabio Estevam
When using audio from ADV7533 or ADV7535 and describing the audio
card via simple-audio-card, the '#sound-dai-cells' needs to be passed.
Document the '#sound-dai-cells' property to fix the following
dt-schema warning:
imx8mn-beacon-kit.dtb: hdmi@3d: '#sound-dai-cells' does
From: Fabio Estevam
When using audio from ADV7533 or ADV7535 and describing the audio
card via simple-audio-card, the '#sound-dai-cells' needs to be passed.
Document the '#sound-dai-cells' property to fix the following
dt-schema warning:
imx8mn-beacon-kit.dtb: hdmi@3d: '#sound-dai-cells' does
From: Fabio Estevam
i.MX23 has two LCDIF interrupts instead of a single one like other
i.MX devices.
Take this into account for properly describing the i.MX23 LCDIF
interrupts.
This fixes the following dt-schema warning:
imx23-olinuxino.dtb: lcdif@8003: interrupts: [[46], [45]] is too
From: Fabio Estevam
i.MX23 has two i.MX23 interrupts instead of a single one like other
i.MX devices.
Take this into account for properly describing the i.MX23 LCDIF
interrupts.
This fixes the following dt-schema warning:
imx23-olinuxino.dtb: lcdif@8003: interrupts: [[46], [45]] is too
)
> Tested-by: Frieder Schrempf (v2)
> Reviewed-by: Laurent Pinchart (v3)
Tested-by: Fabio Estevam
Could someone apply this series, please?
Hi Quentin,
On Fri, Nov 17, 2023 at 3:31 PM Quentin Schulz wrote:
>
> From: Quentin Schulz
>
> This scary message may happen if the panel or bridge is not probed
> before the LVDS controller is, resulting in some head scratching because
> the LVDS panel is actually working, since a later try
Hi Emil,
On Thu, Oct 26, 2023 at 11:47 AM Emil Abildgaard Svendsen
wrote:
>
> Currently reading EDID only works because usually only two EDID blocks
> of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
> blocks. And the first EDID segment read works fine but E-EDID specifies
From: Fabio Estevam
fsl,imx6-hdmi.yaml makes a reference to synopsys,dw-hdmi.yaml.
The 'interrupts'and 'reg' properties are described in synopsys,dw-hdmi.yaml,
so use 'unevaluatedProperties: false' so that these two properties can
be accepted.
This fixes the following schema warnings:
hdmi
On Sun, Sep 24, 2023 at 11:36 AM liuhaoran wrote:
>
> This patch adds error-handling for the of_match_node()
> inside the dw_hdmi_imx_probe().
>
> Signed-off-by: liuhaoran
> ---
> drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git
Hi Michael,
On Mon, Aug 28, 2023 at 12:59 PM Michael Tretter
wrote:
>
> The porches must be rounded up to make the samsung-dsim work.
The commit log could be improved here.
The way it is written gives the impression that samsung-dsim does not
work currently.
ries tested with[1] on RZ/G2L SMARC EVK which embeds
> ADV7535.
I have successfully tested this series on a imx8mm-evk, which has an ADV7535:
Tested-by: Fabio Estevam
Hi Tim,
On Thu, Aug 17, 2023 at 5:53 PM Tim Harvey wrote:
> Frieder,
>
> Sorry for the delay. Yes this resolves the regression I ran into. I
> tested it on top of v6.5-rc6 on a gw72xx-0x with a DFROBOT DRF0678 7in
> 800x480 (Raspberry Pi) display which has the Toshiba TC358762
> compatible DSI
Hi Rob,
Any comments, please?
On Mon, Jul 24, 2023 at 5:28 PM Fabio Estevam wrote:
>
> Hi Rob,
>
> A gentle ping.
>
> On Thu, Jun 22, 2023 at 3:37 PM Dmitry Baryshkov
> wrote:
> >
> > On 21/06/2023 02:23, Fabio Estevam wrote:
> > > From: Fab
Hi Rob,
A gentle ping.
On Thu, Jun 22, 2023 at 3:37 PM Dmitry Baryshkov
wrote:
>
> On 21/06/2023 02:23, Fabio Estevam wrote:
> > From: Fabio Estevam
> >
> > The adreno_is_a20x() and adreno_is_a225() functions rely on the
> > GPU revision, but such i
On Fri, Jul 21, 2023 at 8:28 AM Marek Szyprowski
wrote:
>
> Samsung DSIM used in older Exynos SoCs (like Exynos 4210, 4x12, 3250)
> doesn't report empty level of packer header FIFO. In case of those SoCs,
> use the old way of waiting for empty command tranfsfer FIFO, removed
> recently by commit
On Wed, May 17, 2023 at 4:08 AM Alexandru Ardelean wrote:
>
> From: Bogdan Togorean
>
> For ADV7533 and ADV7535 low refresh rate is selected using
> bits [3:2] of 0x4a main register.
> So depending on ADV model write 0xfb or 0x4a register.
>
> Signed-off-by: Bogdan Togorean
> Signed-off-by:
From: Fabio Estevam
The adreno_is_a20x() and adreno_is_a225() functions rely on the
GPU revision, but such information is retrieved inside adreno_gpu_init(),
which is called afterwards.
Fix this problem by caling adreno_gpu_init() earlier, so that
the GPU information revision is available when
On 20/06/2023 14:40, Dmitry Baryshkov wrote:
This looks like a boilerplate being added to all aYxx drivers (and
then these fields are also set in adreno_gpu_init()). Can we remove
duplication somehow?
Sorry, I missed this comment prior to sending v2.
Maybe a simpler fix for a2xx_gpu would
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions:
[ cut here ]
WARNING: CPU: 0 PID: 1 at drivers/gpu/drm/
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") exposes the need of setting the GPU revision fields
prior to using the adreno_is_xxx() functions.
Pass the GPU revision information to avoid run-time warning.
Signed-off-by: Fab
From: Fabio Estevam
Since commit cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
before being set") the following run-time warning is observed:
[ cut here ]
WARNING: CPU: 0 PID: 1 at drivers/gpu/drm/msm/adreno/adreno_gpu.h:171
a2xx_gpu_init+0
From: Fabio Estevam
The innolux at043tn24 display is a parallel LCD. Pass the 'connector_type'
information to avoid the following warning:
panel-simple panel: Specify missing connector_type
Signed-off-by: Fabio Estevam
Fixes: 41bcceb4de9c ("drm/panel: simple: Add support for Innolux AT04
From: Fabio Estevam
The innolux at043tn24 display is a parallel LCD. Pass the 'connector_type'
information to avoid the following warning:
panel-simple panel: Specify missing connector_type
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/panel/panel-simple.c | 1 +
1 file changed, 1
From: Fabio Estevam
Use port-base reference for port@1.
This fixes the following schema warning:
imx8mp-dhcom-pdk3.dtb: dsi@32e6: ports:port@1:endpoint: Unevaluated
properties are not allowed ('data-lanes' was unexpected)
>From schema:
>Documentation/devicetree/bindings/display/
On 31/05/2023 15:56, Krzysztof Kozlowski wrote:
This would have sense if you kept original intention, so
additionalProperties: false
Without it - you just break bindings to hide warning.
I am not sure I understood your suggestion.
Is this what you mean?
diff --git
From: Fabio Estevam
Use port-base reference for port@0 and port@1.
This fixes the following schema warning:
imx8mm-evk.dtb: dsi@32e1: ports:port@1:endpoint: Unevaluated properties are
not allowed ('data-lanes' was unexpected)
>From schema:
>Documentation/devicetree/bindings/d
equal, this flag is not needed since the driver
> will use the sclk_mipi rate as a fallback.
>
> Signed-off-by: Adam Ford
> Reviewed-by: Conor Dooley
> ---
> V2: Split from driver series. Re-word updates for burst
> and pll-clock frequency.
Reviewed-by: Fabio Estevam
Hi Adam,
On Tue, May 23, 2023 at 8:49 PM Adam Ford wrote:
> Inki,
>
> I haven't heard back from you on whether or not you want the bindings
> patch to be included with me resending the series as V7 or if you're
> OK with a single, stand-alone patch.
> Will you let me know? I have the patch
Hi Neil,
On Sun, May 14, 2023 at 9:29 AM Krzysztof Kozlowski
wrote:
>
> On 14/05/2023 13:46, Fabio Estevam wrote:
> > From: Fabio Estevam
> >
> > The Samsung DSIM IP block allows the inversion of the clock and
> > data lanes.
> >
> > Add an
Hi Adam,
On Thu, May 18, 2023 at 8:06 PM Adam Ford wrote:
>
> This series fixes the blanking pack size and the PMS calculation. It then
> adds support to allows the DSIM to dynamically DPHY clocks, and support
> non-burst mode while allowing the removal of the hard-coded clock values
> for the
On Thu, May 4, 2023 at 6:12 AM Alexander Stein
wrote:
>
> Am Mittwoch, 3. Mai 2023, 18:33:07 CEST schrieb Frieder Schrempf:
> > From: Frieder Schrempf
> >
> > The datasheet describes the following initialization flow including
> > minimum delay times between each step:
> >
> > 1. DSI data lanes
a check which verifies all data lanes have the same polarity.
This has been validated on an imx8mm board that actually has the MIPI DSI
clock lanes inverted.
Signed-off-by: Marek Vasut
Signed-off-by: Fabio Estevam
Reviewed-by: Jagan Teki
---
Changes since v3:
- None
drivers/gpu/drm/bridge/samsung
From: Fabio Estevam
The Samsung DSIM IP block allows the inversion of the clock and
data lanes.
Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the
board
a check which verifies all data lanes have the same polarity.
This has been validated on an imx8mm board that actually has the MIPI DSI
clock lanes inverted.
Signed-off-by: Marek Vasut
Signed-off-by: Fabio Estevam
Reviewed-by: Jagan Teki
---
Changes since v2:
- None
drivers/gpu/drm/bridge/samsung
From: Fabio Estevam
The Samsung DSIM IP block allows the inversion of the clock and
data lanes.
Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the
board
anes):
lane-polarities = <1 0 0 0 0>;
If the board has no inversion on the clock lane, and has the data lanes
inverted:
lane-polarities = <0 1 1 1 1>;
Should I keep the data-lanes and lane-polarities description as in this
patch?
Please advise.
Thanks,
Fabio Estevam
From: Fabio Estevam
video-interface.txt does not exist anymore, as it has been converted
to video-interfaces.yaml.
Instead of referencing video-interfaces.yaml multiple times,
pass it as a $ref to the schema.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Pass video-interfaces.yaml
From: Fabio Estevam
video-interface.txt does not exist anymore, as it has been converted
to video-interfaces.yaml.
Update the references to the new file name.
Signed-off-by: Fabio Estevam
---
.../devicetree/bindings/display/bridge/ti,sn65dsi86.yaml | 8
1 file changed, 4 insertions
a check which verifies all data lanes have the same polarity.
This has been validated on an imx8mm board that actually has the MIPI DSI
clock lanes inverted.
Signed-off-by: Marek Vasut
Signed-off-by: Fabio Estevam
Reviewed-by: Jagan Teki
---
Changes since v1:
- Use 'drm: bridge: samsung-dsim
From: Fabio Estevam
The Samsung DSIM IP block allows the inversion of the clock and
data lanes.
Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the
board
From: Jagan Teki
Samsung MIPI DSIM bridge can be found on Exynos and NXP's
i.MX8M Mini/Nano/Plus SoCs.
Convert exynos_dsim.txt to yaml.
Used the example node from exynos5433.dtsi instead of the one used in
the legacy exynos_dsim.txt.
Signed-off-by: Jagan Teki
Signed-off-by: Fabio Estevam
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout
with i.MX8MP and i.MX93.
There is no LVDS CTRL register on the i.MX6SX, so only write to
this register on the appropriate SoCs.
Add support for the i.MX6SX LDB.
Tested on a imx6sx-sdb board
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register
layout with i.MX8MP and i.MX93.
Signed-off-by: Fabio Estevam
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Marek Vasut
---
Changes since v2:
- Collected Reviewed-by tags.
- Improved the Subject
From: Jagan Teki
Samsung MIPI DSIM bridge can be found on Exynos and NXP's
i.MX8M Mini/Nano/Plus SoCs.
Convert exynos_dsim.txt to yaml.
Used the example node from exynos5433.dtsi instead of the one used in
the legacy exynos_dsim.txt.
Signed-off-by: Jagan Teki
Signed-off-by: Fabio Estevam
Hi Krzysztof,
On 03/04/2023 09:49, Krzysztof Kozlowski wrote:
Signed-off-by: Jagan Teki
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Added samsung,mipi-dsim.yaml entry to MAINTAINERS file (Jagan)
- Added Marek Szyprowski entry to the samsung,mipi-dsim.yaml
maintainers section (Jagan
From: Jagan Teki
Samsung MIPI DSIM bridge can be found on Exynos and NXP's
i.MX8M Mini/Nano/Plus SoCs.
Convert exynos_dsim.txt to yaml.
Used the example node from latest Exynos SoC instead of
the one used in legacy exynos_dsim.txt.
Signed-off-by: Jagan Teki
Signed-off-by: Fabio Estevam
From: Jagan Teki
Samsung MIPI DSIM bridge can be found on Exynos and NXP's
i.MX8M Mini and Nano SoC's.
Convert exynos_dsim.txt to yaml.
Used the example node from latest Exynos SoC instead of
the one used in legacy exynos_dsim.txt.
Signed-off-by: Jagan Teki
Signed-off-by: Fabio Estevam
Hi Jagan,
On Thu, Mar 30, 2023 at 4:55 AM Jagan Teki wrote:
> I have a previous iteration of this conversion. Can I resend it on top
> of drm-misc-next?
> https://lore.kernel.org/all/20210704090230.26489-9-ja...@amarulasolutions.com/
I tried applying your patch against linux-next, but I get
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout
with i.MX8MP and i.MX93.
There is no LVDS CTRL register on the i.MX6SX, so only write to
this register on the appropriate SoCs.
Add support for the i.MX6SX LDB.
Tested on a imx6sx-sdb board
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register
layout with i.MX8MP and i.MX93.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Do not duplicate the entire if. (Krzysztof)
.../devicetree/bindings/display/bridge/fsl,ldb.yaml | 5 -
1
From: Fabio Estevam
Marco's NXP email is no longer valid.
Marco told me offline that he has no interest to be listed as the
maintainer contact for this binding, so add my contact.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Use my contact instead of Marco's personal email
a check which verifies all data lanes have the same polarity.
This has been validated on an imx8mm board that actually has the MIPI DSI
clock lanes inverted.
Signed-off-by: Marek Vasut
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/bridge/samsung-dsim.c | 27 ++-
include
From: Fabio Estevam
The Samsung DSIM IP block allows the inversion of the clock and
data lanes.
Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.
This is property is useful for properly describing the hardware
when the board
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout
with i.MX8MP and i.MX93.
There is no LVDS CTRL register on the i.MX6SX, so only write to
this register on the appropriate SoCs.
Add support for the i.MX6SX LDB.
Tested on a imx6sx-sdb board
From: Fabio Estevam
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register
layout with i.MX8MP and i.MX93.
Signed-off-by: Fabio Estevam
---
.../devicetree/bindings/display/bridge/fsl,ldb.yaml | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation
Hi Inki,
On Mon, Mar 13, 2023 at 9:51 PM Inki Dae wrote:
>> Could you please apply v16?
>
>
> I am planning to merge this patch series soon, but I will be proceeding with
> the pull-request next week. As the DSIM driver is being moved to the bridge
> folder, I would like to wait for
From: Fabio Estevam
Marco's NXP email is no longer valid.
Change it to his Gmail account.
Signed-off-by: Fabio Estevam
---
Marco,
If you are no longer interested in being listed as the maintainer contact
for the seiko,43wvf1g.yaml, please let me know.
.../devicetree/bindings/display/panel
Add an optional 'enable-gpios' property that can be used to turn on/off
the display.
Signed-off-by: Fabio Estevam
---
.../devicetree/bindings/display/panel/seiko,43wvf1g.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/seiko
Sometimes a GPIO is needed to turn on/off the display.
Add support for this usecase by introducing the optional 'enable-gpios'
property.
Tested on a imx53qsb board.
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/panel/panel-seiko-43wvf1g.c | 12
1 file changed, 12 insertions
Hi Inki,
On Mon, Mar 6, 2023 at 2:24 AM 대인기/Tizen Platform Lab(SR)/삼성전자
wrote:
> Seems some issue Marek found on testing. If fixed then I will try to pick this
> patch series up.
Marek has successfully tested v16.
Could you please apply v16?
Thanks
linux-arm-...@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: freedr...@lists.freedesktop.org
This fixes the warning after running 'make imx_v6_v7_defconfig', thanks:
Tested-by: Fabio Estevam
On Tue, Feb 14, 2023 at 8:09 AM Fabio Estevam wrote:
> Some extra ADV7535 patches were needed. Please check patches 0020-0023
> and see if they help.
Sorry, forgot to put the repo URL:
https://github.com/fabioestevam/meta-imx8mmevk-bsp/tree/kirkstone/recipes-kernel/linux/linux-stab
Hi Rasmus,
On Tue, Feb 14, 2023 at 7:55 AM Rasmus Villemoes
wrote:
> Well, the data sheet for the dsi86 says up to 750MHz DSI HS clock, and
> if the value specified in samsung,burst-clock-frequency is twice the DSI
> HS clk, I suppose I should be good up to 1.5GHz? I have tried many
> different
Hi Jagan,
On Thu, Jan 19, 2023 at 2:59 PM Jagan Teki wrote:
> There are two patch series prior to this need to apply.
>
> https://patchwork.kernel.org/project/dri-devel/patch/20221212145745.15387-1-ja...@amarulasolutions.com/
>
Hi Jagan,
On Thu, Jan 5, 2023 at 7:24 AM Jagan Teki wrote:
> Does anyone have any other comments on this? I would like to send v11
> with a few nits on v10. Please let me know.
What is blocking this series to be applied?
On Fri, Jan 6, 2023 at 11:34 AM Adam Ford wrote:
> I got it working on an LVDS display that I have, but I didn't get it
> working on the HDMI bridge. Since we have a few tested-by people,
> it'd be nice to see this integrated so we can work on ading more
> functionality
Agreed. Hopefully, this
Hi Noralf,
On Fri, Dec 16, 2022 at 9:30 AM Noralf Trønnes wrote:
> There is a DRM driver that can be used with all of these controllers:
> drivers/gpu/drm/tiny/panel-mipi-dbi.c. It uses a firmware file for the
> init commands.
>
> Binding:
>
Hi Dmitry,
On Sun, Jan 1, 2023 at 12:58 PM Dmitry Baryshkov
wrote:
>
> Support loading A200 firmware generated from the iMX firmware header
> files. The firmware lacks protection support, however it allows GPU to
> function properly while using the firmware files with clear license
> which
SPI only, so I
guess I should try the fbtdt driver?
The arch/riscv/boot/dts/canaan/sipeed_maix_* boards use compatible =
"sitronix,st7789v"
Do these boards have st7789v functional? Are they using the fbtft or drm
driver?
Appreciate any suggestions.
Thanks,
Fabio Estevam
Hi Jagan,
On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki wrote:
> https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v10
Please preserve the authorship of the patches.
This one is from Marek Vasut:
https://gitlab.com/openedev/kernel/-/commit/e244fa552402caebcf48cd6710fd387429f7f680
but in
On Sun, Dec 11, 2022 at 3:02 PM Kang Minchul wrote:
>
> Function dev_err() is redundant because platform_get_irq()
> already prints an error.
>
> Signed-off-by: Kang Minchul
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git
Hi Sandor,
On Mon, Nov 21, 2022 at 4:27 AM Sandor Yu wrote:
>
> Mailbox access functions could be share to other mhdp driver and
> HDP-TX HDMI/DP PHY drivers, move those functions to head file
> include/drm/bridge/cdns-mhdp-mailbox.h and convert them to
> macro functions.
What is the reason for
On Mon, Nov 14, 2022 at 1:22 PM Andy Shevchenko
wrote:
>
> The list API now provides the list_count() to help with counting
> existing nodes in the list. Uilise it.
s/Uilise/Utilise
Hi,
On Mon, Nov 7, 2022 at 1:34 PM Frieder Schrempf
wrote:
> I tested this on the Kontron DL i.MX8MM which uses a TI SN65DSI84 bridge
> and a Jenson 7" LVDS Display.
>
> Thanks for your work, Jagan!
>
> Tested-by: Frieder Schrempf # Kontron DL
> i.MX8MM
As this series has been successfully
Hi Nia,
On Fri, Oct 7, 2022 at 8:16 AM Nia Espera wrote:
> +static int samsung_s6e3fc2x01_prepare(struct drm_panel *panel)
> +{
> + struct samsung_s6e3fc2x01 *ctx = to_samsung_s6e3fc2x01(panel);
> + struct device *dev = >dsi->dev;
> + int ret;
> +
> + if (ctx->prepared)
Hi Jagan,
On Sat, Oct 1, 2022 at 5:07 AM Jagan Teki wrote:
> Repo:
> https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v6
This URL returns an error. Please double-check.
ported-by: Dan Carpenter
> Link: https://github.com/ClangBuiltLinux/linux/issues/1703
> Cc: l...@lists.linux.dev
> Signed-off-by: Nathan Huckleberry
Reviewed-by: Fabio Estevam
From: Heiko Schocher
innolux_g121i1_l01 sets bpc to 6, so use the corresponding bus format:
MEDIA_BUS_FMT_RGB666_1X7X3_SPWG.
Fixes: 4ae13e486866 ("drm/panel: simple: Add more properties to Innolux
G121I1-L01")
Signed-off-by: Heiko Schocher
Signed-off-by: Fabio Estevam
---
drive
On Mon, Aug 1, 2022 at 10:39 PM Adam Ford wrote:
> I managed to get my HDMI output working. I had the lanes set to 2
> instead of 4. Once I switched to 4-lanes, the monitor came up in
> 1080p. I haven't yet been able to get other modes to work.
Ok, good. On another thread, you mentioned that
PORCH/MSYNC
registers", I get no HDMI output.
Regards,
Fabio Estevam
Hi Adam,
On Sat, Jul 30, 2022 at 12:16 PM Adam Ford wrote:
>
> Hey all,
>
> I am trying to test Jagan's patch series [1] to add support for the
> samsung dsim bridge which is used on the imx8mm to output DSI video.
> The DSIM gets the video from the mxsfb, and in my case, the DSI is
> sent to
Hi Flavio,
On Fri, Jul 15, 2022 at 10:28 AM Flavio Suligoi wrote:
>
> to provid --> to provide
There is also a typo in the Subject line: 2c ---> i2c :-)
From: Fabio Estevam
The sn65dsi83 chip has a test pattern generator capability.
Add a sysfs entry to allow enabling and disabling it in runtime.
This is helpful during the MIPI DSI/LVDS bringup.
To enable the test pattern generator:
echo 1 > /sys/bus/i2c/devices/0-002c/pattern_genera
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