According to the downstram DT file, the qusb2phy ref clock should be
GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK.

Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration")
Cc: Konrad Dybcio <konrad.dyb...@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dyb...@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi 
b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index e8bb170e8b2f..cca56f2fad96 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1262,7 +1262,7 @@ qusb2phy: phy@c012000 {
                        #phy-cells = <0>;
 
                        clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
-                               <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+                               <&gcc GCC_RX0_USB2_CLKREF_CLK>;
                        clock-names = "cfg_ahb", "ref";
 
                        resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
-- 
2.35.1

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