[PATCH 10/10] drm/radeon: work around bugs in caymans compute rings

From: Christian Koenig The shader preemption on cayman doesn't work correctly with multiple rings. So to be able to still make use of the compute rings we use a semaphore to make sure that only one IB can execute at the same time. This isn't as effective as shader

[PATCH 09/10] drm/radeon: replace cs_mutex with vm_mutex

Try to remove or replace the cs_mutex with a vm_mutex where it is still needed. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon.h| 44 +--- drivers/gpu/drm/radeon/radeon_cs.c |7 ++--- drivers/gpu/drm/radeon/radeon_device.c |2

[PATCH 08/10] drm/radeon: replace pflip and sw_int counters with atomics

From: Christian Koenig So we can skip the looking. Also renames sw_int to ring_int, cause that better matches its purpose. Signed-off-by: Christian Koenig --- drivers/gpu/drm/radeon/evergreen.c | 32 - drivers/gpu/drm/radeon/r100.c |

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code v2

From: Christian Koenig 1. It is really dangerous to have more than one spinlock protecting the same information. 2. radeon_irq_set sometimes wasn't called with lock protection, so it can happen that more than one CPU would tamper with the irq regs at the same

[PATCH 06/10] drm/radeon: fix ih ring handling v2

From: Christian Koenig The spinlock was actually there to protect the rptr, but rptr was read outside of the locked area. v2: Keep the spinlock, looks like there is still something in the ih that doesn't like irqs enabled. Signed-off-by: Christian Koenig ---

[PATCH 05/10] drm/radeon: remove some unneeded structure members

From: Christian Koenig Signed-off-by: Christian Koenig --- drivers/gpu/drm/radeon/radeon.h |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 3e83480..618df9a 100644 ---

[PATCH 04/10] drm/radeon: replace vmram_mutex with mclk_lock v2

It is a rw_semaphore now and only write locked while changing the clock. Also the lock is renamed to better reflect what it is protecting. v2: Keep the ttm_vm_ops on IGPs Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon.h|3 ++-

[PATCH 03/10] drm/radeon: rework ring syncing code

Move inter ring syncing with semaphores into the existing ring allocations, with that we need to lock the ring mutex only once. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/evergreen_blit_kms.c |3 +- drivers/gpu/drm/radeon/r600.c |5 +-

[PATCH 02/10] drm/radeon: add infrastructure for advanced ring synchronization

Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon.h | 23 ++- drivers/gpu/drm/radeon/radeon_fence.c | 73 + 2 files changed, 85 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h

[PATCH 01/10] drm/radeon: remove radeon_fence_create

It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/evergreen.c|2 +- drivers/gpu/drm/radeon/ni.c |2 +-

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

On 31.05.2012 20:15, Alex Deucher wrote: > On Thu, May 24, 2012 at 11:35 AM, Alex Deucher > wrote: >> On Thu, May 24, 2012 at 3:49 AM, Christian K?nig >> wrote: >>> From: Christian Koenig >>> >>> 1. It is really dangerous to have more than one >>>spinlock protecting the same information.

[PATCH 14/14] drm/i915: s/mdelay/msleep/ in the sdvo detect function

On Thu, May 31, 2012 at 9:24 PM, Singh, Satyeshwar wrote: > Is there a reason for the 30 ms delay in the first place? git blame says there is, it supposedely fixes a bug with tv detection. -Daniel -- Daniel Vetter daniel.vetter at ffwll.ch - +41 (0) 79 364 57 48 - http://blog.ffwll.ch

[PATCH v2] DRM: Add DRM kms/fb cma helper

On Thu, May 31, 2012 at 11:34:37AM +0200, Lars-Peter Clausen wrote: > >> + drm_helper_mode_fill_fb_struct(_cma->fb, mode_cmd); > >> + > >> + for (i = 0; i < num_planes; i++) > >> + fb_cma->obj[i] = obj[i]; > > > > Check for valid num_planes before this loop? > > > > Hm, I think the

[PATCH 1/2] drm: Don't allow page flip to change pixel format

Does this by extension mean that stride changes should also not be allowed while page flipping? Thanks, Satyeshwar -Original Message- From: dri-devel-bounces+satyeshwar.singh=intel.com at lists.freedesktop.org [mailto:dri-devel-bounces+satyeshwar.singh=intel@lists.freedesktop.org]

[PATCH 14/14] drm/i915: s/mdelay/msleep/ in the sdvo detect function

Is there a reason for the 30 ms delay in the first place? -Satyeshwar -Original Message- From: dri-devel-bounces+satyeshwar.singh=intel.com at lists.freedesktop.org [mailto:dri-devel-bounces+satyeshwar.singh=intel@lists.freedesktop.org] On Behalf Of Daniel Vetter Sent: Thursday, May

[PATCH 2/2] drm/radeon: fixup tiling group size and backendmap on r6xx-r9xx (v4)

From: Alex Deucher Tiling group size is always 256bits on r6xx/r7xx/r8xx/9xx. Also fix and simplify render backend map. This now properly sets up the backend map on r6xx-9xx which should improve 3D performance. Signed-off-by: Alex Deucher Signed-off-by: Jerome Glisse

[PATCH 1/2] drm/radeon: fix HD6790, HD6570 backend programming

From: Jerome Glisse Bugs that should be fixed by this patch : https://bugs.freedesktop.org/show_bug.cgi?id=49792 https://bugzilla.kernel.org/show_bug.cgi?id=43207 https://bugs.freedesktop.org/show_bug.cgi?id=39282 Signed-off-by: Jerome Glisse ---

[PATCH] drm/radeon: properly program gart on rv740, juniper, cypress, barts

From: Alex Deucher Need to program an additional VM register. This doesn't not currently cause any problems, but allows us to program the proper backend map in a subsequent patch which should improve performance on these asics. Signed-off-by: Alex Deucher Cc: stable

[PATCH] drm/radeon: fix bank information in tiling config

From: Alex Deucher While there are cards with more than 8 mem banks, the max number of banks from a tiling perspective is 8, so cap the tiling config at 8 banks. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=43448 Signed-off-by: Alex Deucher Cc: stable at

[PATCH 1/2] drm: Don't allow page flip to change pixel format

A page flip is not a mode set, changing the frame buffer pixel format doesn't make sense and isn't handled by most drivers anyway. Disallow it. Signed-off-by: Laurent Pinchart --- drivers/gpu/drm/drm_crtc.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git

[PATCH 02/10] drm/radeon: add infrastructure for advanced ring synchronization

On Thu, May 31, 2012 at 4:15 PM, Christian K?nig wrote: > Signed-off-by: Christian K?nig > --- > ?drivers/gpu/drm/radeon/radeon.h ? ? ? | ? 23 ++- > ?drivers/gpu/drm/radeon/radeon_fence.c | ? 73 > + > ?2 files changed, 85 insertions(+), 11 deletions(-) >

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code v2

On Thu, May 31, 2012 at 4:16 PM, Christian K?nig wrote: > From: Christian Koenig > > 1. It is really dangerous to have more than one > ? spinlock protecting the same information. > > 2. radeon_irq_set sometimes wasn't called with lock > ? protection, so it can happen that more than one > ? CPU

[PATCH 1/2] drm: Don't allow page flip to change pixel format

On Thu, May 31, 2012 at 3:44 PM, Singh, Satyeshwar wrote: > Does this by extension mean that stride changes should also not be allowed > while page flipping? Everything beyond a crtc base address change should require a full modeset. Alex > Thanks, > Satyeshwar > > -Original Message-

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

On Thu, May 31, 2012 at 2:15 PM, Alex Deucher wrote: > On Thu, May 24, 2012 at 11:35 AM, Alex Deucher > wrote: >> On Thu, May 24, 2012 at 3:49 AM, Christian K?nig >> wrote: >>> From: Christian Koenig >>> >>> 1. It is really dangerous to have more than one >>> ? spinlock protecting the same

[git pull] drm prime mmap/vmap

Hi Linus, as mentioned previously these are the extra bits of drm that relied on the dma-buf pull to work, the first three just stub out the mmap interface, and the next set provide vmap export to i915/radeon/nouveau and vmap import to udl. Dave. The following changes since commit

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

? ?rdev->irq.pflip[crtc] = true; >> ? ? ? ? ? ? ? ?radeon_irq_set(rdev); >> ? ? ? ?} >> - ? ? ? spin_unlock_irqrestore(>irq.pflip_lock[crtc], irqflags); >> + ? ? ? spin_unlock_irqrestore(>irq.lock, irqflags); >> ?} >> >> ?void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) >> @@ -260,12 +268,52 @@ void radeon_irq_kms_pflip_irq_put(struct radeon_device >> *rdev, int crtc) >> ? ? ? ?if (crtc < 0 || crtc >= rdev->num_crtc) >> ? ? ? ? ? ? ? ?return; >> >> - ? ? ? spin_lock_irqsave(>irq.pflip_lock[crtc], irqflags); >> + ? ? ? spin_lock_irqsave(>irq.lock, irqflags); >> ? ? ? ?BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= >> 0); >> ? ? ? ?if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == >> 0)) { >> ? ? ? ? ? ? ? ?rdev->irq.pflip[crtc] = false; >> ? ? ? ? ? ? ? ?radeon_irq_set(rdev); >> ? ? ? ?} >> - ? ? ? spin_unlock_irqrestore(>irq.pflip_lock[crtc], irqflags); >> + ? ? ? spin_unlock_irqrestore(>irq.lock, irqflags); >> +} >> + >> +void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) >> +{ >> + ? ? ? unsigned long irqflags; >> + >> + ? ? ? spin_lock_irqsave(>irq.lock, irqflags); >> + ? ? ? rdev->irq.afmt[block] = true; >> + ? ? ? radeon_irq_set(rdev); >> + ? ? ? spin_unlock_irqrestore(>irq.lock, irqflags); >> + >> +} >> + >> +void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) >> +{ >> + ? ? ? unsigned long irqflags; >> + >> + ? ? ? spin_lock_irqsave(>irq.lock, irqflags); >> + ? ? ? rdev->irq.afmt[block] = false; >> + ? ? ? radeon_irq_set(rdev); >> + ? ? ? spin_unlock_irqrestore(>irq.lock, irqflags); >> ?} >> > > Should probably also add radeon_irq_kms_[en|dis]able_hpd() function > and call replaced the calls to *_irq_set() in the *_hpd_init() and > *_hpd_fini() callbacks for display hotplug. See attached follow on patch. Alex -- next part -- A non-text attachment was scrubbed... Name: 0001-drm-radeon-apply-Murphy-s-law-to-the-kms-hpd-irq-cod.patch Type: text/x-patch Size: 13299 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20120531/2386658a/attachment-0001.bin>

Lots of i915/drm spew on 3.4

2012/5/30 Dave Jones : > On Wed, May 30, 2012 at 05:58:48PM -0400, Dave Jones wrote: > ?> On Wed, May 30, 2012 at 11:51:54PM +0200, Daniel Vetter wrote: > ?> ?> On Wed, May 30, 2012 at 11:31 PM, Dave Jones > wrote: > ?> ?> > On this hardware: > ?> ?> > > ?> ?> > 00:02.0 VGA compatible

[PATCH 4/4] drm: Renesas SH Mobile DRM driver

Hi Sascha, On Wednesday 30 May 2012 18:40:56 Sascha Hauer wrote: > On Wed, May 30, 2012 at 02:32:59PM +0200, Laurent Pinchart wrote: > > The SH Mobile LCD controller (LCDC) DRM driver supports the main > > graphics plane in RGB and YUV formats, as well as the overlay planes (in > > alpha-blending

[PATCH] DRM: add drm gem CMA helper

Hi Sascha, On Wednesday 30 May 2012 18:28:12 Sascha Hauer wrote: > On Wed, May 30, 2012 at 05:40:13PM +0200, Laurent Pinchart wrote: > > Hi Sascha, > > > > Thank you for the patch. I've successfully tested the helper with the new > > SH Mobile DRM driver. Just a couple of comments below in

[PATCH v2] DRM: add drm gem cma helper

Hi Sascha, Thanks for the patch. Here's a bit more extensive review. On Thursday 31 May 2012 10:08:54 Sascha Hauer wrote: > Many embedded drm devices do not have a IOMMU and no dedicated > memory for graphics. These devices use cma (Contiguous Memory > Allocator) backed graphics memory. This

[PATCH v2] DRM: Add DRM kms/fb cma helper

On 05/31/2012 10:13 AM, Sascha Hauer wrote: > On Wed, May 30, 2012 at 05:30:15PM +0200, Lars-Peter Clausen wrote: >> This patch introduces a set of helper function for implementing the KMS >> framebuffer layer for drivers which use the drm gem CMA helper function. >> >> Signed-off-by: Lars-Peter

[PATCH 14/14] drm/i915: s/mdelay/msleep/ in the sdvo detect function

On Thu, May 24, 2012 at 09:26:49PM +0200, Daniel Vetter wrote: > A 30 ms delay is simply way too big to waste cpu cycles on. > > Signed-off-by: Daniel Vetter I've queued this patch here for -next with Chris' irc ack added. -Daniel -- Daniel Vetter Mail: daniel at ffwll.ch Mobile: +41 (0)79 365

Lots of i915/drm spew on 3.4

2012/5/31 Chris Wilson : > Before that commit we had no idea that we had run out of property slots. > I think the WARN is genuine, but maybe we should just bump the count set > it to WARN_ONCE and hope the conversion to lists arrives sooner rather > than latter. > -Chris > Chris is right: this is

[PATCH v2] DRM: Add DRM kms/fb cma helper

On Wed, May 30, 2012 at 05:30:15PM +0200, Lars-Peter Clausen wrote: > This patch introduces a set of helper function for implementing the KMS > framebuffer layer for drivers which use the drm gem CMA helper function. > > Signed-off-by: Lars-Peter Clausen > > --- > Changes since v1: > *

[PATCH v2] DRM: add drm gem cma helper

Many embedded drm devices do not have a IOMMU and no dedicated memory for graphics. These devices use cma (Contiguous Memory Allocator) backed graphics memory. This patch provides helper functions to be able to share the code. Signed-off-by: Sascha Hauer --- changes since v1: - map whole

warn_slowpath_common with linux-3.4

Hello all, here are some warning I got after resuming from suspend. It is not really clear to me how I could debug further. Please tell me if I can do something else. I also attached the whole dmesg. Best Regards, [170934.181984] [ cut here ] [170934.181991] WARNING:

[PATCH] drm: Add downclock quirk for Samsung LTN121AT10-301

On Thu, May 31, 2012 at 3:09 AM, Daniel Vetter wrote: > On Wed, May 30, 2012 at 11:21:32AM -0400, Sean Paul wrote: >> On Wed, May 30, 2012 at 10:16 AM, Adam Jackson wrote: >> > On 5/30/12 8:05 AM, Sean Paul wrote: >> > >> >> Yes, definitely. The reason I can't set it via xrandr (easily) is >> >>

[PATCH] drm: Add downclock quirk for Samsung LTN121AT10-301

On Wed, May 30, 2012 at 11:21:32AM -0400, Sean Paul wrote: > On Wed, May 30, 2012 at 10:16 AM, Adam Jackson wrote: > > On 5/30/12 8:05 AM, Sean Paul wrote: > > > >> Yes, definitely. The reason I can't set it via xrandr (easily) is > >> because we look for lvds downclock modes (in i915) on the

Fw: [Intel-gfx] [PATCH] intel: add a timed wait function

On Thu, May 31, 2012 at 12:35 AM, Eric Anholt wrote: > > Did you want pointer for timeout in the userspace api? ?I don't feel > strongly about it, I just didn't see a use. ?The equivalent API I could > think of was select(), where apparently linux returns time unwaited, > while "everyone else"

Lots of i915/drm spew on 3.4

On Wed, 30 May 2012 18:26:51 -0400, Dave Jones wrote: > On Wed, May 30, 2012 at 05:58:48PM -0400, Dave Jones wrote: > > On Wed, May 30, 2012 at 11:51:54PM +0200, Daniel Vetter wrote: > > > On Wed, May 30, 2012 at 11:31 PM, Dave Jones > wrote: > > > > On this hardware: > > > > > > > >

[Bug 43295] panic occurred switching back to text console ubuntu 11.10

https://bugzilla.kernel.org/show_bug.cgi?id=43295 --- Comment #4 from Thanigaivelan 2012-05-31 02:51:44 --- My System hangs when panic occurred switching back to text console. I have to restart it again. it happen many time. Please tell me what is the problem in kernel file. I am using

[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #2 from Brad Campbell 2012-05-30 19:15:29 PDT --- I can replicate this on all radeon enabled kernels including current. It appears than when more than one head is enabled, a separate set of power profiles is used which attempts to

[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #1 from Brad Campbell 2012-05-30 19:13:12 PDT --- Created attachment 62305 --> https://bugs.freedesktop.org/attachment.cgi?id=62305 The hack I use to enable 3 heads on my iMac without torching the Radeon -- Configure bugmail:

Lots of i915/drm spew on 3.4

On Wed, May 30, 2012 at 11:31 PM, Dave Jones wrote: > On this hardware: > > 00:02.0 VGA compatible controller: Intel Corporation 82945G/GZ Integrated > Graphics Controller (rev 02) > > I get this every boot with Linus current tree (up to > af56e0aa35f3ae2a4c1a6d1000702df1dd78cb76) Just a quick

[PATCHv6 00/13] Integration of videobuf2 with dmabuf

On Tue, May 29, 2012 at 6:25 AM, Laurent Pinchart wrote: > Hi Tomasz, Hi Tomasz, Laurent, Mauro, > > On Wednesday 23 May 2012 14:10:14 Tomasz Stanislawski wrote: >> Hello everyone, >> This patchset adds support for DMABUF [2] importing to V4L2 stack. >> The support for DMABUF exporting was moved

Re: Fw: [Intel-gfx] [PATCH] intel: add a timed wait function

On Thu, May 31, 2012 at 12:35 AM, Eric Anholt e...@anholt.net wrote: Did you want pointer for timeout in the userspace api?  I don't feel strongly about it, I just didn't see a use.  The equivalent API I could think of was select(), where apparently linux returns time unwaited, while everyone

Re: [PATCH] drm: Add downclock quirk for Samsung LTN121AT10-301

On Wed, May 30, 2012 at 11:21:32AM -0400, Sean Paul wrote: On Wed, May 30, 2012 at 10:16 AM, Adam Jackson a...@redhat.com wrote: On 5/30/12 8:05 AM, Sean Paul wrote: Yes, definitely. The reason I can't set it via xrandr (easily) is because we look for lvds downclock modes (in i915) on the

Re: Lots of i915/drm spew on 3.4

On Wed, 30 May 2012 18:26:51 -0400, Dave Jones da...@redhat.com wrote: On Wed, May 30, 2012 at 05:58:48PM -0400, Dave Jones wrote: On Wed, May 30, 2012 at 11:51:54PM +0200, Daniel Vetter wrote: On Wed, May 30, 2012 at 11:31 PM, Dave Jones da...@redhat.com wrote: On this hardware:

[PATCH v2] DRM: add drm gem cma helper

Many embedded drm devices do not have a IOMMU and no dedicated memory for graphics. These devices use cma (Contiguous Memory Allocator) backed graphics memory. This patch provides helper functions to be able to share the code. Signed-off-by: Sascha Hauer s.ha...@pengutronix.de --- changes since

Re: [PATCH v2] DRM: Add DRM kms/fb cma helper

On Wed, May 30, 2012 at 05:30:15PM +0200, Lars-Peter Clausen wrote: This patch introduces a set of helper function for implementing the KMS framebuffer layer for drivers which use the drm gem CMA helper function. Signed-off-by: Lars-Peter Clausen l...@metafoo.de --- Changes since v1:

Re: [PATCH 14/14] drm/i915: s/mdelay/msleep/ in the sdvo detect function

On Thu, May 24, 2012 at 09:26:49PM +0200, Daniel Vetter wrote: A 30 ms delay is simply way too big to waste cpu cycles on. Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch I've queued this patch here for -next with Chris' irc ack added. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch

Re: [PATCH v2] DRM: add drm gem cma helper

Hi Sascha, Thanks for the patch. Here's a bit more extensive review. On Thursday 31 May 2012 10:08:54 Sascha Hauer wrote: Many embedded drm devices do not have a IOMMU and no dedicated memory for graphics. These devices use cma (Contiguous Memory Allocator) backed graphics memory. This patch

Re: [PATCH v2] DRM: Add DRM kms/fb cma helper

On 05/31/2012 10:13 AM, Sascha Hauer wrote: On Wed, May 30, 2012 at 05:30:15PM +0200, Lars-Peter Clausen wrote: This patch introduces a set of helper function for implementing the KMS framebuffer layer for drivers which use the drm gem CMA helper function. Signed-off-by: Lars-Peter Clausen

Re: [PATCH] DRM: add drm gem CMA helper

Hi Sascha, On Wednesday 30 May 2012 18:28:12 Sascha Hauer wrote: On Wed, May 30, 2012 at 05:40:13PM +0200, Laurent Pinchart wrote: Hi Sascha, Thank you for the patch. I've successfully tested the helper with the new SH Mobile DRM driver. Just a couple of comments below in addition to

Re: [PATCH 4/4] drm: Renesas SH Mobile DRM driver

Hi Sascha, On Wednesday 30 May 2012 18:40:56 Sascha Hauer wrote: On Wed, May 30, 2012 at 02:32:59PM +0200, Laurent Pinchart wrote: The SH Mobile LCD controller (LCDC) DRM driver supports the main graphics plane in RGB and YUV formats, as well as the overlay planes (in alpha-blending mode

Re: Lots of i915/drm spew on 3.4

2012/5/31 Chris Wilson ch...@chris-wilson.co.uk: Before that commit we had no idea that we had run out of property slots. I think the WARN is genuine, but maybe we should just bump the count set it to WARN_ONCE and hope the conversion to lists arrives sooner rather than latter. -Chris Chris

Re: [PATCH] drm: Add downclock quirk for Samsung LTN121AT10-301

On Thu, May 31, 2012 at 3:09 AM, Daniel Vetter dan...@ffwll.ch wrote: On Wed, May 30, 2012 at 11:21:32AM -0400, Sean Paul wrote: On Wed, May 30, 2012 at 10:16 AM, Adam Jackson a...@redhat.com wrote: On 5/30/12 8:05 AM, Sean Paul wrote: Yes, definitely. The reason I can't set it via xrandr

Re: Lots of i915/drm spew on 3.4

2012/5/30 Dave Jones da...@redhat.com: On Wed, May 30, 2012 at 05:58:48PM -0400, Dave Jones wrote:   On Wed, May 30, 2012 at 11:51:54PM +0200, Daniel Vetter wrote:     On Wed, May 30, 2012 at 11:31 PM, Dave Jones da...@redhat.com wrote:     On this hardware:         00:02.0 VGA compatible

Re: [PATCH v2] DRM: add drm gem cma helper

Hi Sascha, it's good try to avoid demand paging way by page fault handler. actually, we don't need demand paging way on non-iommu system. I looked into your previous patch and I realized that patch was based on old exynos driver. now patch looks almostly good to me and below is my comments

[PATCH 0/2] Miscellaneous mode set and page flip fixes

Hi everybody, Here are two small fixes that disallow format changes in page flip operations, and perform a full mode set instead of a mode set base in the CRTC helper set config handler if the pixel format changed. Laurent Pinchart (2): drm: Don't allow page flip to change pixel format drm:

[PATCH 1/2] drm: Don't allow page flip to change pixel format

A page flip is not a mode set, changing the frame buffer pixel format doesn't make sense and isn't handled by most drivers anyway. Disallow it. Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com --- drivers/gpu/drm/drm_crtc.c |8 1 files changed, 8 insertions(+), 0

[PATCH 2/2] drm: Perform a full mode set when the pixel format changed

Test whether the pixel format changes in the mode set handler, and perform a full mode set instead of a mode set base if it does. Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com --- drivers/gpu/drm/drm_crtc_helper.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)

Re: [PATCH v2] DRM: Add DRM kms/fb cma helper

On Thu, May 31, 2012 at 11:34:37AM +0200, Lars-Peter Clausen wrote: + drm_helper_mode_fill_fb_struct(fb_cma-fb, mode_cmd); + + for (i = 0; i num_planes; i++) + fb_cma-obj[i] = obj[i]; Check for valid num_planes before this loop? Hm, I think the callers already take

Re: [PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

On Thu, May 24, 2012 at 11:35 AM, Alex Deucher alexdeuc...@gmail.com wrote: On Thu, May 24, 2012 at 3:49 AM, Christian König deathsim...@vodafone.de wrote: From: Christian Koenig christian.koe...@amd.com 1. It is really dangerous to have more than one   spinlock protecting the same

Re: [PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

On Thu, May 31, 2012 at 2:15 PM, Alex Deucher alexdeuc...@gmail.com wrote: On Thu, May 24, 2012 at 11:35 AM, Alex Deucher alexdeuc...@gmail.com wrote: On Thu, May 24, 2012 at 3:49 AM, Christian König deathsim...@vodafone.de wrote: From: Christian Koenig christian.koe...@amd.com 1. It is

Re: [PATCH 14/14] drm/i915: s/mdelay/msleep/ in the sdvo detect function

On Thu, May 31, 2012 at 9:24 PM, Singh, Satyeshwar satyeshwar.si...@intel.com wrote: Is there a reason for the 30 ms delay in the first place? git blame says there is, it supposedely fixes a bug with tv detection. -Daniel -- Daniel Vetter daniel.vet...@ffwll.ch - +41 (0) 79 364 57 48 -

RE: [PATCH 1/2] drm: Don't allow page flip to change pixel format

Does this by extension mean that stride changes should also not be allowed while page flipping? Thanks, Satyeshwar -Original Message- From: dri-devel-bounces+satyeshwar.singh=intel@lists.freedesktop.org [mailto:dri-devel-bounces+satyeshwar.singh=intel@lists.freedesktop.org] On

Re: [PATCH 1/2] drm: Don't allow page flip to change pixel format

On Thu, May 31, 2012 at 3:44 PM, Singh, Satyeshwar satyeshwar.si...@intel.com wrote: Does this by extension mean that stride changes should also not be allowed while page flipping? Everything beyond a crtc base address change should require a full modeset. Alex Thanks, Satyeshwar

Re: [PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code

On 31.05.2012 20:15, Alex Deucher wrote: On Thu, May 24, 2012 at 11:35 AM, Alex Deucheralexdeuc...@gmail.com wrote: On Thu, May 24, 2012 at 3:49 AM, Christian König deathsim...@vodafone.de wrote: From: Christian Koenigchristian.koe...@amd.com 1. It is really dangerous to have more than one

[PATCH 02/10] drm/radeon: add infrastructure for advanced ring synchronization

Signed-off-by: Christian König deathsim...@vodafone.de --- drivers/gpu/drm/radeon/radeon.h | 23 ++- drivers/gpu/drm/radeon/radeon_fence.c | 73 + 2 files changed, 85 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h

[PATCH 01/10] drm/radeon: remove radeon_fence_create

It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: Christian König deathsim...@vodafone.de --- drivers/gpu/drm/radeon/evergreen.c|2 +- drivers/gpu/drm/radeon/ni.c |2

[PATCH 05/10] drm/radeon: remove some unneeded structure members

From: Christian Koenig christian.koe...@amd.com Signed-off-by: Christian Koenig christian.koe...@amd.com --- drivers/gpu/drm/radeon/radeon.h |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 3e83480..618df9a 100644 ---

[PATCH 03/10] drm/radeon: rework ring syncing code

Move inter ring syncing with semaphores into the existing ring allocations, with that we need to lock the ring mutex only once. Signed-off-by: Christian König deathsim...@vodafone.de --- drivers/gpu/drm/radeon/evergreen_blit_kms.c |3 +- drivers/gpu/drm/radeon/r600.c |5 +-

[PATCH 06/10] drm/radeon: fix ih ring handling v2

From: Christian Koenig christian.koe...@amd.com The spinlock was actually there to protect the rptr, but rptr was read outside of the locked area. v2: Keep the spinlock, looks like there is still something in the ih that doesn't like irqs enabled. Signed-off-by: Christian Koenig

[PATCH 07/10] drm/radeon: apply Murphy's law to the kms irq code v2

From: Christian Koenig christian.koe...@amd.com 1. It is really dangerous to have more than one spinlock protecting the same information. 2. radeon_irq_set sometimes wasn't called with lock protection, so it can happen that more than one CPU would tamper with the irq regs at the same

[PATCH 08/10] drm/radeon: replace pflip and sw_int counters with atomics

From: Christian Koenig christian.koe...@amd.com So we can skip the looking. Also renames sw_int to ring_int, cause that better matches its purpose. Signed-off-by: Christian Koenig christian.koe...@amd.com --- drivers/gpu/drm/radeon/evergreen.c | 32 -

[PATCH 09/10] drm/radeon: replace cs_mutex with vm_mutex

Try to remove or replace the cs_mutex with a vm_mutex where it is still needed. Signed-off-by: Christian König deathsim...@vodafone.de --- drivers/gpu/drm/radeon/radeon.h| 44 +--- drivers/gpu/drm/radeon/radeon_cs.c |7 ++---

[PATCH 10/10] drm/radeon: work around bugs in caymans compute rings

From: Christian Koenig christian.koe...@amd.com The shader preemption on cayman doesn't work correctly with multiple rings. So to be able to still make use of the compute rings we use a semaphore to make sure that only one IB can execute at the same time. This isn't as effective as shader

[PATCH 04/10] drm/radeon: replace vmram_mutex with mclk_lock v2

It is a rw_semaphore now and only write locked while changing the clock. Also the lock is renamed to better reflect what it is protecting. v2: Keep the ttm_vm_ops on IGPs Signed-off-by: Christian König deathsim...@vodafone.de --- drivers/gpu/drm/radeon/radeon.h|3 ++-

Re: [PATCH 02/10] drm/radeon: add infrastructure for advanced ring synchronization

On Thu, May 31, 2012 at 4:15 PM, Christian König deathsim...@vodafone.de wrote: Signed-off-by: Christian König deathsim...@vodafone.de ---  drivers/gpu/drm/radeon/radeon.h       |   23 ++-  drivers/gpu/drm/radeon/radeon_fence.c |   73 +  2 files

[PATCH] drm/radeon: fix bank information in tiling config

From: Alex Deucher alexander.deuc...@amd.com While there are cards with more than 8 mem banks, the max number of banks from a tiling perspective is 8, so cap the tiling config at 8 banks. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=43448 Signed-off-by: Alex Deucher

[PATCH] drm/radeon: properly program gart on rv740, juniper, cypress, barts

From: Alex Deucher alexander.deuc...@amd.com Need to program an additional VM register. This doesn't not currently cause any problems, but allows us to program the proper backend map in a subsequent patch which should improve performance on these asics. Signed-off-by: Alex Deucher

[PATCH 1/2] drm/radeon: fix HD6790, HD6570 backend programming

From: Jerome Glisse jgli...@redhat.com Bugs that should be fixed by this patch : https://bugs.freedesktop.org/show_bug.cgi?id=49792 https://bugzilla.kernel.org/show_bug.cgi?id=43207 https://bugs.freedesktop.org/show_bug.cgi?id=39282 Signed-off-by: Jerome Glisse jgli...@redhat.com ---

[PATCH 2/2] drm/radeon: fixup tiling group size and backendmap on r6xx-r9xx (v4)

From: Alex Deucher alexander.deuc...@amd.com Tiling group size is always 256bits on r6xx/r7xx/r8xx/9xx. Also fix and simplify render backend map. This now properly sets up the backend map on r6xx-9xx which should improve 3D performance. Signed-off-by: Alex Deucher alexander.deuc...@amd.com