Fix another oops reproducible when rebooting the board with the Adreno
GPU wokring in the headless mode (e.g. iMX platforms).
Unable to handle kernel NULL pointer dereference at virtual address
when read
[] *pgd=74936831, *pte=, *ppte=
Internal error: Oops: 17
On 12/28/22 20:00, Randy Dunlap wrote:
Fix all kernel-doc warnings in dc/core/dc.c:
dc.c:385: warning: missing initial short description on line:
* dc_stream_adjust_vmin_vmax:
dc.c:392: warning: contents before sections
dc.c:399: warning: No description found for return value of
Switch to %zu for printing size_t which will
fix compilation warning for 32-bit build.
Reported-by: kernel test robot
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Thu, 29 Dec 2022 14:31:46 +0100, Luca Ceresoli wrote:
> The Tegra20 VI peripheral can receive parallel input from the VIP parallel
> input module. Add it to the allowed properties and augment the existing
> nvidia,tegra20-vi example to show a 'vip' property.
>
> Reviewed-by: Krzysztof
On 30/12/2022 16:35, Robert Foss wrote:
> The mmxc power-domain-name is not required, and is not
> used by either earlier or later SoC versions (sm8250 / sm8450).
>
> Signed-off-by: Robert Foss
> Reviewed-by: Konrad Dybcio
> ---
Please, do not mix fixes, cleanups and new features. This delays
On 30/12/2022 16:35, Robert Foss wrote:
> Use two interconnect cells in order to optionally
> support a path tag.
>
> Signed-off-by: Robert Foss
> Reviewed-by: Konrad Dybcio
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++--
> 1 file changed, 14 insertions(+), 14
The devm_clk_get_enabled() helper:
- calls devm_clk_get()
- calls clk_prepare_enable() and registers what is needed in order to
call clk_disable_unprepare() when needed, as a managed resource.
This simplifies the code and avoids the need of a dedicated function used
with
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 91195847031b60062eb046b8bb0c9e64a2291e10
commit: c3bfba9a222550406082c92bbabc9c8b1355d8b8 [7/20] drm/i915: Check for
integer truncation on scatterlist creation
config: i386-defconfig
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
Hi Javier,
On Fri, Dec 30, 2022 at 12:31:52PM +0100, Javier Martinez Canillas wrote:
> From: Kamil Trzciński
>
> The driver is for panels based on the Himax HX8394 controller, such as the
> HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface.
I see you've removed debug
Hi Javier,
On Fri, Dec 30, 2022 at 12:31:54PM +0100, Javier Martinez Canillas wrote:
> From: Ondrej Jirman
>
> The phone's display is using Hannstar LCD panel, and Goodix based
> touchscreen. Support it.
>
> Signed-off-by: Ondrej Jirman
> Co-developed-by: Martijn Braam
> Signed-off-by:
Hello,
On Fri, Dec 30, 2022 at 12:31:53PM +0100, Javier Martinez Canillas wrote:
> Add myself as maintainer for the driver and devicetree bindings schema.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Sam Ravnborg
> ---
>
> Changes in v4:
> - Add Sam Ravnborg's Acked-by tag.
>
>
On 28.12.2022 15:57, Wadim Egorov wrote:
Switch to gpiod_set_value_cansleep() in sii902x_reset().
This is relevant if the reset line is tied to a I2C GPIO
controller.
Signed-off-by: Wadim Egorov
Reviewed-by: Andrzej Hajda
Regards
Andrzej
---
drivers/gpu/drm/bridge/sii902x.c | 4 ++--
On 30.12.2022 16:29, Christophe JAILLET wrote:
The devm_clk_get_enabled() helper:
- calls devm_clk_get()
- calls clk_prepare_enable() and registers what is needed in order to
call clk_disable_unprepare() when needed, as a managed resource.
This simplifies the code and avoids
The mmxc power-domain-name is not required, and is not
used by either earlier or later SoC versions (sm8250 / sm8450).
Signed-off-by: Robert Foss
Reviewed-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for MDSS device
tree bindings
Signed-off-by: Robert Foss
Reviewed-by: Rob Herring
---
.../display/msm/qcom,sm8350-mdss.yaml | 221 ++
1 file changed, 221
The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip.
In order to toggle the board to enable the HDMI output,
switch #7 & #8 on the rightmost multi-switch package have
to be toggled to On.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 105
Enable the display subsystem and the dsi0 output for
the sm8350-hdk board.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 297 ++-
1 file changed, 293 insertions(+), 4 deletions(-)
diff --git
Add compatibles string, "qcom,sm8350-mdss", for the multimedia display
subsystem unit used on Qualcomm SM8350 platform.
Signed-off-by: Robert Foss
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/msm_mdss.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Add GPIO line names as described by the sm8350-hdk schematic.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 205
1 file changed, 205 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
Use two interconnect cells in order to optionally
support a path tag.
Signed-off-by: Robert Foss
Reviewed-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git
Add compatibility for SM8350 display subsystem, including
required entries in DPU hw catalog.
Signed-off-by: Robert Foss
Reviewed-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 195 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 1 +
2 files
Add compatibles string, "qcom,sm8350-dpu", for the display processing unit
used on Qualcomm SM8350 platform.
Signed-off-by: Robert Foss
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for DPU device
tree bindings
Signed-off-by: Robert Foss
Reviewed-by: Rob Herring
---
.../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++
1 file changed, 120
Dependencies:
https://lore.kernel.org/all/20221102231309.583587-1-dmitry.barysh...@linaro.org/
https://lore.kernel.org/all/20221024164225.3236654-1-dmitry.barysh...@linaro.org/
https://lore.kernel.org/all/20221104130324.1024242-5-dmitry.barysh...@linaro.org/
Branch:
The devm_clk_get_enabled() helper:
- calls devm_clk_get()
- calls clk_prepare_enable() and registers what is needed in order to
call clk_disable_unprepare() when needed, as a managed resource.
This simplifies the code and avoids the need of a dedicated function used
with
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
Reviewed-by: Arnd Bergmann
---
v2: squashed all arch patches into one
v3: fixed alpha/xchg_local, thx to l...@intel.com
---
arch/alpha/include/asm/cmpxchg.h | 8
arch/arc/include/asm/cmpxchg.h | 4
dcss_drv_platform_remove() is only called for a device after
dcss_drv_platform_probe() returned 0. In that case dev_set_drvdata() was
called with a non-NULL value and so dev_get_drvdata() won't return NULL.
Signed-off-by: Uwe Kleine-König
---
drivers/gpu/drm/imx/dcss/dcss-drv.c | 3 ---
1 file
The driver core takes care about removing driver data, so this can be
dropped from the driver.
Signed-off-by: Uwe Kleine-König
---
drivers/gpu/drm/imx/dcss/dcss-drv.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss-drv.c
Hi Maíra,
Am 29.12.22 um 20:46 schrieb Maíra Canal:
If vc4_hdmi_reset_link() returns -EDEADLK, it means that a deadlock
happened in the locking context. This situation should be addressed by
dropping all currently held locks and block until the contended lock
becomes available. Currently, vc4
On Fri, 30 Dec 2022 11:20:42 +0100
Boris Brezillon wrote:
> Hello Matthew,
>
> On Thu, 22 Dec 2022 14:21:11 -0800
> Matthew Brost wrote:
>
> > In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
> > mapping between a drm_gpu_scheduler and drm_sched_entity. At first this
> >
Add myself as maintainer for the driver and devicetree bindings schema.
Signed-off-by: Javier Martinez Canillas
Acked-by: Sam Ravnborg
---
Changes in v4:
- Add Sam Ravnborg's Acked-by tag.
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
From: Kamil Trzciński
The driver is for panels based on the Himax HX8394 controller, such as the
HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface.
Signed-off-by: Kamil Trzciński
Co-developed-by: Ondrej Jirman
Signed-off-by: Ondrej Jirman
Co-developed-by: Javier
From: Ondrej Jirman
The phone's display is using Hannstar LCD panel, and Goodix based
touchscreen. Support it.
Signed-off-by: Ondrej Jirman
Co-developed-by: Martijn Braam
Signed-off-by: Martijn Braam
Co-developed-by: Kamil Trzciński
Signed-off-by: Kamil Trzciński
Signed-off-by: Javier
Add device tree bindings for panels based on the Himax HX8394 controller,
such as the HannStar HSD060BHW4 720x1440 TFT LCD panel that is connected
through a MIPI-DSI video interface.
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
---
Changes in v4:
- Add fallback
This series add support for the display present in the PinePhone Pro.
Patch #1 adds a driver for panels using the Himax HX8394 panel controller,
such as the HSD060BHW4 720x1440 TFT LCD panel present in the PinePhone Pro.
Patch #2 adds a devicetree binding schema for this driver and patch #3 adds
GPU drivers have traditionally used shmem to back up GPU buffer contents
for swap on physical memory shortage. Some integrated GPU drivers use
shmem files as the backing storage for their GPU buffers, other drivers,
in particular drivers that need a Write-Combining caching strategy on
system
Hi, Christian, others.
I'm starting to take a look at the TTM shrinker again. We'll probably be
needing it at least for supporting integrated hardware with the xe driver.
So assuming that the last attempt failed because of the need to allocate
shmem pages and lack of writeback at shrink time, I
Hello Matthew,
On Thu, 22 Dec 2022 14:21:11 -0800
Matthew Brost wrote:
> In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
> mapping between a drm_gpu_scheduler and drm_sched_entity. At first this
> seems a bit odd but let us explain the reasoning below.
>
> 1. In XE the
On Fri, Dec 30, 2022 at 12:01:23PM +0200, Mikko Perttunen wrote:
> On 12/30/22 11:15, Stanislaw Gruszka wrote:
> > On Wed, Dec 28, 2022 at 03:17:59PM +0200, Mikko Perttunen wrote:
> > > On 12/28/22 15:08, Deepak R Varma wrote:
> > > > On Wed, Dec 28, 2022 at 02:28:54PM +0200, Mikko Perttunen
On 12/30/22 12:01, Mikko Perttunen wrote:
On 12/30/22 11:15, Stanislaw Gruszka wrote:
On Wed, Dec 28, 2022 at 03:17:59PM +0200, Mikko Perttunen wrote:
On 12/28/22 15:08, Deepak R Varma wrote:
On Wed, Dec 28, 2022 at 02:28:54PM +0200, Mikko Perttunen wrote:
On 12/27/22 19:14, Deepak R Varma
On 12/30/22 11:15, Stanislaw Gruszka wrote:
On Wed, Dec 28, 2022 at 03:17:59PM +0200, Mikko Perttunen wrote:
On 12/28/22 15:08, Deepak R Varma wrote:
On Wed, Dec 28, 2022 at 02:28:54PM +0200, Mikko Perttunen wrote:
On 12/27/22 19:14, Deepak R Varma wrote:
kfree() & vfree() internally perform
Hi Dave and Daniel,
Here goes the initial fixes for 6.2.
The most critical ones seems to be the evict fix from Matt and
the MIPI DSI from Jani. Both targeting stable trees.
I'm sorry for sending this on a Friday and not on a Thursday as
usual. Where did this week go? Worst case this wait one
On Wed, Dec 28, 2022 at 03:17:59PM +0200, Mikko Perttunen wrote:
> On 12/28/22 15:08, Deepak R Varma wrote:
> > On Wed, Dec 28, 2022 at 02:28:54PM +0200, Mikko Perttunen wrote:
> > > On 12/27/22 19:14, Deepak R Varma wrote:
> > > > kfree() & vfree() internally perform NULL check on the pointer
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