On Son, 2012-09-09 at 15:33 -0700, Jordan Justen wrote:
New branch 'debian-experimental' available with the following commits:
I think you pushed this to the wrong repository?
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EditLive Enterprise is the world's most technically advanced content
authoring tool
On Mit, 2011-06-15 at 16:58 +0200, Michel Dänzer wrote:
On Die, 2011-06-07 at 21:42 +0800, Donnie Fang wrote:
3D render image on WC AGP aperture BO and then CPU fetch the image
from this bo, in order to achieve performance, after 3D finished
rendering, validate this bo into cached system
-base == hw-base)
return true;
/* is the generic aperture base inside the hw base-hw base+size */
- if (gen-base hw-base gen-base = hw-base + hw-size)
+ if (gen-base hw-base gen-base hw-base + hw-size)
Good catch.
Reviewed-by: Michel Dänzer mic...@daenzer.net
endianness issues
in the Mesa tree, in particular concerning r300g but also the classic
driver related to the OpenGL blit functionality. I've been meaning to
clean up and push my hacks for those but had little time recently.
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Herrenschmidt b...@kernel.crashing.org
Reviewed-by: Michel Dänzer mic...@daenzer.net
Thanks for tackling this, Ben!
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sent
to xorg-devel, add intel polled/hpd setting, add initial nouveau polled/hpd
settings.
v3: add config lock take inside polling, add intel/nouveau poll init/fini
calls
Signed-off-by: Dave Airlie airl...@redhat.com
Core and radeon parts
Reviewed-by: Michel Dänzer mic...@daenzer.net
) by making the kernel fake
information. Wouldn't it be better to address these in userspace?
Otherwise if more similar issues turn up, we might end up in a twisty
maze of fake information, possibly with conflicting requirements.
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On Mit, 2010-05-05 at 20:25 +1000, Dave Airlie wrote:
2010/5/5 Michel Dänzer mic...@daenzer.net:
On Mit, 2010-05-05 at 11:12 +1000, Dave Airlie wrote:
So at startup X drivers genearlly seem to ask for a list of connectors
and status for them, and if it can't find any connected, it goes
On Die, 2009-12-08 at 12:24 +0100, Rafał Miłecki wrote:
W dniu 8 grudnia 2009 12:03 użytkownik Michel Dänzer
mic...@daenzer.net napisał:
On Tue, 2009-12-08 at 11:32 +0100, Rafał Miłecki wrote:
2009/12/8 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
Allows
-placement.lpfn = rdev-mc.visible_vram_size
PAGE_SHIFT;
r = ttm_bo_validate(bo, rbo-placement, false, true,
false);
if (unlikely(r != 0))
This will impose rbo-placement.lpfn for GTT as well, but it's only
required for VRAM.
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Earthling Michel
*rdev, struct drm_gem_object *gobj,
BTW, this means there won't be any busy placements if (domain !=
RADEON_GEM_DOMAIN_VRAM || pinned). Not sure if that's a problem.
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From: Michel Dänzer daen...@vmware.com
Gleaned from the Mesa code.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 .
Signed-off-by: Michel Dänzer daen...@vmware.com
Cc: sta...@kernel.org
---
drivers/gpu/drm/radeon/r300.c |6 +++---
drivers/gpu/drm/radeon/radeon_cp.c | 10
,
uninorth_insert_memory: entry 0x%x occupied
(%x)\n,
i, gp[i]);
This won't work for pre-U3 bridges, as bound table entries are marked by
setting bit 0. (Maybe the driver just shouldn't use
agp_generic_mask_memory?)
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transfer mode.
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Try the new
On Fri, 2010-03-26 at 19:20 +0100, Michel Dänzer wrote:
On Thu, 2010-03-25 at 19:56 +1000, Dave Airlie wrote:
2010/3/25 Michel Dänzer mic...@daenzer.net:
On Fri, 2010-03-19 at 10:35 +1000, Dave Airlie wrote:
From: Dave Airlie airl...@redhat.com
On constrained r100 systems compiz
software fallbacks in the 3D driver.
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On Thu, 2010-03-25 at 19:56 +1000, Dave Airlie wrote:
2010/3/25 Michel Dänzer mic...@daenzer.net:
On Fri, 2010-03-19 at 10:35 +1000, Dave Airlie wrote:
From: Dave Airlie airl...@redhat.com
On constrained r100 systems compiz would fail to start due to a lack
of memory, we can just
From: Michel Dänzer daen...@vmware.com
This prevented radeon.test=1 from testing transfers from/to GTT beyond the
visible VRAM size.
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_object.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff
as well, not sure.
I don't think the way we currently use the same arrays for normal and
busy placement makes a lot of sense, but we probably need a better
mechanism to specify which placements are desirable / acceptable in each
case.
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is unlikely to work with the R300 generation... (though I suspect
the fact this isn't x86 may not exactly help)
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On Don, 2010-03-25 at 19:56 +1000, Dave Airlie wrote:
2010/3/25 Michel Dänzer mic...@daenzer.net:
On Fri, 2010-03-19 at 10:35 +1000, Dave Airlie wrote:
From: Dave Airlie airl...@redhat.com
On constrained r100 systems compiz would fail to start due to a lack
of memory, we can just
On Thu, 2010-03-25 at 11:11 +0100, Michel Dänzer wrote:
On Don, 2010-03-25 at 19:56 +1000, Dave Airlie wrote:
2010/3/25 Michel Dänzer mic...@daenzer.net:
On Fri, 2010-03-19 at 10:35 +1000, Dave Airlie wrote:
From: Dave Airlie airl...@redhat.com
On constrained r100 systems compiz
On Die, 2010-03-23 at 12:32 -0700, Jesse Barnes wrote:
On Thu, 4 Mar 2010 15:20:46 -0800
Jesse Barnes jbar...@virtuousgeek.org wrote:
On Fri, 05 Mar 2010 00:16:45 +0100
Michel Dänzer mic...@daenzer.net wrote:
On Thu, 2010-03-04 at 16:09 -0700, Brian Paul wrote:
Jesse Barnes
On Tue, 2010-03-16 at 10:56 -0400, Alex Deucher wrote:
2010/3/16 Michel Dänzer mic...@daenzer.net:
Commit 96a4c8d50de20da865296a380b996f73204d6b34 ('drm/radeon/kms: fix
i2c prescale calc on older radeons') breaks LVDS on my RV350 PowerBook
again. Reverting just that commit on top of drm
. The VT layer is protected from calling in the
interrupt context. TNor does fbcon call any fb_ops methods from a irq.
E.g. printk?
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Commit 96a4c8d50de20da865296a380b996f73204d6b34 ('drm/radeon/kms: fix
i2c prescale calc on older radeons') breaks LVDS on my RV350 PowerBook
again. Reverting just that commit on top of drm-radeon-testing commit
589468458fa964c2020e23e4d9353be2ef8bd3be fixes it.
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Earthling Michel Dänzer
On Tue, 2010-03-16 at 10:56 -0400, Alex Deucher wrote:
2010/3/16 Michel Dänzer mic...@daenzer.net:
Commit 96a4c8d50de20da865296a380b996f73204d6b34 ('drm/radeon/kms: fix
i2c prescale calc on older radeons') breaks LVDS on my RV350 PowerBook
again. Reverting just that commit on top of drm
the TTM locking given that. Maybe James
has ideas for this given his better familiarity with fbdev internals.
[0] Though that was really only about making it possible to unpin the
fbcon BO while it isn't being displayed, resizing it might involve other
issues I'm not aware of.
--
Earthling Michel
automaticaly selected
libdrm_(radeon|intel)
This optimization decreases cs_write_reloc share of torcs profiling from 4.3%
to 2.6%.
Signed-off-by: Pauli Nieminen suok...@gmail.com
Tested-by: Michel Dänzer mic...@daenzer.net
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that, maybe that should only be enabled via some module
option for developers.
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!= xno; then
+ INTEL=yes
+ fi
+ if test x$RADEON != xno; then
+ RADEON=yes
+ fi
fi
fi
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... presumably the latter should be
called __sync_sub_and_fetch()?
Do these stand any chance of working properly in circumstances where
atomicity is actually important though?
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Libre software enthusiast | Debian
for me, but fdo is usually pretty quick.
Can't say I've really noticed any difference, probably thanks to the
awesome listadmin tool. But it certainly won't hurt.
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the moderation queues for both lists on a daily
basis and am volunteering to continue doing so, but other than that I'm
not really keen on being a list admin.
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Libre software enthusiast | Debian, X and DRI
version, and the patchlevel has no impact on the
interface. All the other drivers are basically following this, only
nouveau is abusing the patchlevel as a major version for reasons beyond
me.
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Libre software enthusiast
into pool fill and pool free
code?
Maybe we need userspace BO sub-allocation and/or caching. At least for
the 'DMA' buffers it should be simple for userspace to keep a round
robin list of buffers.
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Libre software
of worker kernel thread.
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Download Intel#174; Parallel Studio Eval
Try
even?
I think it's great to keep branches based on the last release as long as
possible. It allows testing DRM changes easily without pulling in random
other changes.
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Libre software enthusiast | Debian, X
was enabled for the xserver and Gallium build?
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Libre software enthusiast | Debian, X and DRI developer
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Download Intel#174
From: Michel Dänzer daen...@vmware.com
It's happened time and time again (most recently with the support for EDID
hardcoded in the BIOS ROM) that new code didn't check for rdev-bios being
non-NULL before triggering dereferences of it. This would result in an
oops/panic on setups with no BIOS ROM
!= SVGA_ID_2) {
DRM_ERROR(Unsupported SVGA ID 0x%lx\n, svga_id);
/* Bail */
}
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:10.0: LVDS-1: EDID invalid.
[0.762960] [drm:radeon_dvi_detect] *ERROR* DVI-I-1: probed a monitor but
no|invalid EDID
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On Wed, 2010-01-27 at 10:30 -0500, Alex Deucher wrote:
2010/1/27 Michel Dänzer mic...@daenzer.net:
your commit 8131660130d3dc2629a150d47e6a04c8a1a6244b ('drm/radeon/kms:
add support for hw i2c on r1xx-r5xx') breaks LVDS on my PowerBook. It
looks kinda like blooming, though I can actually
From: Michel Dänzer daen...@vmware.com
If radeon_cs_parser_init() fails, radeon_cs_ioctl() calls
radeon_cs_parser_fini() with the non-zero error value. The latter dereferenced
parser-ib which hasn't been initialized yet - boom. Add a test for parser-ib
being non-NULL before dereferencing
);
+ }
WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
break;
Minor niggle here: You could leave a single udelay() after the if
(is_mac) blocks.
Other than that,
Reviewed-by: Michel Dänzer mic...@daenzer.net
Tested-by: Michel
From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
Looks like this simple fix got lost last time...
drivers/gpu/drm/radeon/radeon_combios.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c
resync_scratch;
struct mutexcs_mutex;
struct radeon_wbwb;
struct radeon_dummy_pagedummy_page;
Indentation still looks wrong in this hunk.
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interrupt, have you tried
doing it in the interrupt handler for the vblank interrupt instead?
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From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_combios.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c
b/drivers/gpu/drm/radeon/radeon_combios.c
index
From: Michel Dänzer daen...@vmware.com
The HDP read cache should only affect CPU reads from VRAM.
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_gem.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon
the
interrupt itself. Way back when I implemented DRI1 tear-free buffer
swaps for i945, I had to use a tasklet to reliably do work within the
vertical blank period.
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Libre software enthusiast | Debian, X
, 60, true, false, false);
+ DRM_DEBUG(Adding native panel mode %s\n, mode-name);
Might be worth reflecting in the message that it's not really the native
mode but a generated approximation of it.
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Libre
problem: it's specific to the 2D engine, which
doesn't exist anymore as of R6xx, and it would also happen with UMS.
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/ddx/mesa (no r300g bits yet) to clean the API of
all of this.
I'd like to then declare this as the stable API going forward.
Thanks Dave, these look good.
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Libre software enthusiast | Debian, X
On Tue, 2009-12-15 at 22:26 +0100, Gerhard Pircher wrote:
Von: Michel Dänzer mic...@daenzer.net
On Tue, 2009-12-15 at 13:37 +0100, Gerhard Pircher wrote:
Von: Michel Dänzer mic...@daenzer.net
guess there could be many possible causes for the problem, but the
most likely
On Tue, 2009-12-15 at 13:37 +0100, Gerhard Pircher wrote:
Original-Nachricht
Datum: Tue, 15 Dec 2009 00:01:50 +0100
Von: Michel Dänzer mic...@daenzer.net
An: Gerhard Pircher gerhard_pirc...@gmx.net
CC: dri-devel@lists.sourceforge.net
Betreff: Re: Testing an AGPGART
simple to catch that kind
of problem. I don't suppose higher transfer rates work any better? :) I
guess there could be many possible causes for the problem, but the most
likely seems some kind of coherency issue between the CPU writes and GPU
reads.
Hope this helps,
--
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From: Michel Dänzer daen...@vmware.com
Allows e.g. power management daemons to control the backlight level. Inspired
by the corresponding code in radeonfb.
Signed-off-by: Michel Dänzer daen...@vmware.com
---
Does anyone have an idea if this will interact well with x86 laptop hotkeys /
ACPI
On Tue, 2009-12-08 at 11:32 +0100, Rafał Miłecki wrote:
2009/12/8 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
Allows e.g. power management daemons to control the backlight level.
Inspired
by the corresponding code in radeonfb.
Signed-off-by: Michel
On Tue, 2009-12-01 at 09:43 +0100, Rafał Miłecki wrote:
W dniu 1 grudnia 2009 08:33 użytkownik Michel Dänzer
mic...@daenzer.net napisał:
On Tue, 2009-12-01 at 08:03 +0100, Rafał Miłecki wrote:
2009/12/1 Alex Deucher alexdeuc...@gmail.com:
On Mon, Nov 30, 2009 at 2:02 PM, Alex Deucher
On Tue, 2009-12-01 at 10:01 +0100, Rafał Miłecki wrote:
W dniu 1 grudnia 2009 09:59 użytkownik Michel Dänzer
mic...@daenzer.net napisał:
Could you tell me how can I wait for vblank from kernel space, please?
I see there is drm_wait_vblank but this is not yet exported. I tried
export
.
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will get installed?
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, the AGP mode needs to be configured in xorg.conf.
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On Mon, 2009-11-23 at 10:55 -0500, Kristian Høgsberg wrote:
2009/11/23 Michel Dänzer mic...@daenzer.net:
On Fri, 2009-11-20 at 17:20 -0500, Kristian Høgsberg wrote:
2009/11/19 Eric Anholt e...@anholt.net:
On Tue, 2009-11-17 at 11:33 -0500, Kristian Høgsberg wrote:
2009/11/6 Kristian
On Mon, 2009-11-23 at 11:43 -0500, Kristian Høgsberg wrote:
2009/11/23 Michel Dänzer mic...@daenzer.net:
On Mon, 2009-11-23 at 10:55 -0500, Kristian Høgsberg wrote:
2009/11/23 Michel Dänzer mic...@daenzer.net:
On Fri, 2009-11-20 at 17:20 -0500, Kristian Høgsberg wrote:
2009/11/19 Eric
: Michel Dänzer daen...@vmware.com
Date: Wed Nov 4 08:41:25 2009 +0100
drm/radeon: Tweak TTM eviction flags to include GTT for eviction from VRAM.
Signed-off-by: Michel Dänzer daen...@vmware.com
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
:
[8.226741] [drm:r100_cp_init] *ERROR* Failed to load firmware!
If you're using an initrd it might be as simple as copying the needed
firmware file(s) there, otherwise if the radeon DRM is built into the
kernel you may have to enable CONFIG_FIRMWARE_IN_KERNEL .
--
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From: Michel Dänzer daen...@vmware.com
While investigating the cause of CRTC FIFO underruns, I noticed that when
converting the memory bandwidth calculation from the userspac X driver code,
an instance of '8.0' was apparently accidentally converted to '80'.
Signed-off-by: Michel Dänzer daen
From: Michel Dänzer daen...@vmware.com
The hook may change the number of bytes per pixel being scanned out, which
affects the CRTC memory bandwidth requirements. E.g. booting in 8bpp and then
running X in 32bpp would result in the bandwidth requirements being
underestimated for the latter
characters in one
go, if my math is right).
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, this works on my PowerBook but seems to drop x11perf -aa10text
numbers from about 370k/s to about 315k/s.
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Libre software enthusiast | Debian, X and DRI developer
On Fri, 2009-09-18 at 07:45 +0100, Dave Airlie wrote:
From: Michel Dänzer daen...@vmware.com
Someone on IRC reported problems after commit
95a8f1bf4f48b434c9f839ab5a0773f66b39d7c6 ('drm/radeon/kms: Move
radeon_clocks_init() call back after getting VRAM info.'). And indeed, at
least
, RADEON_GEM_DOMAIN_VRAM, base)) {
return -EINVAL;
Even if depth 8 doesn't work properly yet, it would be nice not to
further proliferate these switch statements on crtc-fb-bits_per_pixel
without a case 8.
That said, it does work for me.
--
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From: Michel Dänzer daen...@vmware.com
Someone on IRC reported problems after commit
95a8f1bf4f48b434c9f839ab5a0773f66b39d7c6 ('drm/radeon/kms: Move
radeon_clocks_init() call back after getting VRAM info.'). And indeed, at least
some ASIC vram_info hooks use the clock info obtained
On Wed, 2009-09-16 at 08:10 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 2ba61e1..341c21a 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm
On Wed, 2009-09-16 at 08:20 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
On Wed, 2009-09-16 at 08:03 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
Now that we can handle 16 bpp on big endian
On Wed, 2009-09-16 at 17:16 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
On Wed, 2009-09-16 at 08:20 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
On Wed, 2009-09-16 at 08:03 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic
On Wed, 2009-09-16 at 17:13 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
On Wed, 2009-09-16 at 08:10 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
diff --git a/include/drm/radeon_drm.h b/include
From: Michel Dänzer daen...@vmware.com
Fixes RMX problems on older Apple laptops which don't have an x86 BIOS ROM.
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_combios.c| 12 ++---
drivers/gpu/drm/radeon/radeon_connectors.c | 34
From: Michel Dänzer daen...@vmware.com
Now that we can handle 16 bpp on big endian as well, we can save VRAM like this
and probably also improve console output speed. The console only uses a limited
number of colours anyway. (8 bpp might be even better, but that doesn't seem to
work properly yet
From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_cs.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c
b/drivers/gpu/drm/radeon/radeon_cs.c
index 0b8d184..12f5990
From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/r100.c |5 ++
drivers/gpu/drm/radeon/radeon_fb.c | 121 +---
drivers/gpu/drm/radeon/radeon_object.c |2 +
include/drm/radeon_drm.h
From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/drm_crtc_helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index ff447f1..eaed0f5
From: Michel Dänzer daen...@vmware.com
It may indirectly call radeon_set_clock_gating() which relies on the VRAM info.
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_device.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers
From: Michel Dänzer daen...@vmware.com
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_connectors.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon
From: Michel Dänzer daen...@vmware.com
Fixes leak hidden in commit 9f022ddfb23793b475ff7e57ac08a766dd5d31bd
('drm/radeon/kms: convert r4xx to new init path').
Signed-off-by: Michel Dänzer daen...@vmware.com
---
drivers/gpu/drm/radeon/radeon_cs.c |1 +
1 files changed, 1 insertions(+), 0
On Wed, 2009-09-16 at 08:02 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
This one confuses me, the bit depth and stuff should
all be setup in the set base function, I wonder
is there a bug somewhere that we aren't dealing
On Wed, 2009-09-16 at 08:03 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
Now that we can handle 16 bpp on big endian as well, we can save VRAM like
this
and probably also improve console output speed. The console only
On Wed, 2009-09-16 at 08:10 +1000, Dave Airlie wrote:
2009/9/16 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer daen...@vmware.com
@@ -200,6 +201,7 @@ void radeon_object_kunmap(struct radeon_object *robj)
}
robj-kptr = NULL;
spin_unlock(robj-tobj.lock
= radeon_legacy_get_tmds_info_from_combios(encoder, tmds);
+ else
+ ret = radeon_atombios_get_tmds_info(encoder, tmds);
+
+ if (ret == false)
+ radeon_legacy_get_tmds_info_from_table(encoder, tmds);
+
+ return tmds;
+}
--
Earthling Michel Dänzer
On Wed, 2009-09-09 at 10:50 +0200, Rafał Miłecki wrote:
5) SLOW_3D /* Simple 3D activity, e.g. compiz (Q: how to select?
indirect rendering only? */
FWIW: No, compiz (and any other GLX compositing manager, for that
matter) works with direct rendering with DRI2.
--
Earthling Michel Dänzer
On Sun, 2009-09-06 at 09:46 -0700, Jesse Barnes wrote:
On Sun, 06 Sep 2009 12:23:12 +0200
Michel Dänzer mic...@daenzer.net wrote:
On Fri, 2009-09-04 at 12:17 -0700, Jesse Barnes wrote:
I've been working on coding up the server and client side of
SGI_video_sync, OML_sync_control
per frame.
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
--
Let Crystal Reports handle the reporting - Free Crystal
, the suggestion to use command streams for the overlay doesn't
make much sense to me. If that was a good idea, why aren't we doing
modesetting that way?
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
] for the mesa3d-dev list: This was complicated by the GLX code
re-indenting in master. I wonder if that was worth the trouble...
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
.
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
--
Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30
it seems
like (ab)using DRI2GetBuffers for this will only allow clients to avoid
synchronous rendering with triple buffering, which would be a shame. If
you disagree, can you explain why that isn't the case?
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software
if just
plain blocking turns out to be a real problem in practice - doubtful
IME) on command submission if those buffers still have pending flips.
--
Earthling Michel Dänzer |http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
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