On Wed, Sep 30, 2009 at 11:21:49AM -0400, Konrad Rzeszutek Wilk wrote:
With those two options defined in the boot line, the radeon kernel driver
spits out:
[ 244.190885] [drm] Loading RV730/RV740 PFP Microcode
[ 244.190911] [drm] Loading RV730/RV740 CP Microcode
[ 244.205974] [drm
On Thu, Oct 01, 2009 at 12:07:22PM -0700, Jeremy Fitzhardinge wrote:
On 10/01/09 10:35, Konrad Rzeszutek Wilk wrote:
On Wed, Sep 30, 2009 at 11:21:49AM -0400, Konrad Rzeszutek Wilk wrote:
With those two options defined in the boot line, the radeon kernel driver
spits out
On Fri, Oct 02, 2009 at 01:52:46PM +0100, Jan Beulich wrote:
Konrad Rzeszutek Wilk konrad.w...@oracle.com 01.10.09 21:21
The are other users of 'vmalloc_32' that look like they depend on this
memory being under the 4GB mark. Most of them are do video capture through
USB - so it probably
On Mon, Oct 05, 2009 at 11:32:31AM +0100, Jan Beulich wrote:
Jeremy Fitzhardinge jer...@goop.org 02.10.09 20:42
On 10/02/09 10:23, Boris Derzhavets wrote:
Jeremy,
Please, be aware of bugzilla.xensource.com [1519] the most recent
entries :-
On Mon, Oct 05, 2009 at 10:01:52AM -0400, Konrad Rzeszutek Wilk wrote:
On Mon, Oct 05, 2009 at 11:32:31AM +0100, Jan Beulich wrote:
Jeremy Fitzhardinge jer...@goop.org 02.10.09 20:42
On 10/02/09 10:23, Boris Derzhavets wrote:
Jeremy,
Please, be aware of bugzilla.xensource.com [1519
On Mon, Oct 05, 2009 at 10:41:04AM -0400, Alex Deucher wrote:
On Mon, Oct 5, 2009 at 10:01 AM, Konrad Rzeszutek Wilk
konrad.w...@oracle.com wrote:
On Mon, Oct 05, 2009 at 11:32:31AM +0100, Jan Beulich wrote:
Jeremy Fitzhardinge jer...@goop.org 02.10.09 20:42
On 10/02/09 10:23, Boris
X.org uses libpciaccess which tries to mmap with write combining enabled via
/sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, we
fall back to uncached mmap. Then libpciaccess thinks it succeeded mapping
with write combining anabled and does not set up suited MTRR
Hey DRI mailing list,
Below mentioned patch makes Nvidia and (possibly - haven't tested)
Radeon cards KMS work when using pv-ops with Xen.
I was wondering what kind of testing should be done for folks to be
comfortable with this patch? I've some NVidia and Radeon cards (PCI-e
, AGP and PCI) that
On Thu, Jan 27, 2011 at 10:28:45AM +0100, Thomas Hellstrom wrote:
Konrad, Dave
Given our previous discussion on the list, I believe these patches
shouldn't introduce any regressions in the non-Xen case, however we
should probably be prepared to back them out quickly if that turns
out to be
On Mon, Nov 04, 2013 at 05:57:38AM -0800, Thomas Hellstrom wrote:
Used by the vmwgfx driver
That looks OK to me. And baremetal should not be
affected as the Intel VT-d driver turns of the SWIOTLB
driver - so it will still use the classic ttm pool code.
Reviewed-by: Konrad Rzeszutek Wilk
On Mon, Nov 04, 2013 at 05:57:37AM -0800, Thomas Hellstrom wrote:
These patches makes the vmwgfx driver use the DMA API to obtain valid
device addresses rather than blindly using physical addresses.
The main motivation is to be able to use a virtual IOMMU in the future.
Ooooh. Neat! Are
On Mon, Nov 04, 2013 at 05:57:39AM -0800, Thomas Hellstrom wrote:
The code handles three different cases:
1) physical page addresses. The ttm page array is used.
2) DMA subsystem addresses. A scatter-gather list is used.
3) Coherent pages. The ttm dma pool is used, together with the dma_ttm
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