| BUS_FIFO_ERR_INT_EN)) |
(BUS_HOST_ERR_INT | BUS_FIFO_ERR_INT));
else
outr(BUS_CNTL, (bus_cntl ~BUS_HOST_ERR_INT_EN) | BUS_HOST_ERR_INT);
Does anyone know what's going on here?
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posted by Manuel -- based on 4.1.0 drm), so I thought I'd post it
here first. The problem seems to be happening in mach64_vm_shm_close
which comes from the DRM(vm_shm_close) template in drm_vm.h. Has anyone
had problems with 2.4.10 and drm modules from X4.1.0?
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to be a complete, general-purpose, cross-platform engine. I've
looked at the demos and it looks very interesting. The success of a
project like this would be a big boon to gaming on Linux and other
alternative OSes. I'm sure they'd appreciate the help. ;)
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Just a warning, with the direct register writes enabled in
mach64_dma_dispatch_clear (in mach64_state.c), switching to a virtual
terminal and back to X causes my box to hang hard -- I can't ssh in and
Alt-SysRq doesn't work.
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? exports
? mach64-patch
? config/cf/.cvsignore
Index: config/cf/host.def
===
RCS file: /cvsroot/dri/xc/xc/config/cf/host.def,v
retrieving revision 1.29
diff -u -r1.29 host.def
--- config/cf/host.def 2001/08
it.
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Manuel, the hang when switching back from a vt to X with Quake running
hangs both in fullscreen and windowed mode (other GL apps like gears don't
exhibit this problem, although there is initially some garbage at the top
of the screen when returning to X). I'm sure you're right that it has to
do
not to merge them to the trunk when
the time comes.
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. I really should use a journalling
filesystem, all this fsck-ing is getting a bit tedious. ;)
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On Sat, 27 Oct 2001, Manuel Teira wrote:
El Sáb 27 Oct 2001 19:49, Leif Delgass escribió:
Well, I just got my box to hang hard (like with the vt switching) when
running tuxracer and switching modes with Ctrl-Alt-+ (I have 3 modes
defined in my config and the hang happened when looping
On Sat, 27 Oct 2001, Manuel Teira wrote:
El Sáb 27 Oct 2001 21:40, Leif Delgass escribió:
On Sat, 27 Oct 2001, Manuel Teira wrote:
El Sáb 27 Oct 2001 19:49, Leif Delgass escribió:
Well, I just got my box to hang hard (like with the vt switching) when
running tuxracer and switching
are defined, and I'm not sure how contention is
handled either. So I'm going to try and get a better idea of how the
locking is actually implemented, and hopefully I know what I'm talking
about next time.
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in the emacs speedbar, so it may be
that the speedbar code is using a regex that's looking for the function
names and args on the same line. I'll have to learn a little more lisp, I
think. ;)
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On Sun, 28 Oct 2001, Manuel Teira wrote:
El Dom 28 Oct 2001 19:17, Leif Delgass escribió:
snip
OK. I did test it out doing it in the way I suggested, but I'm still
getting a lockup. I was thinking of compiling with the debugging macros
turned on to get a better idea of where
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unless there has been a merge from the trunk that includes core X changes.
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in creating their registration form. They seem to be one of
the more friendly companies when it comes to helping open source
developers. Good luck!
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:00.0 4.w
0087
Which is 1111, bit 2 (Bus Master Enable) is set.
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On Mon, 3 Dec 2001, Otto E Solares wrote:
On Mon, Dec 03, 2001 at 03:09:13PM -0500, Leif Delgass wrote:
I get the garbled pointer in UT too. Also, the only way I can get
wall/ceiling/floor textures to show up is by disabling lighting altogether
(with NoLighting=True under
this by creating /usr/X11R6-DRI/lib
and /usr/X11R6-DRI/include and using lndir to populate these directories
with links.
btw, is someone planning on updating the compilation guide to reflect this
change?
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lately and also thought that it would be
better for me to keep my strength for the new DMA code.
Go on, Frank! ;-)
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2001, Leif Delgass wrote:
I've adapted the experimental tvout code for Radeon/r128 in gatos cvs to
Mach64 and I'm atttaching the patch (can be applied to atimode.c in ati.2
or the mach64 DRI branch). It works for me, but it has the same problem
of garbling the text console and mode
.
If an extension is exported, but doesn't work to spec, it's a bug. The
ability to have the driver hide supported gl extensions could be useful
too, but the app could always just refuse to work without them. :)
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to be discarded. Is this situation produced in
the client side?
Best regards.
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to directly apply this patch or not
but I decided to go through the proper channels since this is the first
time I'm doing this.
More information about this patch can be found in the mach64 hw cursor
bug in DRI thread.
Regards,
José Fonseca
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an
updated compilation guide and status for mach64. :)
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this patch doesn't fix: in
tuxracer, tux sort of flickers in and out (mostly out). This also happens
with the lightcycles in gltron when alpha blending is turned on. I
haven't figured out what's causing it yet.
P.S. to José: Thanks for applying the points/lines patch.
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from an xterm without a problem. Does X crash
if you run glxgears from an xterm? btw, your Xlog seems to end at the
message about virtual resolutions being limited due to ... Is that really
the end? (maybe I'm having problems with the charset).
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is displayed correctly there but when you go back
to the game you can still see the menu screen in the background. It is
not deleted. You can see big white lights in front of it and you can
see the menu screen through the lights.
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to use software for _all_ environment modes.
What are people's ideas on this, and how do other drivers address these
issues? It seems that a consensus or standard for DRI drivers would be
helpful (utah-glx had glx.conf). Maybe we could discuss this in
tomorrow's irc meeting.
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http
On Mon, 25 Feb 2002, José Fonseca wrote:
On 2002.02.25 00:58 Leif Delgass wrote:
In investigating texture environment modes on the mach64, I've discovered
that the card can't modulate fragment and texture alpha values (this is
confirmed by the docs, experimentation, and comments
function specified in ALPHA_TEST_CNTL).
Sorry, a correction here: the blend function is set in SCALE_3D_CNTL
(ALPHA_BLND_SRC/DST), the alpha _test_ function is in ALPHA_TEST_CNTL.
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can give a better advice than a CVS
user list since you know the code in question.
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is the tris/vb stuff, which looks very
different now
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m64-20022028.diff.gz
Description: mach64 Mesa driver diff
On Thu, 28 Feb 2002, José Fonseca wrote:
On 2002.02.28 10:56 Leif Delgass wrote:
Jose,
I've been hacking on the tex/texmem/texstate stuff. I just did an update
and it looks like you've done much of the same thing, so I'm sending a
diff for you to compare to your changes. I'm going
dc 0 16 0 r y . 5 6 5 0 0 16 0 0 0 0 0 0 0 None
0x28 16 dc 0 16 0 r y . 5 6 5 0 0 16 8 0 0 0 0 0 0 Slow
0x29 16 dc 0 16 0 r y . 5 6 5 0 0 16 0 16 16 16 0 0 0 Slow
0x2a 16 dc 0 16 0 r y . 5 6 5 0 0 16 8 16 16 16 0 0 0 Slow
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in the template code and
the register programming in _tris.c and make sure we're giving the
hardware the right data in the right format.
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it gets to swap buffers.
Any ideas?
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On Mon, 4 Mar 2002, José Fonseca wrote:
On 2002.03.04 19:13 Leif Delgass wrote:
On Mon, 4 Mar 2002, José Fonseca wrote:
But why does the number of levels has to do with the maximum texture
size?
As I understand it, a mipmapped texture is composed of several levels
the Mesa texture image structure. I fixed the one
reference to the context var in texmem to use the Mesa value.
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though it's included.
This is probably just the result of work being started on DMA but never
finished.
[snip]
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|DEBUG_IOCTLS)
The performance penalty for keeping the printfs compiled in seems insigificant
so far...
Keith
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*= rhw;
+#endif
}
}
-#ifdef MACH64_PREMULT_TEXCOORDS
- v-v.u0 *= v-v.w;
- v-v.v0 *= v-v.w;
-#endif
}
if (DO_TEX1) {
if (DO_PTEX) {
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support mipmapping either, you just get a yellow triangle.
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issue that I've
noticed (with the old driver too) is that texture fallbacks with
single-buffering have problems where old textures show through.
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-- Forwarded message --
Date: Thu, 7 Mar 2002 22:40:14 -0500 (EST)
From: Leif Delgass [EMAIL
are sequential registers, and it
could pump up our gears numbers a bit. ;) I'll see if I can get it to
work with MMIO and if so, we could try those vertex formats with DMA as
well.
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to GL_EXT_texture_env_dot3.
With fallback for env_combine, we get this as a fallback as well, right?
GL_ARB_transpose_matrix
Done.
Included in Mesa 4.x, just export the extension, right?
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fails
(it's the only one that fails). We haven't merged any recent Mesa changes
from the trunk yet, so I don't know if there's a fix already. I'm
attaching the output from glean.
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texCombine: FAIL r5g6b5, db, z16, win+pmap, id 35
expected 1, 1
with alpha
blending enabled.
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(the mountains), but the rest is just a mangle of pixels, which
sort-of look like Tux...
Tristan
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-20020325-0822-i386-Linux.tar.bz2
I have reverted to
mach64-20020322-1223-i386-Linux.tar.bz2
Tristan
Il lun, 2002-03-25 alle 16:42, Leif Delgass ha scritto:
That sounds like what we were seeing before Jose's fix for depth scaling.
Which snapshot are you using?
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if it's in your version.
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On Tue, 26 Mar 2002, Leif Delgass wrote:
On Tue, 26 Mar 2002, Felix Kühling wrote:
Hi,
GL ScreenSavers: perfect
Not quite! The pipe demo shows only one segment of the pipe at a time.
I never see the whole pipe. I'm using xscreensaver 3.34-1.1 (Debian
woody).
I see problems
On Tue, 26 Mar 2002, Leif Delgass wrote:
On Tue, 26 Mar 2002, Leif Delgass wrote:
On Tue, 26 Mar 2002, Felix Kühling wrote:
Hi,
GL ScreenSavers: perfect
Not quite! The pipe demo shows only one segment of the pipe at a time.
I never see the whole pipe. I'm using
MaxTextureLevels = 9 (256x256)
This should apply to Rage128 and Radeon as well. Am I missing something
here?
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On Wed, 27 Mar 2002, Daryll Strauss wrote:
On Wed, Mar 27, 2002 at 04:00:55PM -0500, Leif Delgass wrote:
On Wed, 27 Mar 2002, Alexander Stohr wrote:
So we'd use
mach64Screen-cpp for the calculation instead of a fixed 4
bytes/texel?
Then the comparison would
down to 512x512 max texture
size to speedup quake, for example, but the default will allow the max
texture size supported by the card to be used with a single texture unit.
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being disabled.
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blending is enabled, but no one has implemented it yet.
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was regarding this?
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On 10 Apr 2002, Michel Dänzer wrote:
On Wed, 2002-04-10 at 01:01, Leif Delgass wrote:
The mach64 can only use a 16-bit depth buffer, even with a 32bpp framebuffer,
so I'm also interested in this. I couldn't see a way to request a
smaller buffer from the XFree framebuffer manager
or framebuffer images showing
through in the textures using software fallback. I was thinking that
perhaps Mesa was reading from the wrong place in the framebuffer to do
alpha blending for the fallbacks.
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help you can provide would be greatly
appreciated.
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merge to the DRI trunk. I have a mini build
HOWTO for the branch to supplement the compilation guide on the DRI site
here:
http://retinalburn.net/linux/dri_HOWTO.html
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On Fri, 19 Apr 2002, José Fonseca wrote:
On 2002.04.19 04:37 Leif Delgass wrote:
On Thu, 18 Apr 2002, José Fonseca wrote:
[snip]
I didn't take over the DMA part, but that will eventually happen. For
now
I'm moving all register programming from GL driver to the DRM
to the renderer string, but the infrastructure needed for the DDX and
Mesa driver are there now.
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* macros yet, though.
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On Sat, 20 Apr 2002, José Fonseca wrote:
On 2002.04.20 21:21 Leif Delgass wrote:
Jose,
I added the remaining bits to copy the agp texture region info to the
drm.
It's not used, but the information is there in case we need it later.
I hope you don't mind, but I took the liberty
caused
by a fifo overflow. I don't expect this to be as fast as doing the
register writes client side, so I'm not too worried about the performance
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On Sun, 21 Apr 2002, José Fonseca wrote:
On 2002.04.21 19:40 Leif Delgass wrote:
On Sun, 21 Apr 2002, José Fonseca wrote:
We just need to add the fifo check now.
I've just add it but it makes gears drop from 222 to 185 fps in my
system.
I don't know if this is caused
I have in hand, but as Gareth has said before, get it working-
I'm just waay to busy to have completed what I had in mind up until recently.
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and back
buffers, but the current branch allocates enough for a 32bpp depth buffer.
I have code to fix that, but I need to clean it up before checking it in.
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with PCI I use:
u32 *p = (u32 *) buf-address
Jose, you almost had it before, it's just a matter of using the right
types and cast. I'll try and send you a patch soon when I get things
cleaned up a bit.
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the #define of MACH64_USE_DMA to 1 in mach64_drv.h
in the DRM. If you're updating your source from cvs, you should probably
do a fresh 'make World' as some headers have changed here and there.
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before DMA will
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On Sun, 28 Apr 2002, Leif Delgass wrote:
If it works, you should see the same 7 VERTEX_ register values in the
system log before and after the test.
Sorry, I meant to say that you should see all zeros for the registers
before the transfer and 0x, 0x, etc. after the transfer
On Sun, 28 Apr 2002, Peter Andersson wrote:
Leif Delgass wrote:
On Sun, 28 Apr 2002, Peter Andersson wrote:
Well, it looks like the _dispatch_clear completes without a
problem. Could you run ksymoops on the syslog? That will decode the back
trace from the oops (it's best to run
On Sun, 28 Apr 2002, Leif Delgass wrote:
On Sun, 28 Apr 2002, Peter Andersson wrote:
Leif Delgass wrote:
On Sun, 28 Apr 2002, Peter Andersson wrote:
Well, it looks like the _dispatch_clear completes without a
problem. Could you run ksymoops on the syslog? That will decode
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with a black background? If you saw
them being drawn, did you see them moving before the lockup? When the
lockup happened, did the screen blank or did it just freeze?
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a lockup. Setting a
breakpoint at the SwapBuffers would let you get a frame of output at a
time, but you'd need to compile gears from the Mesa source with debugging
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On Sun, 28 Apr 2002, Leif Delgass wrote:
On Mon, 29 Apr 2002, José Fonseca wrote:
On 2002.04.29 00:33 Peter Andersson wrote:
hmmm.. OK, here are some questions for you: Did you actually see the
gears being drawn, or just the window with a black background?
I saw the gears
#if MACH64_USE_DMA
...
#endif /* MACH64_USE_DMA */
#endif
to disable all that section.
Well, Peter, although the bissection algorithm can take some interations,
if the initial conditions are met, it's guaranteed that it converges! ;-)
José Fonseca
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if the jerkiness goes away.
Also, could you try this:
set MACH64_USE_DMA back to zero in mach64_drv.h, then change line 539 of
mach64_state.c from:
if ( mach64_do_wait_for_fifo( dev_priv, 16 ) 0 )
to:
if ( mach64_do_wait_for_idle( dev_priv ) 0 )
...and see if you still get a lockup.
--
Leif
On Tue, 30 Apr 2002, Kaz Sasayama wrote:
Thank you for the explanation. I see the point now.
Leif Delgass wrote:
On Fri, 26 Apr 2002, Kaz Sasayama wrote:
I'm now trying mach64-0-0-4-branch with Rage Mobility-M PCI (LR). The
compiled X server does not work in a setting more than
to get
results ASAP), but I can put the DMA by default so that the interested
ones can try. In the worst case, they can always use the
mach64-0-0-3-branch.
I'll work on this, it should be fairly simple to do.
--
Leif Delgass
http://www.retinalburn.net
-endian, whereas the register
address has to be swapped from little-endian back to big-endian for the
MMSELECT(reg). So wouldn't you have to swap the value back to big-endian
as well in order to use this modified MACH64_WRITE macro?
--
Leif Delgass
http://www.retinalburn.net
for download mirrors. We supply
the hardware. You get the recognition. Email Us:
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Dri-devel mailing list
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--
Leif Delgass
http://www.retinalburn.net
On 1 May 2002, Michel Dänzer wrote:
On Tue, 2002-04-30 at 23:53, Leif Delgass wrote:
On Tue, 30 Apr 2002, José Fonseca wrote:
On 2002.04.30 22:07 José Fonseca wrote:
... Next in mach64_drv.h, let's try the following definitions for the
MMIO:
#define MACH64_READ(reg
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