[Bug target/81036] New: -fcall-saved-X does not work for floating-point registers

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org Target Milestone: --- Target: arm*-*-* Hi, When compiling the below testcase with "-S -march=armv7-a -fcall-saved-s14 -mfpu=vfpv4 -mfloat-abi

[Bug middle-end/77709] specified destination size warning does not work when cross-compiling from 64 host to 32bit target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77709 Thomas Preud'homme changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug testsuite/80643] NA->FAIL: gcc.dg/pr79214.c gcc.dg/pr79222.c gcc.dg/pr79223.c gcc.dg/tree-ssa/builtins-folding-gimple-ub.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80643 Thomas Preud'homme changed: What|Removed |Added Status|RESOLVED|UNCONFIRMED

[Bug middle-end/77709] specified destination size warning does not work when cross-compiling from 64 host to 32bit target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77709 --- Comment #2 from Thomas Preud'homme --- Ping?

[Bug testsuite/80643] New: NA->FAIL: gcc.dg/pr79214.c gcc.dg/pr79222.c gcc.dg/pr79223.c gcc.dg/tree-ssa/builtins-folding-gimple-ub.c

8.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: msebor at gcc dot gnu.org Target Milestone: --- Target:

[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607 --- Comment #14 from Thomas Preud'homme --- Author: thopre01 Date: Fri May 5 15:41:28 2017 New Revision: 247640 URL: https://gcc.gnu.org/viewcvs?rev=247640=gcc=rev Log: [ARM] PR71607: Fix ICE when loading constant 2017-05-05 Andre Vieira

[Bug rtl-optimization/80352] Improper reload of operands with equiv pseudo

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80352 --- Comment #5 from Thomas Preud'homme --- FWIW, I've configured GCC with --target=arm-none-eabi --with-cpu=cortex-m7 --with-mode=thumb and then ran make all-gcc. I think it would work equally well without the cpu and mode given that these are

[Bug rtl-optimization/80352] Improper reload of operands with equiv pseudo

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80352 --- Comment #4 from Thomas Preud'homme --- (In reply to Vladimir Makarov from comment #1) > Thomas, it seems from your description the problem really exists. I tried > to reproduce the problem with the test you provided but I've failed. I used

[Bug target/80082] [5/6 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082 --- Comment #11 from Thomas Preud'homme --- Author: thopre01 Date: Tue Apr 11 15:26:20 2017 New Revision: 246844 URL: https://gcc.gnu.org/viewcvs?rev=246844=gcc=rev Log: Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R 2017-04-11

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #28 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #27) > On Fri, 7 Apr 2017, thopre01 at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 > > > > ---

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #26 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #25) > On Fri, 7 Apr 2017, thopre01 at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 > > > > ---

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #24 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #23) > On Fri, 7 Apr 2017, thopre01 at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 > > > > ---

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #22 from Thomas Preud'homme --- (In reply to Thomas Preud'homme from comment #21) > > I can see this behavior for Cortex-M0+ indeed but the results are different > for Cortex-M7 for me: > > > % arm-none-linux-gnueabi-gcc -S

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

homme from comment #17) > > > > (In reply to rguent...@suse.de from comment #16) > > > > > On Thu, 23 Mar 2017, thopre01 at gcc dot gnu.org wrote: > > > > > > > > > > > > Funnily this led back to the Cortex-M0+ reduced testcase

[Bug rtl-optimization/80352] New: Improper reload of operands with equiv pseudo

Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: vmakarov at gcc dot gnu.org Target Milestone: --- Hi, r235184 introduced the ability to reload expressions with equiv but reload happens

[Bug target/80082] [5/6 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082 --- Comment #10 from Thomas Preud'homme --- Author: thopre01 Date: Thu Apr 6 16:26:39 2017 New Revision: 246734 URL: https://gcc.gnu.org/viewcvs?rev=246734=gcc=rev Log: 2017-04-06 Thomas Preud'homme gcc/

[Bug target/80082] [5/6 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082 --- Comment #9 from Thomas Preud'homme --- Author: thopre01 Date: Thu Apr 6 14:53:22 2017 New Revision: 246733 URL: https://gcc.gnu.org/viewcvs?rev=246733=gcc=rev Log: [ARM] Compile atomic_loaddi_11 for Cortex-R5 2017-04-06 Thomas

[Bug target/80307] [7 regression] MUL generated for small multiplier cores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80307 Thomas Preud'homme changed: What|Removed |Added Status|ASSIGNED|RESOLVED Known to work|

[Bug target/80307] [7 regression] MUL generated for small multiplier cores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80307 --- Comment #2 from Thomas Preud'homme --- Author: thopre01 Date: Tue Apr 4 16:24:18 2017 New Revision: 246682 URL: https://gcc.gnu.org/viewcvs?rev=246682=gcc=rev Log: [ARM] Fix small multiply feature 2017-04-03 Thomas Preud'homme

[Bug target/80307] [7 regression] MUL generated for small multiplier cores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80307 Thomas Preud'homme changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/80307] New: [7 regression] MUL generated for small multiplier cores

Severity: normal Priority: P3 Component: target Assignee: thopre01 at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Hi, The following test have regressed between GCC 6 and GCC7

[Bug target/80239] [7 regression] 9% regression on dhrystone when targetting Cortex-M7

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239 Thomas Preud'homme changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/80239] [7 regression] 9% regression on dhrystone when targetting Cortex-M7

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239 --- Comment #5 from Thomas Preud'homme --- (In reply to Thomas Preud'homme from comment #1) > > I believe the problem is that the equivalence stays with NO_REGS as register > class instead of being given that of a register (since it's going to

[Bug target/80239] [7 regression] 9% regression on dhrystone when targetting Cortex-M7

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239 --- Comment #3 from Thomas Preud'homme --- (In reply to Richard Earnshaw from comment #2) > is the diff you show backwards? Otherwise the new code looks distinctly > better. Yes it is, sorry. Diff good bad is: - add r5, sp, #16 +

[Bug target/80239] [7 regression] 9% regression on dhrystone when targetting Cortex-M7

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239 Thomas Preud'homme changed: What|Removed |Added Keywords||ra

[Bug rtl-optimization/80239] [7 regression] 9% regression on dhrystone when targetting Cortex-M7

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239 Thomas Preud'homme changed: What|Removed |Added Keywords|ra | Component|target

[Bug rtl-optimization/80239] New: [7 regression] 9% regression on dhrystone when targetting Cortex-M7

-optimization Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Hi, Performance for dhrystone has regressed

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #19 from Thomas Preud'homme --- (In reply to Richard Biener from comment #18) > (In reply to Thomas Preud'homme from comment #17) > > (In reply to rguent...@suse.de from comment #16) > > > On Thu, 23 Mar 2017, t

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #17 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #16) > On Thu, 23 Mar 2017, thopre01 at gcc dot gnu.org wrote: > > > > Funnily this led back to the Cortex-M0+ reduced testcase.

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #15 from Thomas Preud'homme --- (In reply to Thomas Preud'homme from comment #14) > (In reply to rguent...@suse.de from comment #13) > > On Thu, 23 Mar 2017, thopre01 at gcc dot gnu.org wrote: > > > > > http

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #14 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #13) > On Thu, 23 Mar 2017, thopre01 at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 > > > > ---

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #12 from Thomas Preud'homme --- (In reply to Richard Biener from comment #9) > Ah, the patches do not fix the testcase because the testcase is _not_ the > PRE-creates-IV case. It's indeed simply hoisting/PRE at work transforming >

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #8 from Thomas Preud'homme --- (In reply to rguent...@suse.de from comment #6 and #7) > > The testcase shows hardly profitable PRE which the patches should > disable (I didn't verify the patches fix the testcase!) The patch does

[Bug tree-optimization/80155] [7 regression] Performance regression with code hoisting enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155 --- Comment #5 from Thomas Preud'homme --- (In reply to Richard Biener from comment #4) > Can you benchmark the 2nd candidate (most appropriate at this stage I think, > would also fix 77498). > > It will cause pessimizations for code that

[Bug testsuite/79126] [7 regression] FAIL: gcc.dg/tree-ssa/pr77445-2.c scan-tree-dump thread1 "Jumps threaded: 16"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79126 Thomas Preud'homme changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug tree-optimization/77498] [7 regression] Performance drop after r239414 on spec2000/172mgrid

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77498 Thomas Preud'homme changed: What|Removed |Added CC|thopre01 at gcc dot gnu.org| --- Comment #13 from

[Bug tree-optimization/80155] New: [7 regression] Performance regression with code hoisting enabled

-optimization Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: avieira at gcc dot gnu.org, rguenth at gcc dot gnu.org Target Milestone

[Bug tree-optimization/77498] [7 regression] Performance drop after r239414 on spec2000/172mgrid

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77498 --- Comment #11 from Thomas Preud'homme --- (In reply to Thomas Preud'homme from comment #9) > Sadly I could not come up with a minimal testcase so far. What I can see > from the code is that tree code hoisting increases the live range of some >

[Bug target/80082] [5/6/7 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082 Thomas Preud'homme changed: What|Removed |Added CC||thopre01 at gcc dot gnu.org

[Bug target/80082] [5/6/7 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082 --- Comment #7 from Thomas Preud'homme --- Author: thopre01 Date: Wed Mar 22 11:35:15 2017 New Revision: 246365 URL: https://gcc.gnu.org/viewcvs?rev=246365=gcc=rev Log: Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R 2017-03-22

[Bug tree-optimization/77498] [7 regression] Performance drop after r239414 on spec2000/172mgrid

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77498 --- Comment #9 from Thomas Preud'homme --- Sadly I could not come up with a minimal testcase so far. What I can see from the code is that tree code hoisting increases the live range of some values which then translates into more spilling in

[Bug tree-optimization/77498] [7 regression] Performance drop after r239414 on spec2000/172mgrid

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77498 Thomas Preud'homme changed: What|Removed |Added CC||thopre01 at gcc dot gnu.org

[Bug lto/69866] lto1: internal compiler error: in add_symbol_to_partition_1, at lto/lto-partition.c:158

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69866 --- Comment #10 from Thomas Preud'homme --- Patch has been submitted for review: https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00110.html

[Bug lto/69866] lto1: internal compiler error: in add_symbol_to_partition_1, at lto/lto-partition.c:158

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69866 Thomas Preud'homme changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug lto/69866] lto1: internal compiler error: in add_symbol_to_partition_1, at lto/lto-partition.c:158

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69866 Thomas Preud'homme changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org

[Bug testsuite/79273] FAIL: c-c++-common/Wduplicated-branches-13.c -std=gnu++98 (test for excess errors)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79273 --- Comment #4 from Thomas Preud'homme --- (In reply to Martin Sebor from comment #2) > I can't reproduce these failures with an hppa2.0w-hp-hpux11.11 > cross-compiler and I don't see them in the most recent test results for the > target

[Bug testsuite/79273] FAIL: c-c++-common/Wduplicated-branches-13.c -std=gnu++98 (test for excess errors)

||thopre01 at gcc dot gnu.org --- Comment #1 from Thomas Preud'homme --- Also fail for arm-none-eabi targets.

[Bug testsuite/79126] FAIL: gcc.dg/tree-ssa/pr77445-2.c scan-tree-dump thread1 "Jumps threaded: 16"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79126 --- Comment #3 from Thomas Preud'homme --- (In reply to Christophe Lyon from comment #2) > I don't think that's correct: I've noticed a new error message between > r244739 and r244756, and you committed this in-between (r244746). > > The error

[Bug testsuite/79126] New: FAIL: gcc.dg/tree-ssa/pr77445-2.c scan-tree-dump thread1 "Jumps threaded: 16"

Severity: normal Priority: P3 Component: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: hubicka at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Created attachment 40533

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 Thomas Preud'homme changed: What|Removed |Added Known to work||5.4.1, 6.3.1 Known to

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 Thomas Preud'homme changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 --- Comment #6 from Thomas Preud'homme --- Author: thopre01 Date: Tue Jan 17 10:11:20 2017 New Revision: 244526 URL: https://gcc.gnu.org/viewcvs?rev=244526=gcc=rev Log: 2017-01-17 Thomas Preud'homme Backport

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 --- Comment #5 from Thomas Preud'homme --- Author: thopre01 Date: Tue Jan 17 10:09:47 2017 New Revision: 244525 URL: https://gcc.gnu.org/viewcvs?rev=244525=gcc=rev Log: 2017-01-17 Thomas Preud'homme Backport

[Bug c/78768] -Walloca-larger-than and -Wformat-length warnings disabled by -flto

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78768 Thomas Preud'homme changed: What|Removed |Added CC||thopre01 at gcc dot gnu.org

[Bug c++/79085] New: ICE with placement new to unaligned location

Priority: P3 Component: c++ Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: jason at gcc dot gnu.org Target Milestone: --- Created attachment 40517 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40517=e

[Bug tree-optimization/78319] [7 Regression] PASS->FAIL: gcc.dg/uninit-pred-8_a.c bogus warning (test for bogus messages, line 20)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78319 --- Comment #16 from Thomas Preud'homme --- FYI: -mtune=cortex-a15 works for an arm-none-eabi toolchain targetting Cortex-M7

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 Thomas Preud'homme changed: What|Removed |Added Status|ASSIGNED|RESOLVED Known to work|

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 --- Comment #10 from Thomas Preud'homme --- Author: thopre01 Date: Wed Dec 14 10:07:01 2016 New Revision: 243637 URL: https://gcc.gnu.org/viewcvs?rev=243637=gcc=rev Log: Fix PR77673: bswap loads passed end of object 2016-12-14 Thomas

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 --- Comment #9 from Thomas Preud'homme --- Author: thopre01 Date: Wed Dec 14 09:58:23 2016 New Revision: 243635 URL: https://gcc.gnu.org/viewcvs?rev=243635=gcc=rev Log: Fix PR77673: bswap loads passed end of object 2016-12-14 Thomas

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 Thomas Preud'homme changed: What|Removed |Added Status|ASSIGNED|RESOLVED Known to work|

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 --- Comment #8 from Thomas Preud'homme --- Author: thopre01 Date: Tue Dec 13 09:39:02 2016 New Revision: 243600 URL: https://gcc.gnu.org/viewcvs?rev=243600=gcc=rev Log: Fix PR77933: stack corruption on ARM when using high registers and LR

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 Thomas Preud'homme changed: What|Removed |Added Status|ASSIGNED|RESOLVED Known to work|

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 --- Comment #10 from Thomas Preud'homme --- Author: thopre01 Date: Mon Dec 12 10:58:17 2016 New Revision: 243543 URL: https://gcc.gnu.org/viewcvs?rev=243543=gcc=rev Log: Fix PR77904: callee-saved register trashed when clobbering sp 2016-12-12

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 --- Comment #7 from Thomas Preud'homme --- Author: thopre01 Date: Fri Dec 9 15:26:17 2016 New Revision: 243490 URL: https://gcc.gnu.org/viewcvs?rev=243490=gcc=rev Log: 2016-12-09 Thomas Preud'homme Backport

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 --- Comment #4 from Thomas Preud'homme --- Author: thopre01 Date: Wed Dec 7 18:15:52 2016 New Revision: 243375 URL: https://gcc.gnu.org/viewcvs?rev=243375=gcc=rev Log: 2016-12-07 Thomas Preud'homme

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 --- Comment #3 from Thomas Preud'homme --- Author: thopre01 Date: Wed Dec 7 17:56:53 2016 New Revision: 243374 URL: https://gcc.gnu.org/viewcvs?rev=243374=gcc=rev Log: 2016-12-07 Thomas Preud'homme gcc/

[Bug rtl-optimization/78617] LRA clobbers live register during rematerialization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78617 --- Comment #2 from Thomas Preud'homme --- I've tracked down the problem to do_remat: The function scans instruction forward in each basic block and looks for a candidate to use for rematerialization. To check whether the candidate is used, it

[Bug rtl-optimization/78617] New: LRA clobbers live register during rematerialization

Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Created attachment 40208 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40208=e

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 --- Comment #8 from Thomas Preud'homme --- Author: thopre01 Date: Fri Nov 25 10:03:38 2016 New Revision: 242869 URL: https://gcc.gnu.org/viewcvs?rev=242869=gcc=rev Log: Fix PR77673: bswap loads passed end of object 2016-11-25 Thomas

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 --- Comment #7 from Thomas Preud'homme --- (In reply to Thomas Preud'homme from comment #6) > (In reply to Thomas Preud'homme from comment #5) > > Got a patch, testing it now. > > Bootstrapped and testsuite came back clean. Trying to turn the

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 --- Comment #8 from Thomas Preud'homme --- (In reply to Freddie Chopin from comment #7) > Could this be also backported to the gcc-6 branch? I guess there will be 6.3 > version (possibly before first 7.x version), so it would be nice to have >

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 Thomas Preud'homme changed: What|Removed |Added Priority|P3 |P1

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 Thomas Preud'homme changed: What|Removed |Added Priority|P1 |P3 --- Comment #6 from Thomas

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 --- Comment #6 from Thomas Preud'homme --- Author: thopre01 Date: Tue Nov 22 10:57:55 2016 New Revision: 242694 URL: https://gcc.gnu.org/viewcvs?rev=242694=gcc=rev Log: Fix PR77904: callee-saved register trashed when clobbering sp 2016-11-22

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 --- Comment #5 from Thomas Preud'homme --- Author: thopre01 Date: Tue Nov 22 10:44:29 2016 New Revision: 242693 URL: https://gcc.gnu.org/viewcvs?rev=242693=gcc=rev Log: 2016-11-22 Thomas Preud'homme gcc/

[Bug target/64802] [ARM] Selecting an -mcpu or -march that supports only one of ARM/Thumb should default to the ISA that *is* supported

||thopre01 at gcc dot gnu.org Known to work||7.0 Resolution|--- |FIXED Assignee|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org --- Comment #2 from Thomas Preud'homme --- Fixed

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77673 --- Comment #5 from Thomas Preud'homme --- Got a patch, testing it now.

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 --- Comment #6 from Thomas Preud'homme --- Author: thopre01 Date: Thu Nov 17 20:30:41 2016 New Revision: 242560 URL: https://gcc.gnu.org/viewcvs?rev=242560=gcc=rev Log: Fix PR77933: stack corruption on ARM when using high registers and LR

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 --- Comment #5 from Thomas Preud'homme --- Author: thopre01 Date: Thu Nov 17 20:12:13 2016 New Revision: 242559 URL: https://gcc.gnu.org/viewcvs?rev=242559=gcc=rev Log: Fix PR77933: stack corruption on ARM when using high registers and LR

[Bug tree-optimization/77673] [5/6/7 Regression] 4-byte load generated instead of 1-byte load, possibly reading past the end of object

-09-21 00:00:00 |2016-11-15 Assignee|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org --- Comment #4 from Thomas Preud'homme --- Confirmed.

[Bug c++/78269] FAIL: FAIL: g++.dg/cpp1z/noexcept-type11.C and FAIL: g++.dg/cpp1z/noexcept-type9.C

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78269 --- Comment #4 from Thomas Preud'homme --- This seems to have been fixed. I do not see this anymore.

[Bug tree-optimization/78319] [7 Regression] PASS->FAIL: gcc.dg/uninit-pred-8_a.c bogus warning (test for bogus messages, line 20)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78319 --- Comment #3 from Thomas Preud'homme --- (In reply to prathamesh3492 from comment #2) > Hi Thomas, > I am trying to cross-build for cortex-m4 to reproduce the issue locally. > Could you please share the configure opts you used ? > > Thanks, >

[Bug tree-optimization/78319] New: PASS->FAIL: gcc.dg/uninit-pred-8_a.c bogus warning (test for bogus messages, line 20)

MED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: prathamesh3492 at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Crea

[Bug testsuite/78318] New: FAIL: g++.dg/pr78112.C scan-assembler-times DW_AT_object_pointer 37

Priority: P3 Component: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: derodat at adacore dot com, jakub at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Created attachment

[Bug c++/78269] FAIL: FAIL: g++.dg/cpp1z/noexcept-type11.C and FAIL: g++.dg/cpp1z/noexcept-type9.C

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78269 --- Comment #3 from Thomas Preud'homme --- Marking the bug as NEW again because g++.dg/cpp1z/noexcept-type11.C still needs fixing

[Bug c++/78269] FAIL: FAIL: g++.dg/cpp1z/noexcept-type11.C and FAIL: g++.dg/cpp1z/noexcept-type9.C

at gcc dot gnu.org|unassigned at gcc dot gnu.org

[Bug c++/78269] FAIL: FAIL: g++.dg/cpp1z/noexcept-type11.C and FAIL: g++.dg/cpp1z/noexcept-type9.C

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78269 --- Comment #2 from Thomas Preud'homme --- Author: thopre01 Date: Wed Nov 9 10:50:21 2016 New Revision: 241997 URL: https://gcc.gnu.org/viewcvs?rev=241997=gcc=rev Log: 2016-11-09 Thomas Preud'homme

[Bug c++/78269] FAIL: FAIL: g++.dg/cpp1z/noexcept-type11.C and FAIL: g++.dg/cpp1z/noexcept-type9.C

||thopre01 at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org

[Bug testsuite/78256] [7 Regression] test case gcc.dg/pr35691-1.c fails starting with its introduction in r241915

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78256 Thomas Preud'homme changed: What|Removed |Added CC||thopre01 at gcc dot gnu.org

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 Thomas Preud'homme changed: What|Removed |Added Known to fail||5.4.1 --- Comment #3 from Thomas

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 Thomas Preud'homme changed: What|Removed |Added Keywords||wrong-code Known to fail|

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 Thomas Preud'homme changed: What|Removed |Added Known to fail||4.7.4, 4.8.5, 4.9.3 --- Comment #4

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org --- Comment #3 from Thomas Preud'homme --- Working on a patch.

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

||2016-11-01 Assignee|unassigned at gcc dot gnu.org |thopre01 at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Thomas Preud'homme --- Working on a patch.

[Bug testsuite/77710] FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-4.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77710 --- Comment #7 from Thomas Preud'homme --- (In reply to Martin Sebor from comment #6) > (In reply to Thomas Preud'homme from comment #5) > > Thanks for fixing it! I keep making this mistake because { target *-*-*-* } > matches on my own

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 Thomas Preud'homme changed: What|Removed |Added Keywords||wrong-code Known to fail|

[Bug target/77933] New: Stack corruption on ARM when using high registers and __builtin_return_address

: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi When compiling the following testcase with -march=armv6-m -mthumb -O1: void* foo

[Bug testsuite/77710] FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-4.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77710 Thomas Preud'homme changed: What|Removed |Added Known to work||7.0 --- Comment #5 from Thomas

[Bug debug/77931] PASS->FAIL: gdb.cp/namespace.exp: print ina

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77931 --- Comment #3 from Thomas Preud'homme --- Confirmed, this patch fixes the issue. Thanks!

[Bug debug/77931] New: PASS->FAIL: gdb.cp/namespace.exp: print ina

bug Assignee: unassigned at gcc dot gnu.org Reporter: thopre01 at gcc dot gnu.org CC: rguenth at gcc dot gnu.org Target Milestone: --- Target: arm-none-eabi Hi, I've tracked the following GDB tests regression on arm-none-eabi targets to r240

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