[Bug rtl-optimization/114595] New: rtl-expand emit redundant store for bitwise-and expression

[absoler at smail dot nju.edu.cn via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114595

            Bug ID: 114595
           Summary: rtl-expand emit redundant store for bitwise-and
                    expression
           Product: gcc
           Version: 13.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: absoler at smail dot nju.edu.cn
  Target Milestone: ---

Hi, here's a weird case:
```
int g1, g3;
char g2;
void func_1() {
    g3 = (g2 = (1 && 1 & g1)) ;
}

```
one store to `g2` is splted into two since gcc-5 under -O2:
```
func_1():
  401130:       mov    0x2efe(%rip),%eax        # 404034 <g1>
  401136:       mov    %al,0x2ef0(%rip)        # 40402c <g2>
  40113c:       and    $0x1,%eax
  40113f:       andb   $0x1,0x2ee6(%rip)        # 40402c <g2>
  401146:       mov    %eax,0x2ee4(%rip)        # 404030 <g3>
```

RTL-expand choose to do this and no other pass could optimize it.

```
;;
;; Full RTL generated for this function:
;;
    1: NOTE_INSN_DELETED
    3: NOTE_INSN_BASIC_BLOCK 2
    2: NOTE_INSN_FUNCTION_BEG
    5: r82:SI=[`g1']
    6: [`g2']=r82:SI#0
    7: {[`g2']=[`g2']&0x1;clobber flags:CC;}
    8: {r86:SI=r82:SI&0x1;clobber flags:CC;}
    9: [`g3']=r86:SI
```