http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #7 from Oleg Endo olegendo at gcc dot gnu.org 2013-01-29 21:12:56
UTC ---
I've checked this again on rev. 19 and the problem doesn't seem to happen
anymore. It also doesn't show up in the latest SH4 test result post
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Priority|P3 |P4
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
Oleg Endo olegendo at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |ASSIGNED
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Target Milestone|--- |4.8.0
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
Oleg Endo olegendo at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #5 from Kazumoto Kojima kkojima at gcc dot gnu.org 2012-10-10
00:03:54 UTC ---
(In reply to comment #4)
I'm wondering whether there is anything after reload that actually needs
address validation. I guess that after the
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #6 from Oleg Endo olegendo at gcc dot gnu.org 2012-10-10 00:22:54
UTC ---
(In reply to comment #5)
It looks we've got reg+reg+const addressing. It seems that
reload_completed simply means that hard register are allocated
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #3 from Oleg Endo olegendo at gcc dot gnu.org 2012-09-30 21:09:29
UTC ---
Doing this...
Index: gcc/config/sh/sh.c
===
--- gcc/config/sh/sh.c(revision
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #2 from Oleg Endo olegendo at gcc dot gnu.org 2012-09-26 20:05:47
UTC ---
Hm, maybe implementing TARGET_MODE_DEPENDENT_ADDRESS_P would help this case?
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54699
--- Comment #1 from Oleg Endo olegendo at gcc dot gnu.org 2012-09-25 11:56:53
UTC ---
(In reply to comment #0)
Thanks for tracing this.
The mem store insn
(set (subreg:SF (mem/c:DI (reg/f:SI 14 r14)) 4)
(reg:SF 0 r0))
looks
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