https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #13 from Segher Boessenkool ---
Author: segher
Date: Tue Jul 12 15:13:47 2016
New Revision: 238251
URL: https://gcc.gnu.org/viewcvs?rev=238251=gcc=rev
Log:
Backport from mainline
2016-07-06 Segher Boessenkool
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #12 from Segher Boessenkool ---
Author: segher
Date: Tue Jul 12 15:10:08 2016
New Revision: 238250
URL: https://gcc.gnu.org/viewcvs?rev=238250=gcc=rev
Log:
Backport from mainline
2016-07-06 Segher Boessenkool
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
Segher Boessenkool changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #10 from Michael Meissner ---
While I prefer fixing the issue in reload, we could disable -mupper-regs-di for
32-bit systems and for power7 systems without direct move
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #9 from Segher Boessenkool ---
Author: segher
Date: Thu Jul 7 03:09:03 2016
New Revision: 238076
URL: https://gcc.gnu.org/viewcvs?rev=238076=gcc=rev
Log:
rs6000: Make the ctr* patterns allow ints in vector regs (PR71763)
Similar
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #8 from Michael Meissner ---
In the past we have tried restricting the registers of the pattern to just GPRs
and CTR, and it pops back in another fashion (whack-a-mole).
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #7 from Segher Boessenkool ---
(In reply to Michael Meissner from comment #6)
> Note if you put the requirement that you need direct move, you will
> potentially have the problem in power7.
Yes; we have that same problem for FPRs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #6 from Michael Meissner ---
Note if you put the requirement that you need direct move, you will potentially
have the problem in power7.
I'm really tired of the register allocator trying to be 'helpful' in
de-optimizing BDNZ loops
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #5 from Segher Boessenkool ---
Actually, needs -mcpu=power8 as well, otherwise we get another ICE (we need
direct moves for FP regs in the ctr patterns; this is the case that is not
yet solved in PR70098).
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #4 from Alan Modra ---
Created attachment 38833
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38833=edit
output reloads on jump insns
Revised https://gcc.gnu.org/ml/gcc-patches/2004-12/msg00739.html
It's surprising how little
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
Segher Boessenkool changed:
What|Removed |Added
Target|powerpc64le-linux |powerpc64*-linux
--- Comment #3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #2 from Segher Boessenkool ---
Well. Here it is using a vector register (v31) as the iterator reg,
which we do not handle. Should we? Where does it come from?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
Alan Modra changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
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