Re: [PATCH] [PR c++/85039] no type definitions in builtin offsetof

On Fri, Apr 13, 2018, 6:09 PM Alexandre Oliva wrote: > On Apr 11, 2018, Jason Merrill wrote: > > > I raised this issue with the C++ committee, and it seems that nobody > > expects defining a type here to work. So let's go back to your first > > patch,

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

On Fri, Apr 13, 2018, 7:53 PM Paolo Carlini wrote: > Hi again, > > On 14/04/2018 00:12, Paolo Carlini wrote: > > Hi, > > > > On 13/04/2018 19:45, Jason Merrill wrote: > >> Ah, I see. The problem is that even though convert_to_integer_1 was > >> called with dofold

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

Hi again, On 14/04/2018 00:12, Paolo Carlini wrote: Hi, On 13/04/2018 19:45, Jason Merrill wrote: Ah, I see.  The problem is that even though convert_to_integer_1 was called with dofold false, we lose that when it calls convert(). Why not recurse directly to convert_to_integer_1 with the

[PATCH] rs6000: Disable -m[no-]direct-move (PR85293)

The -mno-direct-move option causes a lot of problems, since it forces us to be able to generate code for p8 and up with some crucial instructions missing. This patch removes the -m[no-]direct-move options so that the user cannot put us into this unexpected situation anymore. Internally we still

Re: [PATCH] rs6000 PR83660 fix ICE with vec_extract

Hi! On Fri, Apr 13, 2018 at 03:37:08PM -0500, Aaron Sawdey wrote: > Per the discussion on the 83660, I've come to a minimal patch to > prevent this. Basically marking the vec_extract tree as having side > effects later makes sure that it gets all the cleanup points it needs > so that

[PATCH] [PR c++/80290] recycle tinst garbage sooner

tinst_level objects are created during template instantiation, and they're most often quite short-lived, but since there's no intervening garbage collection, they accumulate throughout the pass while most by far could be recycled after a short while. The original testcase in PR80290, for example,

Re: RFA[powerpc]: patch to fix PR79916

On 04/13/2018 05:26 PM, Segher Boessenkool wrote: Hi! On Fri, Apr 13, 2018 at 04:43:02PM -0400, Vladimir Makarov wrote: On 04/13/2018 03:58 PM, Alexander Monakov wrote: Here's another compact variant: regno = reg_renumber[regno]; if (regno < 0) regno = cl ==

Re: [PATCH] PR 83402 Fix ICE for vec_splat_s8, vec_splat_s16, vec_splat_s32 builtins

Hi! On Fri, Apr 13, 2018 at 03:27:40PM -0700, Carl Love wrote: > On Fri, 2018-04-13 at 16:54 -0500, Segher Boessenkool wrote: > > On Fri, Apr 13, 2018 at 09:49:25AM -0700, Carl Love wrote: > > > diff --git a/gcc/config/rs6000/rs6000.c > > > b/gcc/config/rs6000/rs6000.c > > > index

Re: [PATCH v2, rs6000] (PR84302) Fix _mm_slli_epi{32,64} for shift values 16 through 31 and negative

Hi! On Fri, Apr 13, 2018 at 03:21:14PM -0500, Paul Clarke wrote: > - if (__builtin_constant_p(__B)) > - lshift = (__v4su) vec_splat_s32(__B); > + if (__builtin_constant_p(__B) && __B < 16) > +lshift = (__v4su) vec_splat_s32(__B); >else > - lshift = vec_splats

Re: [PATCH] PR 83402 Fix ICE for vec_splat_s8, vec_splat_s16, vec_splat_s32 builtins

On Fri, 2018-04-13 at 16:54 -0500, Segher Boessenkool wrote: > Hi Carl, > > On Fri, Apr 13, 2018 at 09:49:25AM -0700, Carl Love wrote: > > diff --git a/gcc/config/rs6000/rs6000.c > > b/gcc/config/rs6000/rs6000.c > > index a0c9b5c..855be43 100644 > > --- a/gcc/config/rs6000/rs6000.c > > +++

Re: [PATCH, rs6000] Fix tests that are failing in gcc.target/powerpc/bfp with -m32

Hi! On Fri, Apr 13, 2018 at 03:15:09PM -0500, Kelvin Nilsen wrote: > Twelve failures have been occuring in the bfp test directory during -m32 > regression testing. > This patch: > > 1. Changes the expected error messages in certain test programs. > > 2. Disables certain test programs from

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

Hi, On 13/04/2018 19:45, Jason Merrill wrote: Ah, I see. The problem is that even though convert_to_integer_1 was called with dofold false, we lose that when it calls convert(). Why not recurse directly to convert_to_integer_1 with the underlying type? That would avoid the undesired

Re: [PATCH] [PR c++/85039] no type definitions in builtin offsetof

On Apr 11, 2018, Jason Merrill wrote: > I raised this issue with the C++ committee, and it seems that nobody > expects defining a type here to work. So let's go back to your first > patch, removing the offending part of semicolon3.C. All right, here's the adjusted patch.

Re: [PATCH] PR 83402 Fix ICE for vec_splat_s8, vec_splat_s16, vec_splat_s32 builtins

Hi Carl, On Fri, Apr 13, 2018 at 09:49:25AM -0700, Carl Love wrote: > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index a0c9b5c..855be43 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -16576,8 +16576,9 @@ rs6000_gimple_fold_builtin

Re: RFA[powerpc]: patch to fix PR79916

Hi! On Fri, Apr 13, 2018 at 04:43:02PM -0400, Vladimir Makarov wrote: > On 04/13/2018 03:58 PM, Alexander Monakov wrote: > >Here's another compact variant: > > > > regno = reg_renumber[regno]; > > if (regno < 0) > > regno = cl == NO_REGS ? -1 : ira_class_hard_regs[cl][1]; > >

Re: RFA[powerpc]: patch to fix PR79916

On 04/13/2018 03:58 PM, Alexander Monakov wrote: On Fri, 13 Apr 2018, Jakub Jelinek wrote: if (reg_renumber[regno] >= 0) regno = reg_renumber[regno]; else regno = cl == NO_REGS ? -1 : ira_class_hard_regs[cl][1]; or regno =

[PATCH] rs6000 PR83660 fix ICE with vec_extract

Per the discussion on the 83660, I've come to a minimal patch to prevent this. Basically marking the vec_extract tree as having side effects later makes sure that it gets all the cleanup points it needs so that gimplify_cleanup_point_expr () is happy. Also because vec_insert puts a MODIFY_EXPR in

Re: [PATCH] Fix bbpart handling of EH pads (PR rtl-optimization/85393)

On Fri, Apr 13, 2018 at 09:32:07PM +0200, Eric Botcazou wrote: > > This works nicely if the landing pad bb hasn't been really modified much, > > in particular it still needs to contain only the instructions emitted > > by expand_dw2_landing_pad_for_region function call and then an unconditional >

[PATCH v2, rs6000] (PR84302) Fix _mm_slli_epi{32,64} for shift values 16 through 31 and negative

The powerpc versions of _mm_slli_epi32 and __mm_slli_epi64 in emmintrin.h do not properly handle shift values between 16 and 31, inclusive. These are setting up the shift with vec_splat_s32, which only accepts *5 bit signed* shift values, or a range of -16 to 15. Values above 15 produce an error:

[PATCH, rs6000] Fix tests that are failing in gcc.target/powerpc/bfp with -m32

Twelve failures have been occuring in the bfp test directory during -m32 regression testing. The cause of these failures was two-fold: 1. Patches added subsequent to development of the tests caused new error messages to be emitted that are different than the error messages expected in the

Re: RFA[powerpc]: patch to fix PR79916

On Fri, 13 Apr 2018, Jakub Jelinek wrote: > if (reg_renumber[regno] >= 0) > regno = reg_renumber[regno]; > else > regno = cl == NO_REGS ? -1 : ira_class_hard_regs[cl][1]; > or > regno = (reg_renumber[regno] >= 0 > ? reg_renumber[regno] >

Re: RFA[powerpc]: patch to fix PR79916

On Fri, Apr 13, 2018 at 03:29:47PM -0400, Vladimir Makarov wrote: >   The attached patch fixes > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79916 > >   The PR is about LRA cycling on some tests when SD data are used.  The > problem was in that actual assigned reg to pseudo was not in the

Re: [PATCH, rs6000] (PR84302) Fix _mm_slli_epi{32,64} for shift values 16 through 31 and negative

On 04/13/2018 02:37 PM, Segher Boessenkool wrote: > On Thu, Apr 12, 2018 at 07:07:21PM -0500, Paul Clarke wrote: >> The powerpc versions of _mm_slli_epi32 and __mm_slli_epi64 in emmintrin.h >> do not properly handle shift values between 16 and 31, inclusive. >> These were setting up the shift with

Re: [PATCH] Fix CSE CLZ/CTZ handling (PR rtl-optimization/85376, variant)

On April 13, 2018 9:33:31 PM GMT+02:00, Eric Botcazou wrote: >> 2018-04-13 Jakub Jelinek >> >> PR rtl-optimization/85376 >> * simplify-rtx.c (simplify_const_unary_operation): For CLZ and CTZ >and >> zero op0, if

Re: [PATCH, rs6000] (PR84302) Fix _mm_slli_epi{32,64} for shift values 16 through 31 and negative

Hi! On Thu, Apr 12, 2018 at 07:07:21PM -0500, Paul Clarke wrote: > The powerpc versions of _mm_slli_epi32 and __mm_slli_epi64 in emmintrin.h > do not properly handle shift values between 16 and 31, inclusive. > These were setting up the shift with vec_splat_s32, which only accepts > *5 bit

[PATCH] Fix CSE CLZ/CTZ handling (PR rtl-optimization/85376, variant)

On Fri, Apr 13, 2018 at 12:33:02AM +0200, Jakub Jelinek wrote: > The following patch let us punt in these cases. Bootstrapped/regtested on > x86_64-linux and i686-linux, ok for trunk? > > Another option would be to tweak simplify-rtx.c and instead of doing > else if (!

Re: [PATCH] Fix CSE CLZ/CTZ handling (PR rtl-optimization/85376, variant)

> 2018-04-13 Jakub Jelinek > > PR rtl-optimization/85376 > * simplify-rtx.c (simplify_const_unary_operation): For CLZ and CTZ and > zero op0, if C?Z_DEFINED_VALUE_AT_ZERO is false, return NULL_RTX > instead of a specific value. > > *

Re: [PATCH] Fix bbpart handling of EH pads (PR rtl-optimization/85393)

> This works nicely if the landing pad bb hasn't been really modified much, > in particular it still needs to contain only the instructions emitted > by expand_dw2_landing_pad_for_region function call and then an unconditional > jump or at least single successor and nothing else in the bb. How is

RFA[powerpc]: patch to fix PR79916

  The attached patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79916   The PR is about LRA cycling on some tests when SD data are used.  The problem was in that actual assigned reg to pseudo was not in the pseudo preferred class and this resulted in wrong generated code which LRA

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

On Fri, Apr 13, 2018 at 1:18 PM, Paolo Carlini wrote: > Hi, > > > On 13/04/2018 19:14, Jason Merrill wrote: >> >> On Fri, Apr 13, 2018 at 1:05 PM, Paolo Carlini >> wrote: >>> >>> Hi, >>> >>> On 13/04/2018 16:06, Jason Merrill wrote:

[PATCH] Fix bbpart handling of EH pads (PR rtl-optimization/85393)

Hi! As mentioned in the comments, the .gcc_except_table format doesn't allow the throwing region and corresponding landing pad to be in different partitions, because it uses landing_pad_symbol - the start of the partition in which the throwing region is and we don't generally have relocations for

Re: [PATCH] Fix -fsanitize=address VLA instrumentation (PR sanitizer/85230)

On Fri, Apr 13, 2018 at 12:16:06AM +0200, Jakub Jelinek wrote: > Bootstrapped on > {x86_64,i686,powerpc64,powerpc64le,aarch64,s390x,armv7hl}-linux, regtested > on {x86_64,i686,powerpc64,powerpc64le}-linux so far, but on the power* ones > on virtual address space size that isn't really supported

Re: [PATCH] Make redirection only for target_clones: V2 (PR ipa/85329).

On Fri, Apr 13, 2018 at 04:33:40PM +0200, Martin Liška wrote: > > Ah, but we emit the resolver only if we see a use of it. That sounds quite > > broken, resolver in each TU that uses it? Better to have one at each > > definition... > > > > Jakub > > > > So after quite some time I would

[PATCH] configure.ac: honor --with-gcc-major-version in gcc-driver-name.h (PR jit/85384, variant)

On Thu, Apr 12, 2018 at 04:51:21PM -0400, David Malcolm wrote: > This patch updates gcc/configure.ac to use gcc_base_ver. > > I had to drop the \$\$ from the sed expression to get it to work > within the configure script; I'm not entirely sure what their purpose > is. Without them, it's still

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

Hi, On 13/04/2018 19:14, Jason Merrill wrote: On Fri, Apr 13, 2018 at 1:05 PM, Paolo Carlini wrote: Hi, On 13/04/2018 16:06, Jason Merrill wrote: On Fri, Apr 13, 2018 at 5:05 AM, Paolo Carlini wrote: Hi, in this error-recovery

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

On Fri, Apr 13, 2018 at 1:05 PM, Paolo Carlini wrote: > Hi, > > On 13/04/2018 16:06, Jason Merrill wrote: >> >> On Fri, Apr 13, 2018 at 5:05 AM, Paolo Carlini >> wrote: >>> >>> Hi, >>> >>> in this error-recovery regression, after a sensible

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

Hi, On 13/04/2018 16:06, Jason Merrill wrote: On Fri, Apr 13, 2018 at 5:05 AM, Paolo Carlini wrote: Hi, in this error-recovery regression, after a sensible error message issued by cxx_constant_init, store_init_value stores an error_mark_node as DECL_INITIAL of the

[PATCH] avoid -Wrestrict for null pointers (PR 85365)

PR 85365 is another example of a false positive caused by the interaction between the instrumentation inserted by sanitizers, jump threading, and a middle-end warning. In this case, the warning is easy to avoid by suppressing -Wrestrict for null pointers. Although undefined, since they do no

[PATCH] PR 83402 Fix ICE for vec_splat_s8, vec_splat_s16, vec_splat_s32 builtins

GCC Maintainers: GCC revision 255549  implemented early gimple folding for the vec_splat_s[8,16,32] builtins.  However, as a consequence of the implementation, we lost error checking for out-of-range values for the expected vspltis[bhw] instructions.  The result of not having the out- of-range

[ARM,testsuite] Restrict armv8_2-fp16-scalar-2 to hf targets

Hi, It seems gcc.target/arm/armv8_2-fp16-scalar-2.c needs an armhf target to pass: it wants 4 fmov.f16, but there are only 2 on arm-linux-gnueabi for instance. Since the test includes arm_fp16.h, adding -mfloat-abi=hard implies the usual problem of missing gnu/stubs-hard.h, so it seems to me

Re: [AARCH64] Neon vld1_*_x3, vst1_*_x2 and vst1_*_x3 intrinsics

On Fri, Apr 13, 2018 at 03:39:32PM +0100, Sameera Deshpande wrote: > On Fri 13 Apr, 2018, 8:04 PM James Greenhalgh, > > wrote: > On Fri, Apr 06, 2018 at 08:55:47PM +0100, Christophe Lyon wrote: > > Hi, > > > > 2018-04-06 12:15 GMT+02:00

Re: [AARCH64] Neon vld1_*_x3, vst1_*_x2 and vst1_*_x3 intrinsics

On Fri 13 Apr, 2018, 8:04 PM James Greenhalgh, wrote: > On Fri, Apr 06, 2018 at 08:55:47PM +0100, Christophe Lyon wrote: > > Hi, > > > > 2018-04-06 12:15 GMT+02:00 Sameera Deshpande < > sameera.deshpa...@linaro.org>: > > > Hi Christophe, > > > > > > Please find attached

Re: [AARCH64] Neon vld1_*_x3, vst1_*_x2 and vst1_*_x3 intrinsics

On Fri, Apr 06, 2018 at 08:55:47PM +0100, Christophe Lyon wrote: > Hi, > > 2018-04-06 12:15 GMT+02:00 Sameera Deshpande : > > Hi Christophe, > > > > Please find attached the updated patch with testcases. > > > > Ok for trunk? > > Thanks for the update. > > Since

Re: [PATCH] Make redirection only for target_clones: V2 (PR ipa/85329).

On 04/12/2018 07:59 PM, Jakub Jelinek wrote: > On Thu, Apr 12, 2018 at 07:53:35PM +0200, Jakub Jelinek wrote: >> On Thu, Apr 12, 2018 at 03:46:26PM +0200, Jan Hubicka wrote: >>> If you make C++ inline and get the idea to use target cloning attribute on >>> this, >>> this will likely lead to link

Re: [C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

On Fri, Apr 13, 2018 at 5:05 AM, Paolo Carlini wrote: > Hi, > > in this error-recovery regression, after a sensible error message issued by > cxx_constant_init, store_init_value stores an error_mark_node as > DECL_INITIAL of the VAR_DECL for 'j'. This error_mark_node

[PATCH] i386: Insert ENDBR after __morestack call

Since __morestack will jump back to its callee via indirect call, we need to insert ENDBR after calling __morestack. OK for trunk? H.J. gcc/ PR target/85388 * config/i386/i386.c (ix86_expand_split_stack_prologue): Insert ENDBR after calling __morestack.

[x86, patch] Add tuning options to skylake-avx512

Hi, This patch adds 2 tuning options to -march=skylake-avx512. Ok for trunk? gcc/ PR target/84413 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL, X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Add m_SKYLAKE_AVX512. Thanks, Julia

Re: [PATCH] Prefer mempcpy to memcpy on x86_64 target (PR middle-end/81657, take 2)

On Fri, Apr 13, 2018 at 12:10:33PM +, Wilco Dijkstra wrote: > > Anyway, here is what I think Richard was asking for, that I'm currently > > bootstrapping/regtesting.  It can be easily combined with Martin's target > > hook if needed, or do it only for > > endp == 1 && target != const0_rtx &&

Re: [PATCH] Prefer mempcpy to memcpy on x86_64 target (PR middle-end/81657, take 2)

On Fri, Apr 13, 2018 at 5:10 AM, Wilco Dijkstra wrote: > This patch causes regressions on AArch64 since it now always calls mempcpy > again, so yes either it would need to be done only for tailcalls (which fixes > the > reported regression) or we need Martin's change too

Re: [PATCH] Prefer mempcpy to memcpy on x86_64 target (PR middle-end/81657, take 2)

Jakub Jelinek wrote:  >On Thu, Apr 12, 2018 at 05:29:35PM +, Wilco Dijkstra wrote: >> > Depending on what you mean old, I see e.g. in 2010 power7 mempcpy got >> > added, >> > in 2013 other power versions, in 2016 s390*, etc.  Doing a decent mempcpy >> > isn't hard if you have asm version of

Re: [PATCH] PR libstdc++/85222 allow catching iostream errors as gcc4-compatible ios::failure

On 13 April 2018 at 11:22, Jakub Jelinek wrote: > On Fri, Apr 13, 2018 at 11:19:35AM +0100, Jonathan Wakely wrote: >> --- a/libstdc++-v3/src/c++11/Makefile.am >> +++ b/libstdc++-v3/src/c++11/Makefile.am >> @@ -128,10 +128,7 @@ hashtable_c++0x.o: hashtable_c++0x.cc >> >> if ENABLE_DUAL_ABI >> #

Add test from PR 83852 (was Re: Fix PR 83962)

On 09.04.2018 12:16, Andrey Belevantsev wrote: > On 06.04.2018 18:59, Alexander Monakov wrote: >> On Tue, 3 Apr 2018, Andrey Belevantsev wrote: >> >>> Hello, >>> >>> This issues is about the correct order in which we need to call the >>> routines that fix up the control flow for us. >> >> OK with

Re: [PATCH] PR libstdc++/85222 allow catching iostream errors as gcc4-compatible ios::failure

On Fri, Apr 13, 2018 at 11:19:35AM +0100, Jonathan Wakely wrote: > --- a/libstdc++-v3/src/c++11/Makefile.am > +++ b/libstdc++-v3/src/c++11/Makefile.am > @@ -128,10 +128,7 @@ hashtable_c++0x.o: hashtable_c++0x.cc > > if ENABLE_DUAL_ABI > # Rewrite the type info for __ios_failure. >

Re: [PATCH] PR libstdc++/85222 allow catching iostream errors as gcc4-compatible ios::failure

Darwin has double underscores at the start of mangled names, so this fixes the sed command to be more flexible. Committed to trunk and gcc-7-branch. commit f80944837b4c21016d826bff5f497ceda85b9894 Author: Jonathan Wakely Date: Fri Apr 13 10:44:08 2018 +0100 Fix

[Committed] IBM Z: Get rid of target specific C++ testcase

gcc/testsuite/ChangeLog: 2018-04-13 Andreas Krebbel PR testsuite/85326 * gcc.target/s390/pr77822-1.C: Rename to ... * gcc.target/s390/pr77822-1.c: ... this. Add asm scan check. * gcc.target/s390/pr77822-2.c: Add asm scan check. *

Re: [PATCH] Fix -fsanitize=address VLA instrumentation (PR sanitizer/85230)

On 04/13/2018 01:16 AM, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, we need to unpoison the red zones when leaving a > scope with VLA variable(s); this is done through __asan_allocas_unpoison > call, unfortunately it is called after the __builtin_stack_restore which > restores the stack

[C++ Patch] PR 85112 ("[8 Regression] ICE with invalid constexpr")

Hi, in this error-recovery regression, after a sensible error message issued by cxx_constant_init, store_init_value stores an error_mark_node as DECL_INITIAL of the VAR_DECL for 'j'. This error_mark_node reappears much later, to cause a crash during gimplification. As far as I know, the

Be more permissive for always inlining across target attribute changes

Hi, this patch makes it possible to always inline across target attribute changes when doing so will not lead to incorrect code. We used to be permissive here with default options and overly restrictie without. This fixes most common anoyances seen with these, but not all (i.e. zen)

Re: [PATCH] Prefer mempcpy to memcpy on x86_64 target (PR middle-end/81657, take 2)

On April 13, 2018 12:35:54 AM GMT+02:00, Jakub Jelinek wrote: >On Thu, Apr 12, 2018 at 07:37:22PM +0200, Jakub Jelinek wrote: >> On Thu, Apr 12, 2018 at 05:29:35PM +, Wilco Dijkstra wrote: >> > > Depending on what you mean old, I see e.g. in 2010 power7 mempcpy >got added,

Fix gcc.dg/debug/pr41893-1.c with Solaris ld (PR lto/81968)

The last LTO early debug related failure on Solaris 11 is FAIL: gcc.dg/debug/pr41893-1.c -gdwarf-2 -g3 (test for excess errors) FAIL: gcc.dg/debug/pr41893-1.c -gdwarf-2 -g3 -O (test for excess errors) FAIL: gcc.dg/debug/pr41893-1.c -gdwarf-2 -g3 -O3 (test for excess errors) Excess errors: ld:

Re: [Ping, Fortran, Patch, PR81773, PR83606, coarray, v1] Fix coarray get to array with vector indexing

Ping On Sun, 8 Apr 2018 14:25:50 +0200 Andre Vehreschild wrote: > Hi all, > > attached patch fixes (to my knowledge) the two PRs 81773 and 83606 where the > result of a coarray get() operation is assigned to an array using a vector as > index. It took me quite long to get it

[PATCH] PR gcc/84923 - gcc.dg/attr-weakref-1.c failed on aarch64

From: Vladimir Mezentsev When weakref_targets is not empty a target cannot be removed from weak_decls. A small example is below when 'wv12' is removed from the weak list on aarch64: static vtype Wv12 __attribute__((weakref ("wv12"))); extern vtype wv12