On Fri, Jun 29, 2012 at 9:57 PM, Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 29 June 2012 12:23, Carrot Wei car...@google.com wrote:
Hi
So the following is updated patch. Tested on qemu with arm/thumb modes
Assuming this testing was with and without neon ? Because the
Hi
So the following is updated patch. Tested on qemu with arm/thumb modes
without regression.
thanks
Carrot
2012-06-29 Wei Guozhi car...@google.com
PR target/53447
* gcc.target/arm/pr53447-1.c: New testcase.
* gcc.target/arm/pr53447-2.c: New testcase.
2012-06-29
On 29 June 2012 12:23, Carrot Wei car...@google.com wrote:
Hi
So the following is updated patch. Tested on qemu with arm/thumb modes
Assuming this testing was with and without neon ? Because the patterns
changed are different whether you use Neon or not.
without regression.
Can you add some
Hi Ramana
Thanks for the review, please see my inlined comments.
On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 8 June 2012 10:12, Carrot Wei car...@google.com wrote:
Hi
In rtl expression, substract a constant c is expressed as add a
On 28 June 2012 10:03, Carrot Wei car...@google.com wrote:
Hi Ramana
Thanks for the review, please see my inlined comments.
On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 8 June 2012 10:12, Carrot Wei car...@google.com wrote:
Hi
In
On 28/06/12 10:03, Carrot Wei wrote:
Hi Ramana
Thanks for the review, please see my inlined comments.
On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 8 June 2012 10:12, Carrot Wei car...@google.com wrote:
Hi
In rtl expression, substract
On Thu, Jun 28, 2012 at 5:37 PM, Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 28 June 2012 10:03, Carrot Wei car...@google.com wrote:
Hi Ramana
Thanks for the review, please see my inlined comments.
On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
subs -lo ; sbc ~hi - lower negative, upper negative
subs -lo ; adc hi - lower negative, upper positive
Yes.
snip
(LTUGEU:SI (reg:cnb CC_REGNUM) (const_int 0]
TARGET_32BIT
- adc%?\\t%0, %1, %2
+ @
+ adc%?\\t%0, %1, %2
+ sbc%?\\t%0, %1, %#n2
Since
On 8 June 2012 10:12, Carrot Wei car...@google.com wrote:
Hi
In rtl expression, substract a constant c is expressed as add a value -c, so
it
is alse processed by adddi3, and I extend it more to handle a subtraction of
64bit constant. I created an insn pattern arm_subdi3_immediate to
Hi
In rtl expression, substract a constant c is expressed as add a value -c, so it
is alse processed by adddi3, and I extend it more to handle a subtraction of
64bit constant. I created an insn pattern arm_subdi3_immediate to specifically
represent substraction with 64bit constant while continue
In the original patch, if add r0, c is not possible, but sub r0,
-c is possible, it will use the sub instruction. Although they
generate same result, but they may generate different CF flag, and
cause subsequent adc to compute out wrong result. So I updated the
patch to avoid using sub
Hi
I updated the patch to correct the length of insn adddi3_neon.
thanks
Carrot
2012-06-04 Wei Guozhi car...@google.com
PR target/53447
* gcc.target/arm/pr53447-1.c: New testcase.
2012-06-04 Wei Guozhi car...@google.com
PR target/53447
*
Hi,
As described in PR53447, many 64bit ALU operations with constant can be
optimized to use corresponding 32bit instructions with immediate operands.
This is the first part of the patches that deals with 64bit add. It directly
extends the patterns adddi3, arm_adddi3 and adddi3_neon to handle
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