On Wed, Nov 30, 2016 at 03:40:32PM +0100, Michael Matz wrote:
> Hi,
>
> On Wed, 30 Nov 2016, Segher Boessenkool wrote:
>
> > > I don't think mode-changing _extracts are valid in this context. From
> > > the
> > > docu:
> > >
> > > `(sign_extract:M LOC SIZE POS)'
> > > ...
> > > The
Hi,
On Wed, 30 Nov 2016, Segher Boessenkool wrote:
> > I don't think mode-changing _extracts are valid in this context. From the
> > docu:
> >
> > `(sign_extract:M LOC SIZE POS)'
> > ...
> > The mode M is the same as the mode that would be used for LOC if
> > it were a register.
On Wed, Nov 30, 2016 at 02:43:12PM +0100, Michael Matz wrote:
> > Shouldn't this be simply
> >
> > ...
> > (ior:SI (zero_extract:SI (reg:DI) (16) (0)))
> > ...
>
> I don't think mode-changing _extracts are valid in this context. From the
> docu:
>
> `(sign_extract:M LOC SIZE POS)'
>
Hi,
On Wed, 30 Nov 2016, Dominik Vogt wrote:
> On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote:
> > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> > It all has the same root cause: that patch makes combine convert every
> > lowpart subreg of a
On Wed, Nov 30, 2016 at 02:12:35PM +0100, Dominik Vogt wrote:
> On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote:
> > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> > It all has the same root cause: that patch makes combine convert every
> > lowpart
On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote:
> r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> It all has the same root cause: that patch makes combine convert every
> lowpart subreg of a logical shift right to a zero_extract. This cannot
> work at
On 24/11/2016 15:01, Michael Matz wrote:
>> > (set (reg:DI 69)
>> > (zero_extract:DI (reg:DI 65 [ v_x ]) <-
>> > (const_int 32 [0x20])
>> > (const_int 20 [0x14])))
> Hmm, this transformation (from v_x>>12 to zext(v_x,32,20) is only valid
> when the top 20 bits of
On Thu, Nov 24, 2016 at 03:01:02PM +0100, Michael Matz wrote:
> Hi,
>
> On Thu, 24 Nov 2016, Dominik Vogt wrote:
>
> > On s390 (31-Bit) we get two (easily fixable) test regression
> > supposedly because of the original path (+ this fix), and I don't
> > know what to do about it. Perhaps these
Hi,
On Thu, 24 Nov 2016, Dominik Vogt wrote:
> On s390 (31-Bit) we get two (easily fixable) test regression
> supposedly because of the original path (+ this fix), and I don't
> know what to do about it. Perhaps these point to two situations,
> where the change from lshiftrt to zero_extract
On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote:
> r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> It all has the same root cause: that patch makes combine convert every
> lowpart subreg of a logical shift right to a zero_extract. This cannot
> work at
Hi,
On Wed, 23 Nov 2016, Segher Boessenkool wrote:
> > Even with non-constant shifts it remains an extract and make_extraction
> > does support variable start positions (which is the shift amount), as does
> > the zero_extract pattern (depending on target of course).
>
> Sure, but the
On Wed, Nov 23, 2016 at 04:24:37PM +0100, Michael Matz wrote:
> > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> > It all has the same root cause: that patch makes combine convert every
> > lowpart subreg of a logical shift right to a zero_extract. This cannot
> > work
Hi,
On Wed, 23 Nov 2016, Segher Boessenkool wrote:
> r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> It all has the same root cause: that patch makes combine convert every
> lowpart subreg of a logical shift right to a zero_extract. This cannot
> work at all if it is
r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
It all has the same root cause: that patch makes combine convert every
lowpart subreg of a logical shift right to a zero_extract. This cannot
work at all if it is not a constant shift, and it has to be a bit more
careful
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