Re: gEDA-user: current working file name in gschemrc

2010-11-29 Thread Kai-Martin Knaak
Vladimir Zhbanov wrote: One problem I noticed before is no way to reprint all .eps-files from command line, that is from Makefile also. ack. A way to recursively print all schematics in a hierarchy is missing in the bag of features. ---)kaimartin(--- -- Kai-Martin Knaak

gEDA-user: creating new symbols

2010-11-29 Thread Michał Dwużnik
Hi, I encountered a segfault trying to connect a net to my shiny little newly created symbol (attached below). I created a few symbols, only one of those is causing a segfault (gschem from ubuntu 10.10 repos). I would be grateful for pointing out the error in creating this symbol Michal Dwuznik

Re: gEDA-user: Comments on pcb's g-code exporter HeeksCAD/HeeksCNC FOSS program for pcb milling

2010-11-29 Thread Markus Hitter
Am 16.11.2010 um 22:51 schrieb d...@umich.edu: However, the gcode export always crashes if I try to define the outline with a rectangle. It crashed also when the outline layer contains only a single vertical or horizontal line. Fixed in a new patchset:

Re: gEDA-user: creating new symbols

2010-11-29 Thread Kai-Martin Knaak
Micha? Dwu?nik wrote: mic...@jabberwocky:~/pcb$ cat LM1108SF33-1.sym v 20100214 2 B 200 300 1400 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 N 200 1100 0 1100 1 This is a net, not a pin. Pin definition lines start with the letter P. { T 0 900 5 10 0 1 0 0 1 pinnumber=2 T

Re: gEDA-user: creating new symbols

2010-11-29 Thread Michał Dwużnik
On Mon, Nov 29, 2010 at 16:29, Kai-Martin Knaak kn...@iqo.uni-hannover.de wrote: Micha? Dwu?nik wrote: mic...@jabberwocky:~/pcb$ cat LM1108SF33-1.sym v 20100214 2 B 200 300 1400 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 N 200 1100 0 1100 1   This is a net, not a pin. Pin

Re: gEDA-user: creating new symbols

2010-11-29 Thread Levente Kovacs
On Mon, 29 Nov 2010 19:34:36 +0100 Michał Dwużnik michal.dwuznik-re5jqeeqqe8avxtiumw...@public.gmane.org wrote: there's no visible clue in case of such error - segfault does not seem very elegant... You should file a bug report on SF project page. gEDA should not crash. Levente -- Levente

gEDA-user: PCB: Different solder mask clearance on top and bottom layers?

2010-11-29 Thread Richard Rasker
Hello, I'm working on a design with a largish (23x23 @ 0.8mm pitch) BGA chip, with vias to accomodate the fanout of the inner rows of pins. Now I would like to have these vias covered by the solder mask on the top layer (where the BGA device sits), but not on the bottom layer -- the latter so

Re: gEDA-user: creating new symbols

2010-11-29 Thread kai-martin knaak
Levente Kovacs wrote: You should file a bug report on SF project page. gEDA should not crash. This minimum example of a net in a symbol file that shows the same symptoms: /---net_crash.sym v 20100214 2 N 200 0 0 0 1 \ To reproduce: 1) put the file

Re: gEDA-user: PCB: Different solder mask clearance on top and bottom layers?

2010-11-29 Thread Stefan Salewski
On Mon, 2010-11-29 at 21:53 +0100, Richard Rasker wrote: Is there a way to change the solder mask on only one side of the board, but not the other side? When I use the K key over a via, the solder mask changes on both sides. It may be possible to make vias covered with solder mask, and