On Thu, Sep 08, 2011 at 10:27:52PM +0100, Peter Clifton wrote:
On Thu, 2011-09-08 at 13:43 -0600, Mark Rages wrote:
On Thu, Sep 8, 2011 at 12:38 PM, Colin D Bennett co...@gibibit.com wrote:
On Thu, 08 Sep 2011 17:50:33 +0200
Stefan Salewski m...@ssalewski.de wrote:
For me, I never
On Thu, Sep 08, 2011 at 10:32:26PM +0100, Peter Clifton wrote:
On Thu, 2011-09-08 at 13:10 -0500, John Griessen wrote:
gschem is not as key binding configurable as PCB as far as I can tell.
Adding that would be a fine goal.
It is actually - its just not immediately obvious.
Look in
On Fri, Sep 09, 2011 at 01:58:14AM +0200, Kai-Martin Knaak wrote:
DJ Delorie wrote:
But gschem and pcb have completely different toolsets and common
tasks. It would be difficult to make them the same outside of the
usual common key mappings (cut, paste, undo).
There are a few more
On Sat, Aug 27, 2011 at 08:37:59PM -0600, John Doty wrote:
On Aug 27, 2011, at 8:12 PM, Dan McMahill wrote:
This problem goes beyond diodes and transistors. For example, the old
10H series of ECL parts came both in DIP packages as well as PLCC
packages. Some of the parts though, would
Hi,
in src/did/lesstif/main.c, the Distance function is called
with the parameters in the wrong order.
This small patches fixes the problem. I still think that
the format is wrong, or at least the rounding to integer
mm/mil taking only the grid into account, but I've not yet
decided on
On Mon, Aug 01, 2011 at 04:31:01PM -0700, Andrew Poelstra wrote:
On Mon, Aug 01, 2011 at 04:51:51PM +0200, Gabriel Paubert wrote:
Hi,
in src/did/lesstif/main.c, the Distance function is called
with the parameters in the wrong order.
This small patches fixes the problem. I still
On Thu, Jul 28, 2011 at 07:26:25PM -0600, John Doty wrote:
On Jul 28, 2011, at 7:03 PM, DJ Delorie wrote:
Or 4000-series CMOS logic. Nice thing about 4000 series in this
application is that it can operate on unregulated 12V.
I thought of that, but a linear regulator just for the
On Wed, Jul 27, 2011 at 08:13:42PM -0400, Ethan Swint wrote:
On 07/27/2011 05:57 PM, Stephen Ecob wrote:
On Thu, Jul 28, 2011 at 5:35 AM, yamazakir2yamazak...@gmail.com wrote:
I sometimes get boards done at 4pcb, I didn't know they do assembly.
How much to they charge? And how big of a reel
On Mon, Jul 25, 2011 at 12:49:00PM -0400, DJ Delorie wrote:
Speaking of pointer warping: why is the pointer not warped when
swapping sides (with TAB for example) ?
At least it's not done with the lesstif HID.
That's intentional.
I strongly disagree with that choice.
I'm aware
On Mon, Jul 25, 2011 at 01:15:17AM +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote on the other list where mere users are not allowed to
post:
If no-one has any objection, I will remove the code which warps the
mouse pointer when selecting nets in the netlist window.
Speaking of
On Wed, Jul 13, 2011 at 08:30:43PM -0700, Andrew Poelstra wrote:
These too will be changed as we move away from a strict mm/mil
configuration.
I'm not sure what to do about them. Right now I have a giant
table of default/max/min for all these units, which totals 12
values per unit. Times
On Wed, Jul 13, 2011 at 01:56:23PM -0400, DJ Delorie wrote:
Great. As an astronomer, I really need to be able to define
my PCB in astronomical units and parsecs :-)
A while back, I had jokingly suggested supporting attoparsecs...
And why we are at it, get rid of the 1/2 oz and similar
On Wed, Jul 13, 2011 at 11:27:48AM -0700, Colin D Bennett wrote:
On Wed, 13 Jul 2011 11:05:56 -0700
Colin D Bennett co...@gibibit.com wrote:
On Wed, 13 Jul 2011 19:55:02 +0200
Gabriel Paubert paub...@iram.es wrote:
Great. As an astronomer, I really need to be able to define
my PCB
Hi Bob,
according to the archives, you were looking in August 2006 for
manufacturers of PCB on ceramic substate.
Did you find anything?
I'm looking for something similar now, for a circuit containing a
few Hittite HMC975 switches (it's not cryogenic, however).
Another problem I have
On Tue, Jun 21, 2011 at 05:10:48PM +, Mark Stanley wrote:
From: Gabriel Paubert
[...] I am unable to find capacitors narrower than about 0.25mm
(10mil) with low losses in the 4-20GHz range.
Anybody knows of a capacitor manufacturer that could provide
this kind of device?
We
On Thu, Jun 16, 2011 at 08:44:13PM +0200, Gabriel Paubert wrote:
Hi Andrew,
I just pulled PCB from git head and I have trouble with arcs in Gerber
output. I strongly suspect the latest commit: layers which do not
have arcs appear fine in gerbv, but automatic zooming layers which
On Fri, Jun 17, 2011 at 10:49:34AM +0200, Gabriel Paubert wrote:
On Thu, Jun 16, 2011 at 08:44:13PM +0200, Gabriel Paubert wrote:
Hi Andrew,
I just pulled PCB from git head and I have trouble with arcs in Gerber
output. I strongly suspect the latest commit: layers which do not
have
On Fri, Jun 17, 2011 at 11:41:22AM +0200, Gabriel Paubert wrote:
On Fri, Jun 17, 2011 at 10:49:34AM +0200, Gabriel Paubert wrote:
On Thu, Jun 16, 2011 at 08:44:13PM +0200, Gabriel Paubert wrote:
Hi Andrew,
I just pulled PCB from git head and I have trouble with arcs in Gerber
On Fri, Jun 17, 2011 at 01:35:11PM +0200, Kovacs Levente wrote:
On Fri, 17 Jun 2011 12:42:09 +0200
Gabriel Paubert paub...@iram.es wrote:
- pcb_fprintf (f, X%06.0mmY%06.0mm\r\n,
+ pcb_fprintf (f, X%06.0mlY%06.0ml\r\n,
Is this commited?
No, I don't have write privileges, nor do
Hi Andrew,
I just pulled PCB from git head and I have trouble with arcs in Gerber
output. I strongly suspect the latest commit: layers which do not
have arcs appear fine in gerbv, but automatic zooming layers which
contain arcs zoom out and give coordinates in the range of several
meters
On Tue, May 31, 2011 at 05:09:25AM +0200, Kai-Martin Knaak wrote:
Richard Rasker wrote:
OK, I'll start by reading up on the light vs. heavy symbol discussions.
Do I understand correctly that heavy symbols basically have certain nets
with predefined names (e.g. VCC, GND) implicitly
On Sun, May 29, 2011 at 02:30:08PM +0100, Peter Clifton wrote:
On Sun, 2011-05-29 at 11:37 +1000, Russell Shaw wrote:
Hi,
In _borast_bentley_ottmann_tessellate_bo_edges() which is from
_cairo_bentley_ottmann_tessellate_bo_edges(), i see you deleted
case
On Wed, May 25, 2011 at 07:11:49AM -0700, Colin D Bennett wrote:
On Wed, 25 May 2011 06:41:26 -0700
Colin D Bennett co...@gibibit.com wrote:
(1) Why is RESC0603L/N/M much smaller than '0603'?
(2) Why is there no similarly named set of RESC0805L/N/M for 0805
size? (3) Why does RESC1608M
On Wed, May 25, 2011 at 11:10:13AM -0700, Colin D Bennett wrote:
On Wed, 25 May 2011 16:56:46 +0200
Gabriel Paubert paub...@iram.es wrote:
On Wed, May 25, 2011 at 07:11:49AM -0700, Colin D Bennett wrote:
On Wed, 25 May 2011 06:41:26 -0700
Colin D Bennett co...@gibibit.com wrote
On Wed, May 25, 2011 at 02:40:58PM -0700, Colin D Bennett wrote:
On Wed, 25 May 2011 23:03:06 +0200
Gabriel Paubert paub...@iram.es wrote:
This said, most capacitors look to have a square profile, but
resonance frequencies observed on microstrip line change between
mounting the layers
On Thu, May 19, 2011 at 06:19:05PM +0100, Peter Clifton wrote:
On Thu, 2011-05-19 at 14:26 +0200, Gabriel Paubert wrote:
In the meantime, I have a 100% reproducible bug with the following
backtrace:
Program received signal SIGSEGV, Segmentation fault.
r_delete_entry (rtree=0x0
On Tue, May 17, 2011 at 11:48:47AM +0100, Peter Clifton wrote:
On Tue, 2011-05-17 at 10:11 +0200, Gabriel Paubert wrote:
I'm sure other languages use even more modifiers, but could
someone apply the following patch:
Committed, thanks! I made the equivalent change to the GTK HID
On Thu, May 19, 2011 at 02:23:10PM +0200, Gabriel Paubert wrote:
On Tue, May 17, 2011 at 11:48:47AM +0100, Peter Clifton wrote:
On Tue, 2011-05-17 at 10:11 +0200, Gabriel Paubert wrote:
I'm sure other languages use even more modifiers, but could
someone apply the following patch
On Tue, May 17, 2011 at 03:04:18PM -0400, Vanessa Ezekowitz wrote:
On Mon, 16 May 2011 23:29:46 +0200
Kai-Martin Knaak k...@lilalaser.de wrote:
Peter Clifton wrote:
the two '=' or remove the whole part 'a={= Key=}', what will
remove this key-binding for this menu-item.
On Wed, May 18, 2011 at 03:09:10PM -0400, Vanessa Ezekowitz wrote:
On Wed, 18 May 2011 13:54:15 +0200
Gabriel Paubert paub...@iram.es wrote:
On Tue, May 17, 2011 at 03:04:18PM -0400, Vanessa Ezekowitz wrote:
On Mon, 16 May 2011 23:29:46 +0200
Kai-Martin Knaak k...@lilalaser.de wrote
On Mon, May 16, 2011 at 11:29:46PM +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote:
the two '=' or remove the whole part 'a={= Key=}', what will
remove this key-binding for this menu-item.
Yes, I can recommend removing this key binding.
I do in my local builds for the
On Wed, May 11, 2011 at 02:26:43AM +0200, Kai-Martin Knaak wrote:
Colin D Bennett wrote:
Does anyone have any tips on how to plan a layout for easy and clean
track routing? In particular for 2-layer boards.
Put extra care into component placement. IMHO, placement is more
critical to
On Tue, May 03, 2011 at 10:37:01PM +0100, Peter Clifton wrote:
On Tue, 2011-05-03 at 19:46 +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote:
I'm very close to being able to push the basic 2D portions of PCB+GL
into git HEAD.
I feel like a supporter at the course of a marathon
On Wed, May 04, 2011 at 12:14:16PM +0100, Peter Clifton wrote:
On Wed, 2011-05-04 at 09:21 +0200, Gabriel Paubert wrote:
Great. Anyway the current gtk drawing code would have failed with
gtk3, but it seems that even the GL code will run into trouble:
- GdkDrawable and GdkPixmap have been
On Thu, Apr 14, 2011 at 10:14:13PM +0200, Krzysztof Kościuszkiewicz wrote:
On Wed, Apr 13, 2011 at 10:41:23PM +0100, Peter Clifton wrote:
pin[pinnumber=1] {pinnumber=2;}
pin[pinnumber=2] {pinnumber=1;}
I've long seen this to be the most sane way of managing back-annotation
into a
On Fri, Apr 15, 2011 at 02:16:23PM +0200, Stephan Boettcher wrote:
Gabriel Paubert paub...@iram.es writes:
A french or german keyboard will be different (I'm french,
but I can't stand the layout of french keyboards).
I'm using us keyboards exclusively, in Germany. I type a lot more
On Wed, Apr 13, 2011 at 09:31:24AM +0100, Andy Fierman wrote:
If you are going to model the PA - particularly to look at resonance
effects - then you should include reasonably accurate models for the
inductors and capacitors which include their major parasitic
components.
The Murata Chip
On Wed, Apr 13, 2011 at 10:38:05AM -0400, DJ Delorie wrote:
Another option is to look at gerbv and see if it has merging
capabilities. I know PCB is careful to use a consistent set of
apertures across gerbers;
Yes, and thank you very much for that feature... I've used it
to merge layers
On Mon, Apr 11, 2011 at 03:20:11AM -0400, DJ Delorie wrote:
I basically agree, but why stop here and not add a Z coordinate to
each layer?
You deleted the answer to that:
Note that this would be an interim change until we get around to
either a new-board-wizard or
On Mon, Feb 07, 2011 at 01:11:09PM -0800, Colin D Bennett wrote:
On Mon, 7 Feb 2011 15:09:08 -0500
DJ Delorie d...@delorie.com wrote:
this is NOT what the current software does
True.
there are NO plans to change any of it.
False.
I will add only this: anyone with
On Fri, Oct 08, 2010 at 05:07:45PM -0400, DJ Delorie wrote:
So... if pcb were to be limited to a 2 meter by 2 meter board, would
it actually be a painful limitation to anyone?
MAXINT nm is 84.5 inches (just over 7 feet).
Anyone who needs more than 84x84 inch boards can re-compile PCB
On Fri, Oct 08, 2010 at 11:14:04PM +0100, Peter Clifton wrote:
On Fri, 2010-10-08 at 15:42 -0400, DJ Delorie wrote:
Any idea of the loss of performance given that virtually all PCs
these days are actually 64 bit machines?
My dual-core 3.2GHz machine supports 64-bit, but I installed a
On Sat, Oct 09, 2010 at 10:15:15AM +0200, Armin Faltl wrote:
DJ Delorie wrote:
Please forgive my ignorance, but can't one just define a 64bit
integer on a 32bit system?
Yes, but there's a loss of performance if you do that.
if one really is anal about it, use 'long long int'
On Thu, Oct 07, 2010 at 04:23:34PM -0700, Andrew Poelstra wrote:
On Fri, Oct 08, 2010 at 01:00:50AM +0200, kai-martin knaak wrote:
I prefer 1 mm, sometimes 0.5 mm :-)
(Are there any plans to make inside pcb metric?)
I would vote for this.
+1
Really, the inch is by definition
On Thu, Oct 07, 2010 at 04:48:37PM -0700, Andrew Poelstra wrote:
On Thu, Oct 07, 2010 at 05:37:48PM -0600, John Doty wrote:
On Oct 7, 2010, at 5:00 PM, kai-martin knaak wrote:
(Are there any plans to make inside pcb metric?)
A couple of years ago I suggested making the
On Mon, Oct 04, 2010 at 12:09:22AM +0200, Armin Faltl wrote:
Rick Collins wrote:
At 08:24 AM 10/3/2010, you wrote:
Rick Collins wrote:
I really have no idea how things work in the gEDA/PCB world. With
FreePCB the library has a default orientation for parts and there
is a centroid vector
On Sun, Jun 13, 2010 at 10:57:50PM -0700, Matthew Lai wrote:
Am I having a brain fart or does the stock diode-1 symbol have opposite
pin numbers as the ALF300 footprint?
EDA vendors never get it right, so how could gEDA?
Really I edit my footprints and diode symbols to use A and K,
On Wed, Mar 24, 2010 at 10:30:00AM -0400, Ethan Swint wrote:
OT, but we're running out of leads at my company to locate ~25 TI DSPs -
TMS320F280x (substitute 1,2,6,8,9 for X). Anybody here have a couple
that they're willing to sell, or know of some other parties who may?
For x=1, Newark
On Tue, Mar 09, 2010 at 11:33:11PM +, Peter Clifton wrote:
On Tue, 2010-03-09 at 18:27 -0500, Dan McMahill wrote:
pstoedit converts postscript to various formats. So I suppose you could
try pcb export to postscript and then pstoedit to produce dxf. That
said, there are always issues
On Tue, Mar 09, 2010 at 07:56:42PM -0500, DJ Delorie wrote:
One of my long-term projects is to add layer types to layers, and
allow for sub-circuits (i.e. elements). Then we'd have a true paste
layer, and you could define elements as complexly as you need.
But it's been on the list for a
On Wed, Mar 10, 2010 at 10:13:16AM -0500, DJ Delorie wrote:
Indeed, however how hard would it be to add a nopaste flag to a pad
to indicate that you don't want paste for this specific pad?
Only as hard as running the ChangePaste() action.
I wasn't aware of its existence.
On Mon, Mar 08, 2010 at 09:18:56AM -0800, Anthony Shanks wrote:
Is there a way to make a square polygon with round edges in pcb?
Not to my knowledge, I have done it by cutting the corners at 45 degrees
and adding a non polycon-clearing zero length track at the corner (in one
case I also used
On Mon, Mar 08, 2010 at 09:47:55AM -0800, Anthony Shanks wrote:
Sorry that was a mis-statement.
Is there anyway to place vias that have a soldermask clearance MORE than 0?
What I typically do is to se all parameters of a via to be what I want,
and then type a on top of the via to perform
On Tue, Mar 02, 2010 at 09:21:25PM -0800, Donald Tillman wrote:
On Mar 2, 2010, at 2:35 AM, Peter TB Brett wrote:
The usual approach is to buy SMT packages containing 2 or 4
transistors on
a single piece of silicon (i.e. literally back-to-back on the wafer).
They're invariably
On Tue, Mar 02, 2010 at 02:01:51AM -0500, DJ Delorie wrote:
Do they even make SOT-23 sockets?
For matching, can you just press them onto a pcb carrier? Something
that plugs into a breadboard, and gives you three big copper pads to
contact? Assuming holding them down with your finger or
On Tue, Mar 02, 2010 at 10:35:22AM +, Peter TB Brett wrote:
On Mon, 1 Mar 2010 22:50:29 -0800, Donald Tillman d...@till.com wrote:
This particular project uses some analog IC design styles implemented
with hand-matched discrete transistors; diff amps, current mirrors and
so forth.
On Tue, Feb 16, 2010 at 10:50:11PM +0100, Maciej Pijanka wrote:
On Tue, 16 Feb 2010, Jim Lynch wrote:
I have a board I'm developing (maybe) that is a backplane. It has 9
edge connectors mounted on it and when I went to autoroute it Oh Lord!
I've never seen such a mess! Traces
On Fri, Feb 12, 2010 at 09:09:52PM +0100, Stefan Salewski wrote:
On Mon, 2010-02-08 at 11:12 +0100, Gabriel Paubert wrote:
The main use of this macro is to be able to control the pagestyle of a
figure
which occupies a whole page. By placing:
\floatcontrol{\thispagestyle{empty
On Sat, Feb 06, 2010 at 02:15:48PM -0500, Dave McGuire wrote:
On Feb 6, 2010, at 2:10 PM, gene glick wrote:
I use OpenOffice for quick dirty stuff, but LaTeX (with PDF
output) for anything that has to look good. Lyx is pretty nice but
those types of front-ends usually just get in the
On Fri, Feb 05, 2010 at 09:06:34PM +0900, Torsten Wagner wrote:
Dear geda users,
I know it is off topic but I guess it is somehow related to PCB and
many of you face the same problem or found already a solution.
I am looking for a good set of micro probes to address single pins of
ICs or
On Wed, Jan 20, 2010 at 05:42:26PM -0500, Mark Stanley wrote:
On Monday 18 January 2010 22:16:00 Gabriel Paubert wrote:
On Mon, Jan 18, 2010 at 09:00:35PM -0500, Mark Stanley wrote:
I'll get you the information tomorrow when I get back to work. For long
term storage we keep it packed
On Mon, Jan 18, 2010 at 11:05:02AM +0100, Florian Teply wrote:
Florian Teply use...@teply.info wrote:
On Saturday 16 January 2010 06:03:18 Edward Hennessy wrote:
On Jan 12, 2010, at 4:18 AM, Florian Teply wrote:
I'm gonna try and make up a list of properties of components starting
with
On Mon, Jan 18, 2010 at 02:23:16PM +, Peter Clifton wrote:
On Mon, 2010-01-18 at 14:45 +0100, Gabriel Paubert wrote:
Consider that some inductances that I use are not symmetric. While
I don't know of any asymmetric resistors (but maybe they exist),
some microwave broadband inductors
On Mon, Jan 18, 2010 at 09:22:56AM -0500, David C. Kerber wrote:
No, I meant passives, because it's not active. I don't consider
semiconductor to be the opposite of passive.
To me, a diode fits in the groups discrete (vice integrated), passive
(vice active), and semiconductor (vice ???)
On Mon, Jan 18, 2010 at 06:26:41PM -0500, Mark Stanley wrote:
On Monday 18 January 2010 16:46:59 Gabriel Paubert wrote:
And yes, I do use tunnel diodes, in bare dies actually. I bonded a couple
of them last Friday, but am still fighting problems with the attachment of
the backside, which
On Sun, Jan 03, 2010 at 09:14:49PM -0500, Jason wrote:
Have I mentioned I feel like a bull in a china shop as I plow through
datasheets, learning as I go? ;-)
Details are below, but the big question is, can I use a 200 mF supercap
(EDLC) to dump 100 mA into the motor for short periods ( ~ 1
On Sun, Dec 06, 2009 at 06:12:41PM -0500, DJ Delorie wrote:
instead of C-crap-crap so it can run under Ancient UNIX.
I've been writing in C++ on Unix for, oh, twenty years now. How
ancient is your Unix?
Actually, I've been looking at the code, and I wonder why it's
not plain C. If there
On Sat, Nov 28, 2009 at 08:44:12PM -0500, DJ Delorie wrote:
I never plate my vias. I use 13.5 mil holes and 25 mil diameter
copper, very tiny.
Wow! You are able to pass a wire larger than the hole? :-)
Now realistically, thin wire is often sufficient, unless you
have very large currents.
On Sun, Nov 29, 2009 at 06:16:40PM +0100, Bert Timmerman wrote:
Hi all,
And another patch.
This one is created from a fresh branch so it should be able to apply
without the former patch.
Before people believe that tented vias are isolated, they are not,
or at least not always.
I've been
On Fri, Nov 27, 2009 at 07:40:54AM +0100, Bert Timmerman wrote:
Hi Anthony,
Anthony Shanks wrote:
Finally getting the hang of the footprint file format, here is a
footprint of a dsub 15 high density connector (Analog VGA) if anyone
needs it.
More footprints to come.
On Fri, Nov 27, 2009 at 12:41:45PM -0500, Tony Radice wrote:
The idea of a 56 layer board makes my eyes water.
I Have worked on a 36, and that was (believe me) BAD ENOUGH!!
I've never seen more than 24 myself, and designed with more than 6,
but I suspect that your 36 layer PCB had blind and
On Fri, Nov 27, 2009 at 01:05:29PM -0500, DJ Delorie wrote:
64 bit machine? Ready for the 128 bit machines yet? ;-)
No, that was 32-bit.
Hey TeX uses 32 bit coordinates which an unit which is way
smaller than PCB and the maximum paper size is around 10
meter IIRC (with a ~5nm
On Mon, Nov 23, 2009 at 10:42:24PM -0500, DJ Delorie wrote:
Note: the SOT416 and SC70-5 might match some of the other footprints,
like SOT-23-5 or SOT-323-t. Check the dimensions.
I may be mistaken, but SC70-5 is much smaller than SOT323 (0.65mm pin
spacing instead of 0.95mm).
Here is the
On Sun, Nov 22, 2009 at 10:22:41PM +, Kai-Martin Knaak wrote:
On Sun, 22 Nov 2009 18:32:08 +0100, Stefan Salewski wrote:
Scheme is one of the simplest programming languages there is.
It's simplicity is much like the game of go -- Just four short rules need
to be obeyed. Yet, the
On Sun, Nov 22, 2009 at 06:24:18PM -0500, Stuart Brorson wrote:
Why have we so much scheme in gEDA?
IMO, if there is a problem with scripting in gEDA, the problem is that
the guile developers (and not the Scheme language) have created
problems for us repeatedly. Specifically, they have
On Fri, Nov 13, 2009 at 01:42:33AM +, Peter Clifton wrote:
On Thu, 2009-11-12 at 17:03 -0500, DJ Delorie wrote:
The file format and internal data formats support it, but there's no
way other than editing the file to set width and height to different
values.
The OpenGL hid won't
On Fri, Nov 13, 2009 at 08:28:33AM +, Ineiev wrote:
On Thu, 2009-11-12 at 20:06 +, Ineiev wrote:
Probably the function should be rewritten almost completely.
I'll try tomorrow.
And this is what comes in the attachment.
First, I suggest computations against the centerlines
of
On Fri, Nov 13, 2009 at 09:13:08AM +, Ineiev wrote:
On 11/13/09, Gabriel Paubert paub...@iram.es wrote:
On Fri, Nov 13, 2009 at 01:42:33AM +, Peter Clifton wrote:
Anyway, right now you won't be able to produce the corresponding
photoplotter files.
While as far as I know Gerber
On Tue, Nov 03, 2009 at 01:02:33PM -0700, Eric Brombaugh wrote:
On 11/03/2009 12:35 PM, Duncan Drennan wrote:
* gschem magnetic nets - always seem to snap to the wrong thing for me
so I end up turning them off always. Need to tweak my config file.
You can temporarily disable this feature
On Wed, Oct 21, 2009 at 10:46:47PM +0200, Stefan Salewski wrote:
On Wed, 2009-10-21 at 22:12 +0200, michalwd1979 wrote:
Hello,
During design of my first more complicated board I run into problems
with grids - element's pins often do not fall onto grid point.
Sure -- if I have an
On Thu, Oct 22, 2009 at 05:47:40AM +0100, Peter Clifton wrote:
On Thu, 2009-10-22 at 06:44 +0200, michalwd1979 wrote:
Thank You all for replies!
Yes I know about snap to pins option. I'm using opengl version
compiled from git, and I did not noticed 2 snapping points for pads.
Nope ;)
On Wed, Oct 21, 2009 at 05:37:21PM -0400, DJ Delorie wrote:
You don't need to be physically present to party^H^H^H^H^Hcode with us :-)
No but it always falls at odd times for me (Spain), and I've never
used IRC or something similar.
Gabriel
On Mon, Oct 19, 2009 at 03:18:25PM +0100, Andy Fierman wrote:
So your consultant thinks it's a bad idea to have a Vcc plane because
it takes up space that you could use for additional ground planes and
that you might need to run traces ...
... and then urges you to run power traces where?
On Mon, Oct 19, 2009 at 10:07:00AM -0500, John Griessen wrote:
Andy Fierman wrote:
So your consultant thinks it's a bad idea to have a Vcc plane because
it takes up space
.
.
.
Hopefully you can gently persuade your boss that this is not quite
what the very expensive consultant
On Mon, Oct 19, 2009 at 10:50:49AM -0400, Gene Heskett wrote:
On Monday 19 October 2009, Bob Paddock wrote:
Boss just sent around something he got from a consultant on
doing proper EMI design (which I've been doing for years already,
I thought until consultant came up with this):
Eliminate
On Mon, Oct 19, 2009 at 06:43:42PM -0500, Darrell Harmon wrote:
On Mon, Oct 19, 2009 at 5:27 PM, Dan McMahill d...@mcmahill.net wrote:
my recent experiences are more in line with Larry's. Most C for a given
package and voltage seems to be the best meaning that above resonance it
is no
On Sat, Oct 03, 2009 at 01:28:53AM +0200, Stefan Salewski wrote:
On Sat, 2009-10-03 at 01:10 +0200, Stefan Salewski wrote:
On Fri, 2009-10-02 at 14:43 -0700, S. Aguinaga wrote:
Hello Fellows,
I've added a chassis ground and used the symbol: chassis.sym
The symbol seems to be
On Fri, Oct 02, 2009 at 09:34:12PM -0700, Steven Michalske wrote:
On Sep 22, 2009, at 7:34 AM, Kai-Martin Knaak wrote:
The gschem gui seems to append new items to the bottom of the file.
As a
consequence, symbols done with the GUI are a pain to edit in a text
editor. Pins mix with
On Tue, Sep 29, 2009 at 05:21:16PM +, Kai-Martin Knaak wrote:
On Tue, 29 Sep 2009 17:01:23 +, Michael Sokolov wrote:
I'm told that the OMAP3430's Package-on-Package configuration requires
at least six layers to get all the signals out. Ugh.
OK, that explains the need for a lot
On Mon, Sep 28, 2009 at 08:28:19PM +, Michael Sokolov wrote:
How about we move this thread back to its original topic of blind and
buried vias, not arguments regarding whether or not PCB is part of gEDA.
I have some questions out of plain curiosity: completely aside from the
question of
On Sat, Sep 12, 2009 at 04:09:48PM -0400, gene glick wrote:
Stefan Salewski wrote:
Maybe one more unknown minor bug:
If we select an element and move it to the window borders, then the
display scrolls. If we flip the board with TAB key, select an element
and moves it to the lower border,
On Wed, Jul 22, 2009 at 10:55:33AM +, Kai-Martin Knaak wrote:
On Tue, 21 Jul 2009 22:28:37 -0400, DJ Delorie wrote:
Note that I have at least one schematic where the merging of the symbols
would have duplicated pins; this is intentional and they're supposed to
be connected together.
On Wed, Jul 22, 2009 at 06:07:54AM -0500, Bill Gatliff wrote:
Kai-Martin Knaak wrote:
The main case I'd like to catch is unintentionally duplicated symbols. If
both, refdes and all pins are identical, it is safe to assume an error.
Nak. In my case, I use one symbol to refer to all
On Wed, Jul 22, 2009 at 12:19:37PM +0100, Peter TB Brett wrote:
Hi everybody,
Recently there has been an increasing number of people who customarily post
to the list with geda-u...@seul.org in both To: and Cc: fields. This
results in my getting two copies of every e-mail you send, and is
On Mon, Jun 08, 2009 at 04:30:15PM -0400, DJ Delorie wrote:
Thanks, are the alt keys correct in linux?
Yup.
I think so. But on my spanish keyboard, I get an annoying
“Key not tied to an action” message in the log window
every time I type the AltGr key (which is needed for |, the
On Tue, Jun 09, 2009 at 06:23:35AM +, Michael Sokolov wrote:
Dave McGuire mcgu...@neurotica.com wrote:
I vote for automatic and immediate unsubscription of people who
post messages in HTML.
I second that!
Thirded, apologizing for the neologism.
What does HTML stand for anyway
On Fri, May 22, 2009 at 05:02:25PM +, Michael Sokolov wrote:
John Griessen j...@ecosensory.com wrote:
but then, the international reach of the internet along with closed borders
and regulated trade may put me out, way out :-)
You mean Ineiev's offer being 15-40 times cheaper than
On Mon, May 25, 2009 at 03:35:07PM +, Michael Sokolov wrote:
Gabriel Paubert paub...@iram.es wrote:
Indeed, while some distributors apparently still have a non-negligible
stock of Conexant's RS8973 (www.americaii.com claims 1943),
Thanks for the pointer, I'll check it out!
I'm
On Sun, May 17, 2009 at 12:29:52AM -0400, Michael B Allen wrote:
Hi,
I'm just paying around but I'm trying to do a simple LM741 Op-Amp
simulation. Here is my schematic:
http://207.192.69.113/~miallen/lm741.pdf
It can't work, but I have difficulty guessing what you want to do.
If you
On Tue, Apr 28, 2009 at 02:56:07PM -0500, John Griessen wrote:
DJ Delorie wrote:
I would think that mounting the chip upside down
.
.
.
I suppose you could hand-solder some copper foil or
desolder braid to the pad, as long as you're careful to not short the
pins.
Then it would
1 - 100 of 113 matches
Mail list logo
