from
Using default menus
cheers,
Levnte
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Makefile.sch is the one for schematics.
Levente
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On Mon, 29 Aug 2011 22:28:22 +0200
Levente Kovacs leventel...@gmail.com wrote:
On Mon, 29 Aug 2011 10:28:11 -0700
Colin D Bennett co...@gibibit.com wrote:
Nice! That sounds very slick. Have you shared your code for this
pin-mapping tool?
What I do is I share my git repositories
of
the package. Have an intermediate layer (scripts, database, pinmaps, etc.)
that do the heavy lifting for you.
Levente
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implement everything with toolbar
(if I'm not mistaken) That would play nice on a dual headed setup. There were
fights against GTK people not to take tear-off menus from gtk3. But they did
AFAIK.
Levente
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against it... just curious. But maybe
it would be nice to have one... someone might pick up some of the tasks, and
do it.
Levente
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On Tue, 23 Aug 2011 16:31:49 -0400
DJ Delorie d...@delorie.com wrote:
I think dockable toolbars is the way to go.
+1.
And the ability to store toolbar states in configuration file, or *.pcb
file.
Levente
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The automatic layer change capability is missing from the current HEAD
( 7b590a617db3ca3ed69965b544f1468f82c39dfe ). I.e. when you swap viewing side
with TAB.
It works only once, then stops working.
Thanks,
Levente
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called outline.
For the others, thank you for taking time playing with it. I didn't
experienced any trouble with the feature. However, I'm not a heavy DRC user.
Levente
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to their homepage. :-)
http://git.logonex.eu/?p=library.git;a=tree;f=electronic/footprint;h=1850fa21028a1f1e69284f1f6b67849e41fe4763;hb=HEAD
tag_connector_*.fp
Cheers,
Levente
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and simple purpose, this works well
enough for the moment.
Regards,
Colin
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for pointing this out.
Attached is the new patch.
Levente
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diff --git a/src/find.c b/src/find.c
index eb4cac2..c5159ba 100644
--- a/src/find.c
+++ b/src/find.c
@@ -822,6 +822,8 @@ LookupLOConnectionsToPVList (bool AndRats)
/* now all lines, arcs
Attached you can find the skip_drc patch for the current head.
It would be nice if it was checked in to git HEAD.
Thanks,
Levente
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diff --git a/src/action.c b/src/action.c
index 4f2e401..af93c19 100644
--- a/src/action.c
+++ b/src/action.c
@@ -6947,7
.
Thanks for reporting!
Thanks for commiting!
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the layer data to the fab house. Make sure you have mask openings
on vias. Solder jumpers in the vias.
I recommend using double sided boards.
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On Tue, 17 May 2011 00:10:07 +0100
Peter Clifton pc...@cam.ac.uk wrote:
I'll try and fix it shortly.
Peter,
Thank you.
Levente
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?
Do you have this issue with PCB compiled with --disable-gl ?
Levente
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I'm trying to load autocrop.so to my recently compiled (from git HEAD) pcb.
What I get is this:
dl_error: /home/leva/.pcb/plugins/autocrop.so: undefined symbol:
ClearAndRedrawOutput
Is there any way to tweak pcb and/or autocrop.c to work together?
Thanks,
Levente
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of the source.
Could you provide any hint on this?
The schematic attached.
Any help is appreciated.
Thanks,
Levente
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PA_lpf.sch
Description: application/geda-schematic
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On Sat, 16 Apr 2011 13:10:50 -0400
al davis ad...@freeelectron.net wrote:
With Gnucap, just ask for the capacitor current.
print ac i(c*)
(this prints all capacitor currents)
I use ngspice... will it work with that?
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On Sat, 16 Apr 2011 15:13:33 -0600
John Doty j...@noqsi.com wrote:
If the refdes is V1, the current is V1#branch.
Thank you. That did the trick.
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On Tue, 5 Apr 2011 13:11:25 -0700
Russell Dill ru...@asu.edu wrote:
Perhaps I'll go with a solder blob jumper. A drawbridge component in
PCB that is just a special type of trace would be really nice.
Yeah. I miss the concept of the star point.
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hi,
Is there any way in gschem (or gattrib) to refactor netnames in a given set of
schematics?
Thnaks,
Levente
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compile a new PCB, I have
to patch.
Browsing the source, I see that there is some movement to support non-copper
layers. I don't know the state of that. Still I think it is a good feature.
Thanks,
Levente
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Hi,
I have rewritten the skip_drc patch (originally written by Ineiev) to apply
to the current git HEAD.
The original patch can be found here:
http://www.seul.org/pipermail/geda-user/2010-September/048721.html
My patch is attached.
Levente
diff --git a/src/action.c b/src/action.c
index
On Sat, 19 Feb 2011 12:37:53 -0500
DJ Delorie d...@delorie.com wrote:
I use the polygon editor. With the new Holes tool, it's a lot easier.
You mean moving the vertex of a polygon? And waht are you doing when it is
hidden by a clearance?
Thanks,
Levente
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gedasymbols.org, and I have
my own library as well.
http://git.logonex.eu/?p=library.git;a=tree;f=electronic
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to the outline layer
(but that doesn't end up in t
A text on copper layers? Outside the board area?
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Hi list,
I discovered that PCB (the GTK HID) doesn't let me define boards greater than
10 mils.
Is it intentional?
N.B. I can make the board larger by editing the bcb file manually.
Thanks,
Levente
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will say that I am getting much more confident and much faster at
creating footprints in pcb as I gain experience with it, and I'm no
longer scared when I face a new part with an odd footprint. :-)
Yes! YES! That is the way! I am happy to hear that! :-)
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,
because you have to have a table somewhere (at least one in your mind) which
links which supply is what. AVCC2=5V, AVCC1=12V etc.
Same goes for ground connections. AGND and DGND.
HTH,
Levente
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On Fri, 31 Dec 2010 13:05:41 +0100
Johnny Rosenberg
gurus.knu...@gmail.com wrote:
So I am the only one that use still them?
And why did they use a small circle for the NOT function at the
output if the plotters had difficulties plotting them?
They seems to be used pretty much in my
Happy new year all!
Levente
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On Wed, 29 Dec 2010 23:48:00 -0800 (PST)
Oliver King-Smith oliver...@yahoo.com wrote:
I can measure the size of stuff using gerbv (there may be a better
way to do this in pcb)
Use Ctrl+M to set an origin. You have relative coordinates printed next to the
cursor position.
Levente
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=electronic/autolib/footprints;hb=HEAD
All of my footprints including the generated and the manually drawn ones is
located here:
http://git.logonex.eu/?p=library.git;a=tree;f=electronic/footprint;hb=HEAD
Levente
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${PCBOUTDIR}/${FILEBASE} ${PCBNAME}.pcb
later in the Makefile:
output: clean_output gerber pdf
cp ${FILEBASE}.pdf ${PCBOUTDIR}
tar -jcvf ${FILEBASE}_${DATE_S}.tar.bz2 ${PCBOUTDIR}
rar a ${FILEBASE}_${DATE_S}.rar ${PCBOUTDIR}
Levente
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, and attributes
with an updater script, which pulls everything from a MySQL database.
Levente
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the answers that are useful and ignore the crap.
Yes.
The let us start a Vi vs. Emacs comment was a joke.
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On Sat, 25 Dec 2010 10:10:16 +0100
Stephan Boettcher boettc...@physik.uni-kiel.de wrote:
Merry Christmas!
Same to you and to the community!
== PCB wishlist ==
The recent (and some not so recent) discussions made me think about
how development of PCB could proceed to solve some of the
On Sat, 25 Dec 2010 18:14:27 +0100
Stephan Boettcher boettc...@physik.uni-kiel.de wrote:
line layer=top ends=round 132 150 132 250 /line
I'd add a current netname to copper objects
line layer=top ends=round netname=GND 132 150 132 250 /line
Or something like this.
Levente
On Sat, 25 Dec 2010 22:07:16 +0100
Stephan Boettcher boettc...@physik.uni-kiel.de wrote:
This is fundamentally different from how PCB treats copper,
connectivity and netlist now, and restricts the flexifility of the
tool that results from how it works now. So, that would be a
separate set of
On Sun, 19 Dec 2010 22:12:30 -0500
DJ Delorie d...@delorie.com wrote:
I changed the overlapping vias test in two ways...
1. Via copper is now allowed to overlap when vias are created. Via
*drills* are not.
2. Vias which violate this rule in a *.pcb file are preserved at load
don't we put banners to our webpage:
We need developers!
We need contributors!
or something like that. There might be some out there, who would spend more
time on the project.
I've seen this on other FOSS pages.
Just an idea.
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Hi,
Attached is a fiducial example.
Enjoy!
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fidu.fp
Description: Binary data
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of my footprints are generated, and the zero point is the center of the
package. I think they are OK for pick point.
There are other footprints, which I made manually. In that case, I imagine the
best pick point and I put the zero point there.
Levente
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On Thu, 2 Dec 2010 12:40:53 -0500
DJ Delorie d...@delorie.com wrote:
Aside from editing the sources? No :-P
Okay... :-) Cold you tell me any point where to look?
Thanks...
Levente
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On Thu, 2 Dec 2010 12:40:39 -0500
DJ Delorie d...@delorie.com wrote:
So change it :-)
I rather write scripts than modify the source...
Please note that my script now calculates placement angles as well! :-)
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On Thu, 2 Dec 2010 14:41:01 -0500
DJ Delorie d...@delorie.com wrote:
src/file.c
WritePCBDataHeader()
Thanks
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go and tweak my script.
Thank you again,
Levente
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? It would be great help.
Answering to my own email... Thanks to open formats, I did it in an hour. The
script searches for a special footprint (attached), and takes its position as
reference.
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refpoint.fp
Description: Binary data
gen_element_coords.pl
On Mon, 29 Nov 2010 19:34:36 +0100
Michał Dwużnik michal.dwuznik-re5jqeeqqe8avxtiumw...@public.gmane.org wrote:
there's no visible clue in case of such error - segfault
does not seem very elegant...
You should file a bug report on SF project page. gEDA should not crash.
Levente
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On Sat, 13 Nov 2010 13:07:23 +
Peter TB Brett pe...@peter-b.co.uk wrote:
Could you please post a bug to the bug tracker, so we don't
forget about this?
Sure...
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,
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to one of my symbol. That is bad, but gnetlist should not
crash.
Thanks,
Levente
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in ?? ()
#32 0x7fffe76a in ?? ()
#33 0x7fffe76d in ?? ()
#34 0x7fffe783 in ?? ()
#35 0x7fffe793 in ?? ()
#36 0x in ?? ()
I'm on Debian testing. I can send schematics on request. gEDA/gschem version
1.6.1.20100214.
Levente
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On Fri, 12 Nov 2010 23:53:06 +
Peter TB Brett pe...@peter-b.co.uk wrote:
On Friday 12 November 2010 23:37:18 Levente Kovacs wrote:
Hi all,
I could make gnetlist crash with the following command:
gnetlist -q -g gsch2pcb -o pcb/if_card.new.pcb -m gnet-
gsch2pcb-tmp.scm
sch
On Sat, 13 Nov 2010 01:19:18 +0100
Levente Kovacs leventel...@gmail.com wrote:
I'm trying to build gEDA from sources. I successfully installed it,
but it keep searching for *.scm files in old places. When I run
gnetlist I get:
Invalid path [/usr/share/gEDA/bitmap] passed to bitmap-directory
Hi,
I've exported some g-code from one of my former projects as a test. I don't
have a milling machine, but I'd like to see the result. Could you please point
me a g-code viewer for Linux? Preferably debian.
Thanks,
Levente
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.
:-)
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gpcb-menu.res
Description: Binary data
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On Fri, 08 Oct 2010 10:31:10 -0400
Rick Collins gnuarm.2...@arius.com wrote:
Personally, I can't imagine a PCB larger than 2 meters much less 4
meters. Or is the possibility of uses other than PCB design being
considered here?
I ended up designing my kitchen layout using PCB. I started
Ok,
I dont really think that PCB has to have the ablity to handle a house, or
kitchen in terms of length.
Yes. Set the scale-factor to 1000, and now your base-unit is um,
in that the smallest PCB object you can make will be scaled to a
micrometer, and you can have 2km boards if you want.
On Fri, 8 Oct 2010 14:08:12 -0400
DJ Delorie d...@delorie.com wrote:
Files are text, no problem there. The routines that *read* files need
to parse them as 64-bit integers always, but we can complain if (1)
they don't fit in 32-bit and (2) PCB is built for 32-bit. Thus,
people who need more
the pcb from the filesystem.
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we have to implement padstacks at the footprint level.
Levente
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On Sat, 4 Sep 2010 11:24:38 +
Ineiev ine...@gmail.com wrote:
Probably this patch may be used as a workaround.
Why don't we just push this patch to HEAD? This works just great.
Thanks,
Levente
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.
Anyone?
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to edit when every operation tags the
LCD instead of the parts under it.
What a coincidence. I am editing a board right now with a big LCD covering it
all! :-)
Levente
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could define pads as polygons, so with this feature any kind of
pads could be implemented. Solder-mask cut outs would be nice too.
Thanks again,
Levente
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:
http://git.logonex.eu/?p=svn.git;a=tree;f=scripts4geda;h=28030ab03ab4f2df9dbbe5adb380f5de46cc7c6d;hb=HEAD
Enjoy,
Levente
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On Tue, 20 Apr 2010 00:10:34 -0400
Dave McGuire mcgu...@neurotica.com wrote:
Jive.
I speak Jive!
I dance Jive!
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Hi,
I can't find any documentation about the hierachy support in gnetlist
http://geda.seul.org/wiki/geda:gnetlist_ug#hierarchy_support
Is there any documentation about hierarchy support?
Is there any way to create PCAD netlist with gEDA?
Thanks,
Levente
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how much would it cost to add them.
Thanks for reading-Patrick
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-user
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= current_action-trigger_cb (argc, argv, x, y);
Later, I figured it out.
I don't know what is the current state of the contribution for gEDA/PCB, but
attached is a patch to fix this issue.
Levente
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diff --git a/src/hid/lesstif/menu.c b/src/hid/lesstif/menu.c
was
working on converting a PIC project schematic into gschem when I
realized that none of the Microchip IC's I was using were in the
component library. What's the standard procedure for this? Is it
easier to mooch off an existing part or to create your own?
Thanks,
Chris
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available if anyone wanted it.
I've wrote some C++ code to convert a DXF to PCB. It is in works for me
state.
Levente
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/libXaw3d.so.7
/usr/lib/libXaw.so.8
etc...
Make sure you install the *-dev packages too.
Cheers,
Levente
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spend some time on a train, so I'll bring my notebook, and do some
Hungarian translation.
Cheers,
Levente
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=co
Happy soldering!
Levente
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a change to makefile.am
in /src, and make install again.
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/eurocard_frontplane/8HE.pcb?view=log
Cheers,
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On Thu, 02 Jul 2009 14:22:44 +0200
Stefan Salewski m...@ssalewski.de wrote:
An other method may be a SPECIAL connection symbol in gschem for
connecting nets.
I think that would be a nice solution. You could then add starpoints in power
and ground nets.
Levente
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built in supports for both female and male headers.
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That doesn't mean that everyone else has to stop working on the things that
interest/motivate them.
True, but I guess the first step should be to remove the rounding errors.
Levente
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.
You have a couple of options:
1. You regenerate your footprint like load it to the buffer, break it to
elements, edit, end re-export.
2. You use your favourite text editor to tweak it.
Cheers,
Levente
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it in Budakalász. :-) But yes, I know it is a crazy toy! :-)
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On Wed, 20 May 2009 11:45:55 -0400 (EDT)
der Mouse mo...@rodents-montreal.org
wrote:
What _is_ this driving? Ten feet of #3 copper?
A current sensor.
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on the line, so we must simulate them too.
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-user mailing list
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want to even calculate.
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. For that, we'll go for transformer.
And a plus... multiply everything by 3, hence it must be 3 phase...
:-)
On Wed, 20 May 2009 11:27:48 -0500
Mark Rages markrages-re5jqeeqqe8avxtiumw...@public.gmane.org wrote:
On Wed, May 20, 2009 at 11:16 AM, Levente Kovacs
leventelist-re5jqeeqqe8avxtiumw
.
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Hi DJ,
Thanks for the prompt answer.
How are you creating them by hand?
I mean not with some generator script.
Cheers,
Levente
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dayjob to blame. It looks good
now.
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Hi,
I've found a bug in the latest version of footgen.py. It is a bug in the
undocumented `pih' mode.
diff attached. It works for me (tm).
Cheers,
Levente
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519c519
dipelt = dipelt + pin(-x,y,paddia,drill,str(pinnum),polyclear,maskclear
Hi,
I've added a new feature to footgen.py.
It has now a mode called dihf. It is the same as dih, but produces mirror
image.
It is good for female headers, keeping the same pinout.
Diff attached.
Cheers,
Levente
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519c519
dihelt = dihelt + pin(-x
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