affect functionality - e.g. pins and attributes. This would allow
cosmetic changes not to flag the same degree of warning as functional
changes.
Best regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
of inputting that, and PCB layouts are just one way of
embodying it.
It seems un-warranted to make a schematic file from a data-table when
the end output is just the data-table in a different format.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge
areas. Inkscape import
filters and gstreamer pipelines are two examples I can think of right
now.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0
(system installed) libraries might
be to prompt the user for another location to save into - including the
option to create a new local library for the purpose.
Hopefully these extra features will solve some of the problems I have
explaining simple footprint creation to new users ;)
--
Peter Clifton
On Thu, 2011-05-19 at 02:56 +0200, Levente Kovacs wrote:
On Mon, 16 May 2011 10:17:34 +0100
Peter Clifton pc...@cam.ac.uk wrote:
Anyway, it would be worth testing to check
I tested it on my notebook. It has an Atom CPU with an intel GPU.
With the GL renderer it can do 7fps.
What GPU
(~2006).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
-root, box);
Now fixed with this commit:
commit c12cc6f769b5ccc603a75361fae3adc930934506
Author: Peter Clifton pc...@cam.ac.uk
Date: Thu May 19 18:13:43 2011 +0100
buffer.c: Update polygon r-tree when adding a polygon to the buffer.
This resulted in a crash when rotating a buffer
7a09bb3ab5c20ba1e3f687145000c5f142ed2fa6
Author: Peter Clifton pc...@cam.ac.uk
Date: Tue May 17 00:56:30 2011 +0100
buffer.c: Fix crash in SmashBufferElement
The element is allocated with g_slice_new, so must be free'd with
g_slice_free.
Broken since commit
international keyboards (e.g. Spanish).
If we don't ignore it, PCB complains about the key not being tied to
an action when it is pressed.
From the committer, Peter Clifton pc...@cam.ac.uk
...
Thanks to Gabriel for reporting this and providing the patch for
Lesstif. I have updated
discussion
there?
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
On Tue, 2011-05-17 at 15:36 +0200, Stefan Salewski wrote:
On Tue, 2011-05-17 at 12:02 +0100, Peter Clifton wrote:
Core features in the PCB editor can be pretty complex. We have a lot of
code for dealing with polygon geometry,
May we consider use of clipping libraries like
http
the above bug's crash
into a hang again.
however that bug occurs on versions even prior to the 2011-04-30 commit
in which the 'test2.pcb' crash was introduced.
The hang is back now, and I'll try to figure out what causes it.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department
On Sun, 2011-05-15 at 22:34 -0700, Colin D Bennett wrote:
On Wed, 11 May 2011 11:43:50 +0100
Peter Clifton pc...@cam.ac.uk wrote:
I've not seen PCB crash due to bad pstoedit polygons before though -
if you have an example which is reproducible, please send it to me.
I just re-tested
acceleration for the non-GL version's
rendering calls, for example. Even if the non-GL calls were software
drawn, the GL ones are still more complicated.
Anyway, it would be worth testing to check.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ
the edges in (winding order), and constructs an r-tree of the edges (to
make the contour participate faster in boolean operations)
borast_traps_t traps;
bo_contour_to_traps(contour, traps);
}
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge
On Mon, 2011-05-16 at 22:59 +1000, Russell Shaw wrote:
On 16/05/11 19:26, Peter Clifton wrote:
On Mon, 2011-05-16 at 15:54 +1000, Russell Shaw wrote:
From pcjc2/src/borast/borast-bentley-ottmann.c, i used some functions
to make a small test program to see how bo_contour_to_traps
convex, hole free polygons only,
and our are not guaranteed to be.
Some clever people are doing more complex polygon rasterisation in GL
shaders I believe.
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue
: 2ce35292b9e96da38cb56878005aba20891689eb
committer: Peter Clifton pc...@cam.ac.uk
timestamp: Sat 2011-04-30 19:19:22 +0100
message:
Convert board objects to GLists of g_slice allocated memory
Thanks for the bisect. TBH, I could have guessed with 99% certainty it
would be that commit which caused the issue, but I didn't have
On Tue, 2011-05-17 at 00:10 +0100, Peter Clifton wrote:
On Mon, 2011-05-16 at 15:22 -0700, Colin D Bennett wrote:
On Mon, 16 May 2011 23:10:30 +0200
I bisected the bug and determined it was introduced 2011-04-30 by the
following commit:
...
I'll try and fix it shortly.
Now fixed
gschem!
I've found it amazing just how more usable programs feel with nicer
graphics. Surely it is just psychological though, but it really seems to
matter.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
context or something properly. It
could also be a driver issue.
What graphics card and driver do you use?
(Can be determined quite accurately if you post output from glxinfo and
a copy of your /var/log/Xorg.0.log)
Regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department
of a physical PCB layer), but as
such, the term is too overloaded for us to use here.
What these sub-layers actually do is group drawing primitives so they
can be coloured differently.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson
the optimiser makes mistakes and causes shorts on my boards!
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone
loading the
board, with bumps of say 20Meg for every power plane deleted and
recreated.
Obviously this isn't ideal, but it could possibly explain where your
memory usage is going.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue
to support.
Bonus points for ability to spit out a list of rework instructions for a
technician or board assembly house to follow and tick off as they are
made.
Comments?
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue
On Fri, 2011-05-13 at 09:01 -0500, John Griessen wrote:
On 05/13/2011 08:10 AM, Peter Clifton wrote:
Comments?
Sounds close to the approach of Fritzing, where wiring is documented
as literal wires put in a plug-board. Your concept is different only
in keeping the as built prototype
dig inside the contents of such container files to
track changes in them properly.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328
it
in the review!
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
of the
PCB board.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
-8 (which probably already
works for 99.something% of the cases.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone
on the schematic where you could
make the equivalent cut. You may wind up having to redraw the
schematic.
Netlist extraction from the PCB is possible with a little effort, but I
was thinking of a schematic - PCB flow here, not back-annotating board
changes to the schematic.
--
Peter Clifton
into writing the cairo
rendering for gschem specifically for us to get nice anti-aliased
drawing, I'd love to know what you think is better about these
renderings than gschem's native ones. (1.6.x series gschem).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University
,
testing or some constructive critics) :)
Any suggestions or feature requests are wellcome too.
Thank you,
Pavlo.
Awesome, I know a couple of people who will be really excited by this,
and I will make sure they see it.
--
Peter Clifton
Electrical Engineering Division,
Engineering
On Thu, 2011-05-12 at 14:05 +0100, Robert Spanton wrote:
On Wed, 2011-05-11 at 19:19 +0100, Peter Clifton wrote:
Perhaps it would be possible to support a flag on the smaller,
clippiING polygon which makes it bully other polygons away from it,
EAGLE does this by allowing the user to assign
issue).
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
is reproducible, please send it to me.
Best regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me
HEAD PCB again. (Admittedly the polygons produced
would be pre-clipped exactly to your track routing, so it would be a
last export step beyond which you'd not want to do further editing).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ
On Wed, 2011-05-11 at 11:43 +0100, Peter Clifton wrote:
I've attached it here in case it helps you get started.
(Now attached!)
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173
clarity I guess you're looking for, switch to the
pcb+gl branch and turn on thin draw polygons.
Alternatively, thin draw polygons in git HEAD might still help you.
The keyboard short-cut is Ctrl + Shift + P
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University
./configure and GL should be enabled as
the default. You might need to install your distro's libgtkglext-dev
package before it will build.
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0
On Wed, 2011-05-11 at 07:16 -0700, Colin D Bennett wrote:
On Wed, 11 May 2011 13:12:55 +0100
Peter Clifton pc...@cam.ac.uk wrote:
On Wed, 2011-05-11 at 21:41 +1000, Geoff Swan wrote:
Hi folks, I've just started using separate layers so for my
polygons so that I can hide them when
like mech-CAD systems in defining geometry
based upon a hierarchy of boolean operations.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223
to rasterise each contour (which
doesn't have holes).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask
ideas?
Sorry (Russell is right), I forgot to tell you to cd pcjc2 or whatever
directory the repository cloned into.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal
to me? (I presume it may be difficult
to screen-shot, but give that a try too).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328
of wine were pretty buggy in regards glyphs rendered
through pango / cairo. Something these toolkits do is just different
than most Windows apps. Running GTK / pango / cairo apps under Windows
has always worked correctly to my knowledge.
--
Peter Clifton
Electrical Engineering Division,
Engineering
to work together?
Edit autocrop.c and change ClearAndRedrawOutput (); to Redraw ();
In general, you need to rebuild every plugin when you build a new
version of PCB from git. plugins poke internal APIs and data-structures,
which do change from time to time.
Best wishes,
--
Peter Clifton
On Wed, 2011-05-11 at 21:29 -0400, DJ Delorie wrote:
Replace it with this:
gui-invalidate_all ();
More commonly, you would call Redraw (), and draw.c knows this means
to poke gui-invalidate_all(), keeping the drawing model details more
localised to draw.c and the GUIs.
--
Peter
drawing. But I have already
clicked the starting point again. (I also tried Shift-P like the pcb
manual suggests for the polygon tool.)
Closing works easier if all-direction lines is switched on.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University
versions of things.. I don't expect it will be a pressing
concern for some years yet.
We'll have to have caught up by the time distros stop shipping support
for GTK2.0 though.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue
-update-desktop-database
I've no idea sorry, but I'd love someone to figure it out!
If you just wanted to build PCB (and not test the new bits of GL
rendering code), add --disable-gl to the configure options.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University
to being able to push the basic 2D portions of PCB+GL
into git HEAD.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab
On Tue, 2011-05-03 at 19:46 +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote:
I'm very close to being able to push the basic 2D portions of PCB+GL
into git HEAD.
I feel like a supporter at the course of a marathon race: Go, Peter. Go!
Ok, spurred on by that encouragement, I've tidied
On Wed, 2011-05-04 at 08:09 +1000, Stephen Ecob wrote:
On Wed, May 4, 2011 at 7:37 AM, Peter Clifton pc...@cam.ac.uk wrote:
On Tue, 2011-05-03 at 19:46 +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote:
I'm very close to being able to push the basic 2D portions of PCB+GL
into git
but there was no installation candidate.
Any help appreciated!
Either libgd2-xpm-dev or libgd2-noxpm-dev should to the trick.
On my Natty box, I need the xpm version - the noxpm version forces
an uninstall of other things.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department
On Sun, 2011-05-01 at 14:33 +0200, Markus Hitter wrote:
Am 01.05.2011 um 03:18 schrieb Peter Clifton:
As a feature request which came from that discussion, it seems that it
might be nice to provide the option of special casing the handling of
outline layers.
The expected convention
it.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally signed
On Sun, 2011-05-01 at 22:16 +0100, Peter Clifton wrote:
On Sun, 2011-05-01 at 22:55 +0200, Felix Ruoff wrote:
Hello!
Since commit e323e4636ef7b7239003a41ba305221bc6d9bab1 'hid/gtk:
Invalidate the damaged region, not the whole view' there is an error on
moving selected objects
quite keen to see John Dotty's suggestion (or a variant of it)
implemented though.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328
-structures and
APIs they use).
The scope we are working on is everything which can be built and tested
from PCB's build system. We can't commit to providing patches for
external plugins or patch series.
Best regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department
. (One polygon per board). The gcode
exporter then produced output suitable for cutting the boards out (using
EMC2 to handle the tool offset etc..).
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3
On Sat, 2011-04-23 at 21:56 +1000, Geoff Swan wrote:
pcjc2/pcb+gl_experimental confirmed
Now fixed in git HEAD.. I'm just rebasing the pcb+gl branches now.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally signed
towards a slightly
different rendering API, general fixes.
For preference, if you can avoid pull and merge, but rebase patches,
that would probably make for a cleaner and easier to review diff set.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9
).
It might be worth trying to revert the GTK it builds against to 2.16.x
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab
=70786c0c18c8d2c4626d429068e88a4601a21d6d
Perhaps this was applied after the last release. (Sorry, no time to
check right now!)
You might have more luck building git HEAD PCB?
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0
.
That's not a very compelling criterion; on my spanish keyboard:
People put up with / in UNIX paths, so I think it will do for gEDA as
well ;)
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729
)
For a development release, you would need to run ./autogen.sh or
autoreconf in the pixman source dir to generate ./configure
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal
.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally
installed versions
into one path would also help.
Finally, since the stable release and devel release have different SO
versions for libgeda, the library is in principle co-installable, but
the shared scheme code etc.. won't be.
--
Peter Clifton
Electrical Engineering Division,
Engineering
On Thu, 2011-04-14 at 09:22 -0700, Colin D Bennett wrote:
On Thu, 14 Apr 2011 08:59:06 +0100
Peter Clifton pc...@cam.ac.uk wrote:
Beware that pcb and geda only play nice when installed into the same
prefix, so you will want to install PCB into both places you install
gEDA. Perhaps some
value attribute to 100R#
(Where X1, X2, R1 are id names. These might default from refdes=
attributes where they are unique, and belong to a complex).
Note that id attributes in CSS are explicitly unique, whereas our
refdes= attributes historically are not required to be.
--
Peter Clifton
; }
That is ancestory. It would also match P/foo/bar/EM/
If you want just P/EM, you need:
P EM { background: yellow; }
or
PEM { background: yellow; }
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
On Wed, 2011-04-13 at 22:26 +0100, Peter Clifton wrote:
pin[pinnumber=1] {
pinnumber=99;
}
And regarding stuff like the above - where we key off one attribute and
change it in the rule, IF that is ever legal - we should do it like a
PLC executes its processing cycles.
Freeze a view
.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally
On Mon, 2011-04-11 at 23:54 -0700, Russell Dill wrote:
On Mon, Apr 11, 2011 at 6:45 PM, John Doty j...@noqsi.com wrote:
On Apr 11, 2011, at 4:25 PM, Peter Clifton wrote:
I would advise a note of caution. In general, I don't like it when tools
start special casing things like
On Tue, 2011-04-12 at 22:35 +0200, Krzysztof Kościuszkiewicz wrote:
On Mon, Apr 11, 2011 at 11:25:19PM +0100, Peter Clifton wrote:
What about the cases where this is a mistake? The net= attribute was
supposed to refer to some implicit power pin - not the device's one
symbolic pin
cares about really.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
;)
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally signed
- I have a branch lurking about which emits SVG onto the clipboard
when copy+pasting within gschem. That lets you paste from gschem
straight into Inkscape. The net and pin end-cues aren't quite right with
it though.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department
On Mon, 2011-04-11 at 08:18 +0200, Stephan Boettcher wrote:
Peter Clifton pc...@cam.ac.uk writes:
Is it really the layer order, or the group order that PCB+GL or Ben-mode
uses?
The group numbering - and I don't see any reason why we can't stipulate
that is the rendering sequence.
--
Peter
preferred) PDF. I'm
getting used to the amazing ease with which tools like Inkscape can open
PS and PDF files, then edit them as vector graphics.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0
preferred) PDF. I'm
getting used to the amazing ease with which tools like Inkscape can open
PS and PDF files, then edit them as vector graphics.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0
On Mon, 2011-04-11 at 20:55 +0200, Kai-Martin Knaak wrote:
Peter Clifton wrote:
What excuse is there for OpenOffice / LibreOffice being so appallingly
bad at working with SVG files?
Actually, SVG import is among the first features of libreoffice beyond
openoffice:
http
. If
there is any time you're going to be around in Cambridge anyway, please
let me know.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328
files for pasting into OpenOffice (from gschem's
clipboard). I can't recall what it failed to convert properly, but it
was something ;).
Each converter I tried to get into OpenOffice messed something up.
Usually it was related to text handling.
--
Peter Clifton
Electrical Engineering Division
whether power rail symbols transfer a name to nets
they are attached to.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab
useless for that.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
in
copper. That means we need to act intelligently if something adds those.
Supporting complex geometry primitives which SVG would bring also means
internal processing in PCB might get more difficult.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge
.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description: This is a digitally signed
that PCB will not track the connectivity of the remaining
pieces properly, and this can lead to all manner of badness.
My pours branch attempts to address this, but as I started it before I
knew of the fullpoly flag, I've not yet made the changes in behaviour
conditional on that flag.
--
Peter Clifton
On Sun, 2011-04-03 at 10:09 -0700, Ben Jackson wrote:
On Sun, Apr 03, 2011 at 05:54:36PM +0100, Peter Clifton wrote:
i recently got a nintendo 3ds, and really enjoying the 3d of the games
but my issue is because i can only use my right hand, using the
controller is difficult. i'm
of action - is it
press-able, or a multi-axis in some way?
Any pointers would be appreciated so I can pass them on.
Best wishes,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173
copy a component with a refdes already set.
You hook it up with this in your gschemrc:
(load-from-path /home/pcjc2/.gEDA/unnumber-refdes.scm)
(add-hook! copy-component-hook unnumber-refdes)
Best regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University
On Tue, 2011-03-29 at 20:30 -0700, A.Burinskiy wrote:
Dear gEDA community,
I publish program on sourceforge.org that displays ngspice raw files.
Project name is zview. Appreciate any feedback.
Do you have a link, or screenshots?
--
Peter Clifton
Electrical Engineering Division
the source code is the only way
to be sure, but I am not even sure what to suggest looking for off the
top of my head.
I'm hoping someone who knows the guile integration better than I do will
chime in.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9
a small program against libgeda to do
what you want, but you'd have to give me more information about what the
logic of your processing steps are to make any more solid a suggestion.
Regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ
On Tue, 2011-03-29 at 13:18 +0200, John Erlandsson wrote:
Hello!
Thanks for taking an interest!
I attached two schematics that illustrates what i want.
Could you run them through gschlas -e ... to embed the symbols used,
or attach the missing symbols?
--
Peter Clifton
Electrical
regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
signature.asc
Description
if I can purchase from someplace in the US.
FWIW, the people behind Balloon (whilst using Altium for the core
design), are very supportive of gEDA and the idea that designs around
the Balloon platform should use open EDA tools where possible.
--
Peter Clifton
Electrical Engineering Division
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