gEDA-user: Please check for artaefacts in git HEAD PCB

now it had the luxury of changing code in such a way which broke the other rendering models. To push it upstream it will have to learn to play nice. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel

Re: gEDA-user: xgsch2pcb couldn't find pcb gsch2pcb executables

with the PCB paths configured at build time. Configure gEDA with: ./configure . --with-pcb-datadir=/opt/pcb-20100929 Personally, I still all gEDA stuff under a geda prefix, and find everything just works nicely. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department

Re: gEDA-user: Viewing .art files in gerbv?

...@lists.sourceforge.net (Probably requires a sign-up to post.) They are good at fixing bug reports reported through their sourceforge bug tracker too. If you don't get an answer here, please try one of the above. I'm not sure how many gerbv developers are active on geda-user. -- Peter Clifton Electrical

Re: gEDA-user: [PATCH] Drag without selection in gschem

On Mon, 2011-03-21 at 22:56 +, Peter Clifton wrote: I was watching some students using gschem the other week, and noticed them struggling to move objects due to the fact they had to select them first. I wrote a patch which lets a drag action operate on whatever is under the mouse

Re: gEDA-user: gEDA/PCB to Protel Ascii file format

expecting to find in the process. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: gEDA/PCB to Protel Ascii file format

ODB++ is increasingly popular amongst the serious fabs. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask

Re: gEDA-user: gEDA/PCB to Protel Ascii file format

work. Once the binary container is unpacked, there are still the internal binary records to decode, but it is definitely possible. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173

Re: gEDA-user: [PATCH] Drag without selection in gschem

some clean-up to.. so it would probably not apply easily against anything else. Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared

Re: gEDA-user: subcircuit definition and channelised design

a symbol which represents all the channels (in a hierarchical design), then wire that into the schematic. If we supported buses properly, this could even be done with bus pins - but we don't at present. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department

Re: gEDA-user: PCB git bug

by a line segment which doesn't have the required clearance set on it, even though it is not shorting against anything else (perhaps because planes are cleared away by other objects with bigger clearances). Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department

Re: gEDA-user: subcircuit definition and channelised design

, and relies upon named nets. (I vaguely recall that Altium buses can work like this too if you want) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0

gEDA-user: [PATCH] Drag without selection in gschem

of the code suggests.). I think we ought to fix that. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask

Re: gEDA-user: How to fill a circle when making symbols in gschem?

On Sun, 2011-03-20 at 10:17 -0400, Rob Butts wrote: I have a small circle in a symbol that I would like to fill in green and make a dot. How do I do this? Make a circle, then use ef or Edit - Fill type, then select fill type Filled. -- Peter Clifton Electrical Engineering Division

Re: gEDA-user: PCB layer button colors

engine in use? (Sorry, I don't know how to do that for GTK in KDE). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone

Re: gEDA-user: PCB very slow on new laptop

integrated graphics just isn't very powerful, but it does sound like you're seeing a bug rather than just a limit of the hardware. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173

Re: gEDA-user: PCB very slow on new laptop

On Sun, 2011-03-13 at 12:42 +, Peter Clifton wrote: On Sun, 2011-03-13 at 09:34 +, Thomas Oldbury wrote: I'll have to figure out how to do that. It does has 4 GB system memory though, don't know how much video RAM it will allocate. With anything reasonably recent

Re: gEDA-user: Google Summer of Code 2011

- but I expect it is not too hard either way. SVG does of course support a lot of things which RS-274X cannot though. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal

Re: gEDA-user: Advanced grids in GTK Pcb

or circuit. IMHO, this downside outweighs the benefit of bindings compatible to other applications. BTW, Peter Clifton has this defined in his localized branch of pcb+gl. I eventually decided I prefer consistency with the rest of my desktop, so changed it in my local_customisation_

Re: gEDA-user: Advanced grids in GTK Pcb

people will let me get away with pushing my personal preference into git HEAD! I'll keep patching my local build. ;) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal

Re: gEDA-user: gEDA and PCB with tablet.

at the moment. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: compile of plugins fails

. . . Oops - still, I think the change is a good one, even if it requires some minor patching to plugins. A quick hack would be to add: #define max_layer max_copper_layer In the plugin - rather than worry too much about which lines should be max_copper_layer and which max_group. -- Peter Clifton

Re: gEDA-user: pcb plugin smartdisperse fails on load

refactoring like this. Replace the MyCalloc call with calloc. For reference: commit 0c62fca0df9bd9ebe7bedfbee0af3502e4298a42 Author: Peter Clifton pc...@cam.ac.uk Date: Tue Dec 7 01:47:28 2010 + Remove My* memory allocation routines. Just use the standard APIs directly This means

Re: gEDA-user: pcb plugin smartdisperse fails on load

On Wed, 2011-02-23 at 21:52 -0500, DJ Delorie wrote: Changelog says... nothing! :-P Don't we auto generate that on release from the git history? (Too busy to check right now!) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson

Re: gEDA-user: pcb plugin smartdisperse fails on load

, and means for plugins to load (or fail to load) based upon compatibility with a given version. Whilst I hate the idea - providing some headers which allow conditional compilation of code depending on PCB version might be necessary for some changes. E.g. the max_layer split. -- Peter Clifton

Re: gEDA-user: PCB: DRC does not correctly check pad clearance

pair of eyes looking at the changes, that is fine, and I hope someone will have the time to give it a look. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal

Re: gEDA-user: pcb plugin smartdisperse fails on load

. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed

Re: gEDA-user: pcb plugin smartdisperse fails on load

On Thu, 2011-02-24 at 08:38 -0700, John Doty wrote: On Feb 24, 2011, at 8:22 AM, Peter Clifton wrote: Means C didn't find the function, and it assumes it returns integer in that case. Dumb convention IMO. C is quirky, flawed, and an enormous success. - Dennis M. Ritchie. True.. very

Re: gEDA-user: pcb plugin smartdisperse fails on load

. (gEDA and PCB included ;)). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: pcb plugin smartdisperse fails on load

On Thu, 2011-02-24 at 10:32 -0800, Ben Jackson wrote: On Thu, Feb 24, 2011 at 03:28:10PM +, Peter Clifton wrote: I think if we continue with plugins the way we do, we need some API to advertise an API version, and means for plugins to load (or fail to load) based upon compatibility

Re: gEDA-user: pcb plugin smartdisperse fails on load

even teach PCB how to invoke the compiler and build plugins if we were feeling over-keen! (But perhaps that is encroaching on being too clever). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0

Re: gEDA-user: General Layers questions

else should IMO be by done by tagging objects. I guess we could define keep-out layer(s) which could associate with one or more physical layers. That would be a possible use-case for having grouped sub-layers, but even then I wonder if the grouping is causing limitation of flexibility. -- Peter

Re: gEDA-user: What stops PCB autorouter/toporouter from working right?

source code build without warnings on C, and build with warnings on C++. I do wish people would test their refactoring patches... -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173

Re: gEDA-user: What stops PCB autorouter/toporouter from working right?

changes to the autorouter though, so a cursory check to ensure it still worked would have been nice. Btw.. the problem was fairly trivial and I just pushed a fix. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3

Re: gEDA-user: What stops PCB autorouter/toporouter from working right?

reproduce the bug using the LED example in the sources, and it took about 20 minutes of bisecting (I started way back), to find the commit. Total fix time was about 30 mins after I sat down to look at the problem. -- Peter Clifton Electrical Engineering Division, Engineering Department, University

Re: gEDA-user: pcb GTK tear-off menus don't respond to mouse clicks

On Wed, 2011-02-23 at 09:30 -0800, Colin D Bennett wrote: On Wed, 23 Feb 2011 05:21:51 +0100 Kai-Martin Knaak kn...@iqo.uni-hannover.de wrote: Peter Clifton wrote: I can reproduce the bug, but only for the torn-off menus themselves. sub-menus of a torn off menu work correctly

Re: gEDA-user: What stops PCB autorouter/toporouter from working right?

the design file for me to investigate? -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: pcb commands to automatically select, cut, rotate, and paste elements

using the command line tool dbus-send -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me

Re: gEDA-user: Metric, Imperial, Rounding, DRC, and board houses

? Time to change the board house? Steven is American... and I'd imagine board houses in the US are likely to be the last to abandon imperial units. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel

Re: gEDA-user: Snap to grid preventing selecting/dragging text

types, or whether GDK processes simple events based on the server timestamp and then synthesises the appropriate internal events. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173

Re: gEDA-user: pcb GTK tear-off menus don't respond to mouse clicks

tear off menus? Can anyone confirm PCB works with some old version of GTK? If it is GTK at fault, we need to isolate the version where it stopped working. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA

Re: gEDA-user: polygon regression in pcb+gl

On Sun, 2011-02-20 at 10:36 +0100, Karl Hammar wrote: Peter Clifton: ... generate, and setup .ssh/config with these lines: Host git.gpleda.org Port 5022 RSAAuthentication yes IdentityFile ~/.ssh/keys/id_rsa.gpleda.org ... Don't you know that protocol version

Re: gEDA-user: polygon regression in pcb+gl

On Sun, 2011-02-20 at 13:28 +0100, Stephan Boettcher wrote: Peter Clifton pc...@cam.ac.uk writes: id_rsa is a version 2 key. The RSAAuthentication may be used for version 1 only, but that does not mean specifying it makes ssh to use version 1. Do ssh -v git.gpleda.org to see which

Re: gEDA-user: polygon regression in pcb+gl

. The default is “yes”. This option applies to protocol version 1 only. I'll change it to no, but I presume it is unimportant because we also specify the use of protocol 2. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson

Re: gEDA-user: polygon regression in pcb+gl

-writing the code repeatedly, and I chose to use stgit instead. That's all I have to say except to end with thanks to Peter Clifton for creating and maintaining the pcb+gl branch, and I hope it goes to mainline soon. Me to - thanks for the positive comments. -- Peter Clifton Electrical

Re: gEDA-user: polygon regression in pcb+gl

is the major change... and other edits don't seem to be a problem). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab

Re: gEDA-user: polygon regression in pcb+gl

] url = ssh://g...@git.gpleda.org/pcb.git push = for_master:master Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223

gEDA-user: No user servicable parts?

-philips.html I was repairing a Philips HF3490 Wakeup light which showed symptoms of stuck button, and generally nutty behaviour. Violence to encourage the button to unstick (actually an electrical problem I think), finally killed its failing lamp, so I replaced that too. -- Peter Clifton Electrical

Re: gEDA-user: General Layers questions

make that possible). Fallback to polygons could always work I guess. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab

Re: gEDA-user: General Layers questions

. Best wishes. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description

Re: gEDA-user: General Layers questions

. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally

Re: gEDA-user: Open Collector Error Checking

-tested or something? We should probably set up a team as a place-holder to get assigned as a job-list for patches which are ready to be pushed. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0

gEDA-user: Best use of my time? [WAS: Re: Open Collector Error Checking]

. FWIW... one of the work projects I'm doing at the moment will hopefully benefit gEDA and PCB. I hope to be able to talk more about that if and when the details of the project. are sorted out. Best regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University

Re: gEDA-user: How to make a mask similar to soldermask (not containing any via circles)

of question is: hack pcb. Sorry. I'm not sure if the code would ignore the vias if you put the polygon on an outline or route layer. If not, it wouldn't be a problem to hack that functionality up quickly. Give me a shout if you need a hand. I might be able to help. -- Peter Clifton Electrical

Re: gEDA-user: Advanced grids in GTK Pcb

before. I like the look of that. I'm always happy to test code if people point me at their patches or git repository. Seems like a nice feature to have in PCB. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3

Re: gEDA-user: vertical toolbox in gschem

it a vertical menu bar is not possible to configure in the gschemrc file? No. For building from source, see: http://geda.seul.org/wiki/geda:scm#get_a_copy_of_geda_gaf_git_repository and http://geda.seul.org/wiki/geda:gaf_building_git_version -- Peter Clifton Electrical Engineering Division

Re: gEDA-user: New Column: From the CAD Library

grid internally, parts defined in whatever units the vendor's controlling dimensions are in. This might require relative origins to be used between the part design coordinate and the board's snap-grid, but that seems to be mandated by various IPC standards anyway. -- Peter Clifton Electrical

Re: gEDA-user: locknames - ignorenames ?

probably be a toggle item. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: New Column: From the CAD Library

, but if the user were to copy+paste part of that new (rounded) footprint using an imperial grid, to make a longer part - rounding errors could easily be compounded. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA

Re: gEDA-user: vertical toolbox in gschem

source. Do you install gEDA from RPMs? -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me

Re: gEDA-user: Soldering iron tip turns black

. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally

Re: gEDA-user: New Column: From the CAD Library

. It is VERY good, and contains a lot of details I was looking for recently. http://blogs.mentor.com/tom-hausherr/ -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab

Re: gEDA-user: Soldering iron tip turns black

), intended for lead free applications, but they work just fine on Leaded. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab

Re: gEDA-user: Another free schematic/PCB tool

On Fri, 2011-02-04 at 13:07 +, Andy Fierman wrote: * Sorry, I can't remember who. John Luciani. I think.. http://www.luciani.org/index.html He has a lot of nice footprints available there. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge

Re: gEDA-user: Soldering iron tip turns black

-aggressive flux) to the tip. Probably others will be able to provide better pointers ;). (And will point out if I have made any errors in mine). Good luck! -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA

Re: gEDA-user: Thermals on Pads

against drill breakout. Since this could get complex quickly - I wonder if we ought to at this stage start doing these by reference.. include the thermal design ONCE, and reference it by name on pads which use it. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering

Re: gEDA-user: Thermals on Pads

net separately - 4 terminal current sensing springs to mind, where big polygons might make up the power traces. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal

Re: gEDA-user: Alternate Platforms

with PCBs on a Cintiq would be awesome... send me one and we'll see ;) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone

Re: gEDA-user: PCB bug: only names, draw a line, undo: segfault

to luck. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description

Re: gEDA-user: PCB bug: only names, draw a line, undo: segfault

was able to reproduce with Only names switched off when I started line-drawing, but switched it on mid-way, before I hit undo. A cursory glance didn't suggest what might be wrong yet.. please file a bug at: http://launchpad.net/pcb/+filebug -- Peter Clifton Electrical Engineering Division

Re: gEDA-user: Alternate Platforms

On Sun, 2011-01-30 at 09:37 -0500, Bob Paddock wrote: On Sun, Jan 30, 2011 at 9:12 AM, Peter Clifton pc...@cam.ac.uk wrote: Perhaps I'm being short-sighted, but I don't see a great potential for serious EDA work on phone sized devices. Even if they get the screen-resolution high enough

Re: gEDA-user: PCB bug: only names, draw a line, undo: segfault

.. but it does tend to get lost or forgotten. (At least the bug trackers is a nice structured place for us to forget bugs ;)). If you decided you did want to sign up to help, try visiting here before that other URL: https://login.launchpad.net/ -- Peter Clifton Electrical Engineering Division, Engineering

Re: gEDA-user: Thermals on Pads

. That is the problem I'm hitting now. Harry's clipper branch (a long time ago) without comment, changed the thermal generation formulas in (IMO, a retrograde way). I can't change it back (or fix the geometry calculation) for fear of possibly breaking all the users who have made boards since then. -- Peter

Re: gEDA-user: Thermals on Pads

On Sun, 2011-01-30 at 20:39 +, Peter Clifton wrote: I've been looking at some brokenness with our normal thermal shape generation recently, so if I get a chance I could look at your patch - and possibly work from it. The only reference to geometry I've found so far is: http

Re: gEDA-user: Thermals on Pads

to overlap and cause polygon problems. At some geometries, the general shape is wrong - we need to restrict some of the dimensioning to keep the thermal shape valid, or add routines for a different thermal shape in these cases. -- Peter Clifton Electrical Engineering Division, Engineering

Re: gEDA-user: going multi core

many you have. So no, don't expect a big speed up. Your X11 server will have a whole other core to run in if things get taxing. In any case, we are doing something wrong if gschem is consuming 100% CPU on one core, and X11 is doing similar! -- Peter Clifton Electrical Engineering Division

Re: gEDA-user: Soldering minute smt

). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally

Re: gEDA-user: Visual cue of zero length pin endpoint

doesn't result in a forest of red. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc

Re: gEDA-user: gschem: directly connecting two nets?

/ return path is used for signals. Regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me

Re: gEDA-user: gschem: directly connecting two nets?

could still provide distinct colouring if that was useful to people. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab

Re: gEDA-user: gschem: directly connecting two nets?

? Perhaps I was going a bit far to suggest full DRC for the actual antenna design. What I really meant was not loosing information for net connectivity checking leading up the antenna. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson

Re: gEDA-user: Visual cue of zero length pin endpoint

make. Perhaps it would help pinpoint a small number of errors at low zoom though. I'm afraid this might have to fall into the category of patches welcome. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel

Re: gEDA-user: gschem: directly connecting two nets?

: Computing current density for thermal reasons for a PCB trace. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab

Re: gEDA-user: Fluky Fluky layout printing problem!

(the one you want to change) from the board, save, then re-run gsch2pcb or whatever import process you use. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel

Re: gEDA-user: OT - Joystick control of stepper or servo motors

On Tue, 2011-01-25 at 10:16 +0900, John Doty wrote: On Jan 25, 2011, at 9:53 AM, Peter Clifton wrote: How much does the Armadeus board cost? The embedded board itself is 118,00€ (full version). It's designed to be a mezzanine atop your project's main board. Of course, when starting, one

Re: gEDA-user: Do sub sheet symbol pins need pinseq?

is required for those.. to correspond to the refdes= of the IO pin in the hierarchy sub-sheet. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0

Re: gEDA-user: gsch2pcb bug with '-' in filenames fixed

stable. ^ They release new ones of those? I thought that was a one-off event ;) I'm not sure this would qualify for back-port to 1.6.x anyway... but if we had enough testers, perhaps.. If not, 1.8.x is a way in the future yet. -- Peter Clifton Electrical Engineering Division, Engineering

Re: gEDA-user: OT - Joystick control of stepper or servo motors

involved. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description

Re: gEDA-user: Visual cue of zero length pin endpoint

consider whether this is a problem or not, and if so - what do do about it! On cursory inspection, adding preferred net orientation could require a file-format bump to do flexibly. A heuristic could be imagined, but it won't be as easy to get right as it first sounds. -- Peter Clifton

Re: gEDA-user: Visual cue of zero length pin endpoint

the consensus is that there is no harm in allowing them, we're just figuring out the implications for how to draw them properly, and how it affects other things. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel

Re: gEDA-user: Strange gsch2pcb error

On Thu, 2011-01-20 at 22:39 -0500, Ben Gamari wrote: On Fri, 21 Jan 2011 01:07:23 +, Peter Clifton pc...@cam.ac.uk wrote: Error sounded like it might be a classic: Don't put - in footprint names Ahhh. That would explain it. Those packages came from http://www.luciani.org/geda/pcb

Re: gEDA-user: git based wiki

, and for cases where it still has to make you wait whilst load data, the fact it keeps most of the page whilst it updates the content makes it feel faster. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44

Re: gEDA-user: git based wiki

- but the whole page is reloaded. I was talking about this kind of thing: https://github.com/github/gollum Click on the bin directory, for example. Then gollum. The content is loaded by Javascript, and zapped in from the side. The whole page is never refreshed. -- Peter Clifton Electrical Engineering

Re: gEDA-user: Fluky Fluky layout printing problem!

and / or .pdf versions of the board? It rather sounds like a bug with your PDF viewer's print facility, but we can take a look and make sure we're not emitting silly post-script which triggers it. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ

Re: gEDA-user: Fluky Fluky layout printing problem!

On Fri, 2011-01-21 at 14:12 -0500, Rob Butts wrote: Try converting this very simple file to pdf and printing that - do the pads print? -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729

Re: gEDA-user: Fluky Fluky layout printing problem!

{ moveto lineto stroke } bind def 11000 setlinewidth 2 setlinecap 2 setlinejoin 6100 19700 6108 19700 t 47392 19700 47400 19700 t showpage Just in case the bug is in ps2pdf, I've attached my conversion (also using ps2pdf) -- Peter Clifton Electrical Engineering Division, Engineering Department

Re: gEDA-user: git based wiki

or not, but see here: https://github.com/blog/760-the-tree-slider -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask

Re: gEDA-user: Embedded polygon

as if you were drawing a polygon. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me

Re: gEDA-user: Strange gsch2pcb error

://goldnerlab.physics.umass.edu/beagle-daq Don't forget to unmask the soldermask for your mounting holes vias. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0

Re: gEDA-user: Strange gsch2pcb error

.sym] WARNING: Found a placeholder/missing component, are you missing a symbol file? [tps7a4901.sym] WARNING: Found a placeholder/missing component, are you missing a symbol file? [txb0108.sym] -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ

Re: gEDA-user: Strange gsch2pcb error

with it (I think), if you don't use any (actual) M4 symbols, and you pass the --skip-m4 option to gnetlist, or put skip-m4 inside the project file. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44

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