On Monday 12 September 2011, Hannu Vuolasaho wrote:
Is it possible to do same thing? Input wav to simulator and
get speaker's output and hear it? I know it's not perfect
but it could be very helpful. Has someone done this before
and provide some hints, examples or links?
If you can do some
On Monday 16 May 2011, Steven Michalske wrote:
But lawyers can use that clause as a loophole to invalidate
legitimate patents.
Minor side effect of lawyers can use that clause as a loophole
to invalidate ILLegitimate patents ... which outnumber the
ligitimate ones a million to one.
On Monday 18 April 2011, yamazakir2 wrote:
Does anybody have a nice and simple zener diode model they
would like to share? The model that I am using has trouble
with convergence in context of a complicated switching
circuit with ngspice.
have you tried gnucap?
You will need the spice-diode
On Saturday 16 April 2011, Levente Kovacs wrote:
I want to simulate my low pass filters. So far, I managed to
have my theoretical results.
Now I want to know the currents of the capacitors vs. the
frequency.
I remember that the best way is to put 0V voltage sources in
series of the
On Fri, 2011-01-14 at 21:14 -0500, al davis wrote:
I don't know where that is done, or if it is done
in a form that would be useful here, or whether there
exists the code to go the other way (generate a schematic
given a netlist and rendering info) which is equally
needed
On Monday 17 January 2011, John Doty wrote:
I'm unhappy with tuning gschem/gnetlist to be especially
friendly to any specific downstream flow. Al's favorite
downstream tool is apparently Verilog, so that seems to be
what he wants to target, with every other flow having to
adapt.
I'm unhappy
On Monday 17 January 2011, Stephan Boettcher wrote:
al davis ad...@freeelectron.net writes:
How about prefixing simulation attributes with a dot.
No, please, use a proper namespace prefix, like
spice- verilog- sim-
spice: verilog: sim:
Backend namespaces, use namespaces
On Sunday 16 January 2011, John Griessen wrote:
On 01/15/2011 10:36 PM, al davis wrote:
Unless I massively missed something, verilog is completely
procedural.
Really verilog is all in parallel, not procedural code,
unless you want to put some in with special features that
are trickier
It's well past time to realize that there is more to simulation
than Spice. A schematic should be able to be used with a
variety of simulators, and the netlister should take care of
the differences.
Symbols should not have anything specific to any output format.
This is difficult
On Saturday 15 January 2011, Kai-Martin Knaak wrote:
I looked at lang_verilog_in.cc
Unfortunately, my c++ is not fluent enough to read the code
right away. This is aggravated by the lack of comments on
what the various code blocks do. Since I also don't know
verilog by heart, the whole file
On Saturday 15 January 2011, Kai-Martin Knaak wrote:
I don't see how this could possibly work. Both, gschem and
altium contain a graphical representation of the circuit.
Unless I massively missed something, verilog is completely
procedural. Graphics information would be lost during the
On Friday 14 January 2011, Peter Clifton wrote:
On Thu, 2011-01-13 at 19:41 -0500, al davis wrote:
On Jan 12, 2011, at 11:29 AM, al davis wrote:
That's great. There is a long list of things that need to
be done. Where do you want to start?
My preference is to start
On Friday 14 January 2011, Kai-Martin Knaak wrote:
Peter Clifton wrote:
No. David Bisset wrote, on another list. Peter just passed it
on to us.
It is intended that these will be published in Altium
format as that is the CAD package of choice for the
design process.
Why not geda in
On Jan 14, 2011, at 6:32 AM, Peter Clifton wrote:
Ideally (to be forward compatible with format changes),
that plugin would use libgeda. If someone starts on this,
please let us know via the lists + bug tracker (
https://launchpad.net/geda/+bugs ) if you find any API
which is lacking.
On Jan 12, 2011, at 11:29 AM, al davis wrote:
Both of these are areas where we could take the lead, but I
need help to do that. I can't do it alone, and can't do
it if people are fighting it. Does anyone want to help?
On Wednesday 12 January 2011, Edward Hennessy wrote:
I would like
Dietmar Schmunkamp wrote:
Start a design with gschem -- simulate it -- get it thru
pcb -- extract physical paramaters from the layout --
OPTIMIZE* -- feedback to gschem -- restart the loop.
On Friday 07 January 2011, Kai-Martin Knaak wrote:
Unfortunately, at the current state of geda and
On Monday 03 January 2011, Dan White wrote:
The Analog Rails tweaks to gnucap make parallel simulations
with hspice feasible from a common *.sch set. Their repo is
at
http://redmine.gnucapplus.org/
I could use some help with gnucap development.
I have asked Analog Rails to officially
On Saturday 25 December 2010, Vanessa Ezekowitz wrote:
* If the part in question can usually be described by a
single value, for the purposes of the signal flow in the
schematic that is, then give it a default of value=0.
No. Zero is almost always wrong. The only sensible default
value in
On Friday 17 December 2010, Thomas D. Dean wrote:
I have a schematic with seven instances of a schematic, a
hierarchy.
I want to give different values to the resistors in each of
the sub-circuits.
For example, I have S1 thru S7. In S1, I want R1=100, in S2,
I want R1=1k, etc.
Is this
On Wednesday 15 December 2010, timecop wrote:
Funny you mention that, this email reads perfectly fine in my
closed-source email reader.
Of course it does. You are using the same closed-source email
reader as Andrew does. Now, how about a different closed-source
email reader, like the one
On Wednesday 15 December 2010, Michael Sokolov wrote:
... by way of standard open source mailing list managers
detecting and automatically rejecting posts encoded in
base64.
Just because Eudora on Windows can't cope with it?
___
geda-user mailing
On Friday 10 December 2010, kai-martin knaak wrote:
al davis wrote:
In gnucap, I always give contributors top priority, but if
a patch comes in without advance discussion, often there
is something wrong with it.
Well, my three trials to contribute were the opposite of
out-of-the-blue
On Sunday 21 November 2010, Paul Tan wrote:
Since most Verilog simulators (including Icarus Verilog)
support EXPLICIT connection method for the lower level
Module Instanciations, so it is not absolutely necessary
(although desirable) to match the Module portname order
with the Module
On Sunday 31 October 2010, Stefan Salewski wrote:
Can you please explain why we will always need the command
line for simulation in gEDA? (I have newer found the time
doing simulations...)
Try this without a command line:
Experimentally finding model parameters:
On Sunday 24 October 2010, Hannu Vuolasaho wrote:
Changing manually to X1 makes the simulation work but it
isn't really the Solution.
Yes, it is the solution, for now. Ultimately, the solution is
to move away from Spice format netlists.
In Spice, the device type is determined by the first
On Sunday 24 October 2010, c...@eugeneweb.com wrote:
I sapose that you could pass an argument to gnet-spice-sdb
(or set a variable) to clue it in on which spice variant to
target.
You could go nuts with that. The only real standard in spice is
back in the spice-2 days. Then they all
On Tuesday 21 September 2010, Rubén Gómez Antolí wrote:
Gnucap 2009.12 is so stable, why not released?
(In several days, I think even ask at debian maintainer to
include snapshots, at least, in experimental branch of
Debian.)
The problem is with the build system.
I spent most of January
On Tuesday 21 September 2010, Chris Cole wrote:
I get a normal sine wave output,
but when the frequency increases, the wave changes
considerably and starts to turn into a triangle wave...I'm
not sure what I'm doing wrong, but this is strange.
In the tran command (tran 10m 10 1) you asked it
On Tuesday 21 September 2010, Matthew Wilkins wrote:
You're specifying a 10 ms step size (first parameter in the
tran command), and it looks like that's what you're
getting. The period of a 60 Hz sine wave is 16.6 ms, so
you're getting fewer than 2 samples per cycle. Try changing
the step
On Tuesday 21 September 2010, Matthew Wilkins wrote:
It seems like the values that he gave (10m 10 1) could be
interpreted either way, but in the plot image it shows
about 15 data points between the times 4.9219 and
5.0781. That seems to correspond to 10 ms times steps, no?
Could be ...
one
On Friday 17 September 2010, Chris Cole wrote:
I'm trying to do a very simple power supply simulation with
gschem and I'm not getting very far.
I'm trying to do a bridge rectification of a 24 VAC supply to
DC current. I'm able to do a transient analysis for 10
iterations before I get:
On Tuesday 17 August 2010, kai-martin knaak wrote:
I tend to do simulation with ltspice.
You have said many times how much you love LTspice, and how much
you dislike the gEDA environment for simulation.
How about stepping forward to do something about it?
I have asked many times over many
On Wednesday 18 August 2010, Oliver King-Smith wrote:
I am under the probably incorrect impression that LtSpice is
actually a better than ngspice and gnucap. What do you
think the benefits are gnucap vs Ltspice?
Better for what?
You got that impression because somebody is promoting it and
On Wednesday 18 August 2010, kai-martin knaak wrote:
You have said many times how much you love LTspice,
No I did not. I said, that I use it because using gnucap or
ngspice with gschem is such a hassle. When I last looked into
it, it took me much more time to get results with
gschem/gnucap
On Wednesday 18 August 2010, John Doty wrote:
Exactly what is the problem you experience?
1. There are many components that do not netlist properly.
Every symbol must netlist correctly, no exceptions. There is
more to simulation than simple spice circuits.
2. There are others that netlist
On Wednesday 18 August 2010, John Doty wrote:
Then go ahead and explain it in a single breath. And how does
this force you to hack the netlist?
I don't want an argument. I want help making it better.
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On Saturday 14 August 2010, Armin Faltl wrote:
I think I have the following options then:
a) fix the bug myself and reinvent your convenience function
which is questionable
b) re-release my library under LGPL and ask you to resubmit
the patch with same license
c) open source or shred my
On Friday 13 August 2010, Kai-Martin Knaak wrote:
can you give an example, please?
Under GPL-3 you can't make a contribution that applies one of
your own patents, then sue the users of the package for patent
infringement.
___
geda-user mailing
On Sunday 01 August 2010, Oliver King-Smith wrote:
I have some analog circuits in gschem that I want to layout
in the magic vlsi tool. Is there a good way to go from
gschem to magic?
Not that I know of. It is a rather difficult task to program.
Magic is really a very simple chip layout
On Tuesday 03 August 2010, Bill Gray wrote:
To keep things as simple as possible, I am trying to simulate
a voltage follower using an LM358 opamp. So far, I have
been met only with abject failure, and my ability to
continue investing time at this rate is waning... I have to
get this project
On Thursday 08 July 2010, joshua wojnas wrote:
anyone import into pcb a kicad netlist? I have kicad
schematics and modules for all my parts but want to use the
topo autorouter in pcb
Not that I know of, for now, but I want to take the opportunity
to ask for help on a project that could
On Friday 09 July 2010, kai-martin knaak wrote:
So ... any volunteers?
What programming language?
C++
Can you provide links to the source of existing plugins?
Gnucap source, the latest development snapshot.
http://www.gnucap.org/devel/gnucap-2009-12-07.tar.gz
There's also some
On Friday 09 July 2010, al davis wrote:
Can you provide links to the source of existing plugins?
Gnucap source, the latest development snapshot.
http://www.gnucap.org/devel/gnucap-2009-12-07.tar.gz
Forgot something ...
The existing plugins are lang_*.cc .
One file each.
so
On Wednesday 16 June 2010, Rubén Gómez Antolí wrote:
I have a signal with harmonics and distorsion and I want to
get the RMS waveform of it.
I check some tools, including engines and post-proccesors,
with no success: Oscopy, Ngspice, Gnucap, Octave, KJWaves.
Anyones knows or have some
On Sunday 25 April 2010, kai-martin knaak wrote:
6) Opamps:
a) An ideal opamp with essentially infinite
amplification, infinite slew rate, zero bias current, no
input offset, etc.
Here's an op-amp:
* Generic op-amp behavioral model
.subckt opamp (out+ out- in+ in-)
.param
On Thursday 29 April 2010, ignacio.dieg...@estumail.ucm.es
wrote:
how can i perform scattering S-parameter analysis with gEDA?
Can i create a model from a s2p (touchstone) file model?
Nothing with gEDA that does it directly and is ready to go.
Your best bet is probably Qucs. It's GUI
On Sunday 25 April 2010, kai-martin knaak wrote:
al davis wrote:
Ah .. there's a good idea .. don't have to be exact ..
they never are Not detailed, but just good enough
for a beginner. .. Now we need a volunteer to do it.
Have things like a generic parameterizable op-amp
On Saturday 24 April 2010, Andrzej wrote:
Do you have any plans for releasing the new version? If so,
what would be its scope. I'm afraid that if it is going to
include all the planned features (which are pretty
ambitious, I must admit), it will remain a development
version forever.
Some
On Saturday 24 April 2010, Kai-Martin Knaak wrote:
Please do so.
Lack of models is a major road block to get started with
simulation. Once over the new users stage, more models will
help to make even more.
The more models in the quiver, the more gnucap users, the
more new models.
On Saturday 24 April 2010, Link wrote:
I hadn't intended for anyone to interpret it that way, and
I'm sorry if you interpreted that as bashing gEDA. Perhaps
my choice of words was rather unfortunate.
Apology accepted.
What I intended to is that one component (the simulator) of
LTSpice
On Saturday 24 April 2010, kai-martin knaak wrote:
There should not be a need to search for specific models for
getting started with basic circuits in the first place. The
models don't have to be exact. But they need to be available
right away.
Ah .. there's a good idea .. don't have
On Saturday 24 April 2010, Armin Faltl wrote:
I can't make the list, but can tell you what I use:
- resistor
- potentiometer
- capacitor
- inductor
- diode (including Zener, Schottky,... )
- bipolar transistors
- MOSFETs
- op-amp
- Schmitt-trigger
- logic gates (NAND), sometimes
On Friday 23 April 2010, D T wrote:
Hi,I have the feeling this has been a topic here already.
Nevertheless, is there a way to pass parameters to а subckt
for spice3f5/ngspice/gnucap in linux similar to what PSpice
and LTSpice have?
Of course there is.
Well .. not spice 3f5 but gnucap
On Friday 23 April 2010, D T wrote:
Thank you Al. Just for the record: ngspice worked; gnucap
didn't. Details follow.
The directions from the subckt section of the NGSPICE User
Manual
(http://ngspice.cvs.sourceforge.net/viewvc/*checkout*/ngspic
e/ngspice/ng-spice-manuals/manual.pdf?)
On Friday 23 April 2010, Link wrote:
Eh?
Suppose you had instead said:
===
.. I suggest
using Eagle through Darwine. In my personal experience,
Eagle is a lot better than geda, and
it is definitely an easier workflow.
===
Is this any different?
No.
On Thursday 22 April 2010, Link wrote:
However, if you want a quick, graphical SPICE, I suggest
using LTSpice through Darwine. In my personal experience,
LTSpice's simulator is a lot better than ngspice/gnucap, and
it is definitely an easier workflow than
gschem-gattrib-gnetlist-ngspice
On Thursday 08 April 2010, Kai-Martin Knaak wrote:
This is one of the strange consequences of the common law
system. In the rest of the world, where civil law is
applied, ignorance of the delinquent does not diminish the
forfeit.
It isn't law that you could be ignorant of.
It's a work.
On Wednesday 07 April 2010, Stuart Brorson wrote:
Do you foresee any other difficulties? ... aside from
simulating a hydraulic circuit with spice or generating a
layout.
Actually, my first thought was: What kinds of simulations
(if any) does one do in hydraulics? Are there any
On Wednesday 07 April 2010, Bert Timmerman wrote:
Do not discuss patents here please !
Did you notice the date? (1934)
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http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
On Wednesday 07 April 2010, Dave McGuire wrote:
Ok, that's fine by me, as it's your list. But could you
explain how it could be dangerous? That suggestion sounds
quite ludicrous to me.
In general, it really does present a huge legal risk, so I agree
with the policy.
In this case,
On Monday 15 March 2010, Dave McGuire wrote:
On Mar 15, 2010, at 12:32 AM, Dan McMahill wrote:
With the help of Ivan I'm writing a viewer, oscopy
(http://repo.or.cz/w/oscopy.git) based draft #4 of this
page:
http://geda.seul.org/wiki/geda:data_plotting_improvements
IMHO, there are
On Tuesday 02 March 2010, Peter Clifton wrote:
Gnucap is another advanced simulation environment which might
be interesting. It is different to spice, but can accept
spice syntax and models etc.. Again, milage will vary as to
how well it works with a given model - and it is by no means
a
On Wednesday 03 March 2010, Dave McGuire wrote:
Maybe they are like me and don't have the eyesight,
equipment or dexterity to solder anything smaller than
TO92 parts?
We've had these neat things called magnifying glasses on
the market for at least a few months now. And when the
On Tuesday 02 March 2010, Geoff Swan wrote:
It has been my experience that circuit modeling tools
although useful are not able to negate the need to
understand the low level principles of the underlying
circuit. The better you understand the physics of what is
going on the more value you
On Sunday 28 February 2010, John Doty wrote:
Ah, but it has an open interface we can use. A great strength
of gEDA is that the tools play well with other tools,
whether they are part of gEDA or not.
I don't care how many proprietary tools you can leverage by
starting the schematic on
On Saturday 27 February 2010, John Doty wrote:
It looks like you're using the kind of hierarchy suitable for
a printed circuit flow, not a SPICE/ASIC flow. I suggest
first reading the excellent tutorial at
http://www.brorson.com/gEDA/SPICE/intro.html.
Ouch ..
That was written 6 years
On Tuesday 23 February 2010, Dave N6NZ wrote:
Really? Is there a use for gEDA-Eagle?
Lots of reasons.
Whether you like it or not, it is popular. Some people will
insist on it.
If gEDA is ever to replace Eagle, there needs to be a migration
path both ways.
If Free/open-source is ever to
On Tuesday 23 February 2010, John Griessen wrote:
Anyone have any ideas you'd like mentioned to him? Questions
I should ask? I'm just planning on telling him the status of
verilog-ams backend of gnetlist and that it can run some
simulations from a netlist -- the way it needs to be for
On Tuesday 23 February 2010, John Griessen wrote:
Al, are you saying that Icarus verilog would run along side
of gnucap once that interface is ready?
Icarus has two key parts .. A compiler, and a virtual machine.
In its normal use, the compiler generates code for the virtual
machine, then
On Monday 22 February 2010, Dave N6NZ wrote:
Is there any automated Eagle to gEDA conversion path?
(He says hopefully, but knowing it's highly unlikely.)
No .. but since you mention it, it is time to ask again for help
in making something that will do this.
I proposed a translator
On Tuesday 09 February 2010, Peter Clifton wrote:
Not for a GUI, it isn't. Seriously. Right concept, bad
integration.
A GUI is just a visual aid. If you have junk under the hood,
and hide it with a GUI, you just have more junk.
___
geda-user
On Sunday 07 February 2010, Kai-Martin Knaak wrote:
Is this intentional,
or just due to a lack of developer cycles?
We are waiting for you to do it.
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geda-user@moria.seul.org
On Thursday 04 February 2010, Chris Cole wrote:
and gwave shows up with correct Vin and Vout parameters, but
no data is graphed?
The plot would be too cluttered if it showed everything. You
need to drag the signal you want to see over to where you want
to see it.
On Wednesday 03 February 2010, Chris Cole wrote:
gnucap tran 1s 10s
#Time
0.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Any suggestions?
You need to specify what to print first.
Before the tran
On Friday 08 January 2010, Edward Hennessy wrote:
I created a working document for a gEDA parts manager on the
gEDA wiki.
http://geda.seul.org/wiki/geda:gparts_dd
If anyone has feedback or specific requirements, please
provide feedback to geda-dev or geda-user mailing
lists. I'll
On Jan 19, 2010, at 3:41 AM, Florian Teply wrote:
Anything else to add??
I guarantee you will leave something out, and that you will
include some useless stuff.
Just make sure the design is such that fields can be added and
removed in the future without breaking anything.
Same goes for
On Sunday 03 January 2010, DJ Delorie wrote:
You need to get the sources for PCB - installing a
binary-only package is not enough to let you build plugins.
In the next official release of gnucap, installing a binary-only
package IS enough to build plugins. That's true of the
development
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-12-07.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-12-07-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-12-07-models-jspice3-2.5.tar.gz
On Monday 16 November 2009, KURT PETERS wrote:
What do you intend to use gwave for? Is it for viewing SPICE
output?
Some people use it for Spice output. Some people use it for
Gnucap output. It fits very well with running Gnucap
interactively.
I think most gnucap/gwave users are not
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-11-10.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-11-10-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-11-10-models-jspice3-2.5.tar.gz
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-09-28.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-09-28-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-09-28-models-jspice3-2.5.tar.gz
On Monday 28 September 2009, A.Burinskiy wrote:
I have difficulty getting raw file as an output of simulation
using version that is shipped with Fedora 11. Does
something changed since that time? Or how I could get raw
file out of simulation? (I'm going to try big simulation
that
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-09-22.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-09-22-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-09-22-models-
jspice3-2.5.tar.gz
On Tuesday 15 September 2009, asom...@gmail.com wrote:
I, and judging from the mailing lists and forums many others,
are frustrated by the difficulty of finding spice models that
are compatible with open-source circuit simulators.
Yes. It's a problem. It's the kind of problem that will
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-09-09.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-09-09-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-09-09-models-jspice3-2.5.tar.gz
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-08-22.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-08-22-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-08-22-models-jspice3-2.5.tar.gz
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-08-19.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-08-19-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-08-19-models-
jspice3-2.5.tar.gz
On Saturday 15 August 2009, r wrote:
On Sat, Aug 15, 2009 at 5:12 AM, al
davisad...@freeelectron.net wrote:
A netlister needs to work for all symbols. No exceptions.
Why? Should it work even for symbols without models or
incompatible models (e.g. verilog RTL in an analog AC
simulation)?
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-08-13.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-08-13-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-08-13-models-jspice3-2.5.tar.gz
On Saturday 01 August 2009, A.Burinskiy wrote:
And, finally, me, as a user, will not be happy to change the
script each time I add new symbol!
Good thing you mentioned it.
Unfortunately, the Spice format is very irregular, so dealing
with it is pure hell. That is one of the reasons for
On Saturday 01 August 2009, Bob Paddock wrote:
http://tech.slashdot.org/story/09/08/01/2114210/Cheap-Cross-P
latform-Electronic-Circuit-Simulation-Software?from=rss
Cheap, Cross-Platform Electronic Circuit Simulation
Software?
dv82 writes I teach circuits and electronics at the
On Saturday 08 August 2009, igor2 wrote:
National or otherwise local standards. I know someone who
would be really angry at me if I used the --/\/\/-- resistor
symbol instead of the -[]- one, and of course no cad software
can come with symbols for all possible components drawn for
all
On Monday 27 July 2009, Daniel B. Thurman wrote:
I have tried using both gnucap and ngspice using KJWaves,
neither seems to be able to find the 1N4004 diode model
Google for it.
Neither supplies a model library. It's a lot of work to keep it
up to date. So, you need to search the web for
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2009-07-23.tar.gz
Optional plugin files:
http://gnucap.org/devel/gnucap-2009-07-23-models-bsim.tar.gz
http://gnucap.org/devel/gnucap-2009-07-23-models-jspice3-2.5.tar.gz
On Thursday 23 July 2009, r wrote:
There is also an experimental ADMS add-in for ngspice. Not
sure whether it is usable now, though.
ADMS has nothing to do with mixed signal. It is a model
compiler .. It takes a subset of Verilog-A and compiles it to C
so it can be used with a simulator.
On Monday 20 July 2009, Daniel B. Thurman wrote:
Also, I would appreciate it if someone could point
me to a tutorial or sample project that shows how
one can do spice simulation!
Did you look at what Stefan suggested for Gnucap?
Very basic:
http://www.johannes-bauer.com/electronics/
And
On Thursday 23 July 2009, Daniel B. Thurman wrote:
al davis wrote:
On Monday 20 July 2009, Daniel B. Thurman wrote:
Also, I would appreciate it if someone could point
me to a tutorial or sample project that shows how
one can do spice simulation!
Did you look at what Stefan suggested
On Friday 17 July 2009, Piter_ wrote:
I have results of DC sweep. Can plot it, but cant figure out
how to save it in txt file (tab delimited for example, or
other), for plotting in something other than ngspice.
In Gnucap, you direct the the command like a unix command ..
dc R12 10 100k
On Wednesday 24 June 2009, Steven Michalske wrote:
On the Northern California front.
I'm in sunnyvale, CA.
Any other users in the area
There's a oseda group that meets third wednesday every month.
The location varies, but Bangkok Spoon Thai
restaurant, 702 Villa St. (corner of Villa St.
On Tuesday 23 June 2009, Michael B Allen wrote:
I'm trying to run a simple multivibrator simulation but both
SPICE and GNU-Cap do not yield anything that even oscillates.
Here is the circuit:
http://207.192.69.113/~miallen/mv_1.pdf
It would help if you include a netlist, so I can try it.
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