John Griessen wrote:
Is the output sets of per page netlists in this case?
When you invoke:
(hierarchy-traversal disabled)
you can still netlist multi-pages with:
gnetlist -g -o foo.out foo1.sch foo2.sch ...
The netlist output will be per hierarchy in this case.
Best Regards,
Paul Tan
Paul Tan wrote:
Hi,
Currently, you can selectively disable flat Hierarchy netlisting by
putting
a line as follow in your project's gnetlistrc:
(hierarchy-traversal disabled)
Note that the above flag only affects gnetlist on that particular
project directory when you run gnetlist.
On Fri, 2008-11-21 at 10:04 -0600, John Griessen wrote:
Is the output sets of per page netlists in this case?
The output would be a netlist of the page you passed to gnetlist (not
descending to fill in pieces which reference other schematic pages).
No other files would be inspected. You'd have
On Fri, Nov 21, 2008 at 6:08 AM, Paul Tan [EMAIL PROTECTED] wrote:
1) Add the following 2 lines to the end of any one of the gnetlistrc
files,
such as the system-gnetlistrc file or your
'$HOME/.gEDA/gnetlistrc
file (make sure to leave an extra empty line after that):
(if (assoc
On Thu, 20 Nov 2008 22:29:34 -0500, Paul Tan wrote:
Currently, you can selectively disable flat Hierarchy netlisting by
putting a line as follow in your project's gnetlistrc:
(hierarchy-traversal disabled)
Can you enlighten me, why you don't want gnetlist to travers the
hierarchy?
On Nov 21, 2008, at 3:37 PM, Kai-Martin Knaak wrote:
On Thu, 20 Nov 2008 22:29:34 -0500, Paul Tan wrote:
Currently, you can selectively disable flat Hierarchy netlisting by
putting a line as follow in your project's gnetlistrc:
(hierarchy-traversal disabled)
Can you enlighten me, why
Don't worry about him. I suspect he's one of the poisonous people
you run across in open software development. haven't looked at the video Al
suggested yet, but planning on it.
I think it's important not to jump to conclusions about any particular
poster's toxicity. IMHO this video itself
r wrote:
Good for you.
You're not even a you. You're anonymous.
JG
--
Ecosensory Austin TX
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On Nov 19, 2008, at 7:11 PM, r wrote:
On Thu, Nov 20, 2008 at 1:09 AM, John Doty [EMAIL PROTECTED] wrote:
Agreed. I didn't mean gnetlist doesn't work with hierarchical
designs
at all - it just didn't produce any useful results last time I tried
it.
You haven't clearly stated what your
On Thu, Nov 20, 2008 at 6:33 PM, John Doty [EMAIL PROTECTED] wrote:
Can you explain in detail how do you generate the hierarchical
netlist?
Here's a simplified version of my current flow.
Thanks! I'll try it. This method looks pretty good.
1. Don't use source= in your symbols.
That's bad
On Nov 20, 2008, at 4:07 PM, r wrote:
On Thu, Nov 20, 2008 at 6:33 PM, John Doty [EMAIL PROTECTED] wrote:
Can you explain in detail how do you generate the hierarchical
netlist?
Here's a simplified version of my current flow.
Thanks! I'll try it. This method looks pretty good.
1. Don't
:02 pm
Subject: Re: gEDA-user: Some kind of library manager and hierarchical
netlisting
On Nov 20, 2008, at 4:07 PM, r wrote:
On Thu, Nov 20, 2008 at 6:33 PM, John Doty [EMAIL PROTECTED] wrote:
Can you explain in detail how do you generate the hierarchical
netlist?
Here's a simplified
!
Best Regards,
Paul Tan
-Original Message-
From: John Doty [EMAIL PROTECTED]
To: gEDA user mailing list geda-user@moria.seul.org
Sent: Thu, 20 Nov 2008 6:02 pm
Subject: Re: gEDA-user: Some kind of library manager and hierarchical
netlisting
On Nov 20, 2008, at 4:07 PM, r wrote
Hi,
There is another method to selectively disable flat Hierarchical
netlisting.
This one allow you to do it using gnetlist command line option flag
-O :
1) Add the following 2 lines to the end of any one of the gnetlistrc
files,
such as the system-gnetlistrc file or your
Hi,
I hit exactly same issues last time I tried to use gschem/gnetlist.
The flow simply doesn't work with hierarchical designs (and yes, there
is no notion of a design library in geda). If you are willing to
spend some time on it and contribute fixes to the flow that would be
great. On the other
On Wed, 2008-11-19 at 10:23 +, r wrote:
Hi,
I hit exactly same issues last time I tried to use gschem/gnetlist.
The flow simply doesn't work with hierarchical designs (and yes, there
is no notion of a design library in geda).
That simply is not true. The netlister _does_ work with
Peter,
I believe that gnetlist takes in a hierarchical series of schematics and
flattens the schematics into a flat netlist that may then be exported
into a number of flat formats. In other words the net has been flattened
before reaching the backend. Hierarchical information is retained in
Yamazaki,
I have done a fair amount of work on hierarchical netlisting. However, I
run my own customized versions of libgeda and gnetlist. In my version,
each page is netlisted separately and thus a back end could be written
to retain the hierarchical information.
Steve Meier
On Tue,
On Wed, 2008-11-19 at 06:04 -0800, Steve Meier wrote:
Peter,
I believe that gnetlist takes in a hierarchical series of schematics and
flattens the schematics into a flat netlist that may then be exported
into a number of flat formats. In other words the net has been flattened
before
Peter Clifton wrote:
That simply is not true. The netlister _does_ work with hierarchical
designs, but typically, our back-ends target a flat output, such as for
PCB.
Don't worry about him. I suspect he's one of the poisonous people
you run across in open software development. haven't
On Wed, Nov 19, 2008 at 2:49 PM, Peter Clifton [EMAIL PROTECTED] wrote:
On Wed, 2008-11-19 at 06:04 -0800, Steve Meier wrote:
Peter,
I believe that gnetlist takes in a hierarchical series of schematics and
flattens the schematics into a flat netlist that may then be exported
into a number of
On Wed, Nov 19, 2008 at 11:54 PM, John Griessen [EMAIL PROTECTED] wrote:
Peter Clifton wrote:
That simply is not true. The netlister _does_ work with hierarchical
designs, but typically, our back-ends target a flat output, such as for
PCB.
Don't worry about him. I suspect he's one of the
On Nov 19, 2008, at 5:17 PM, r wrote:
Agreed. I didn't mean gnetlist doesn't work with hierarchical designs
at all - it just didn't produce any useful results last time I tried
it.
You haven't clearly stated what your problem was. I've done both
hierarchical VLSI designs (SPICE style:
On Thu, Nov 20, 2008 at 1:09 AM, John Doty [EMAIL PROTECTED] wrote:
Agreed. I didn't mean gnetlist doesn't work with hierarchical designs
at all - it just didn't produce any useful results last time I tried
it.
You haven't clearly stated what your problem was. I've done both
hierarchical
Has anybody made some kind of library manager like the cadence library
manager in icfb to manage schematics and symbols? Something where in
the schematic editor I can type in a library name and cell name it and
automatically instantiates the symbol/schematic combo in the
hierarchy?
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