I just read this, and had to think on the UI discussion going on here:
[1]http://www.sububi.org/2010/08/18/free-interaction-design-for-your-op
en-source-project/
We should also think on the smaller applications beside PCB and gschem.
Im sure everyone here could name some programmes
DJ Delorie wrote:
Sure, and the big EDA code based on LISP/Guile also uses syntax for
names so a wire with such a name attrib seems to be all that's
necessary to define a bus. Putting the syntax netname[0:7] into
form netname[0], netname[1], for the backends is fine. Seems
to me the
DJ Delorie wrote:
And I want to understand the implications of pins that reflect
multiple signals, too - mapping names and numbers, etc.
I can only envision 2 cases for a multipurpose pin:
a) the generic interface shall be preserved - don't care what the pin
means, just pass a wire
b)
John Griessen wrote:
1) Assign unique refdes value to all netlistable
logical symbols in the schematic. If the
logical symbol is one of several in a
PHYSICAL_package, then assgined refdes
to each logical symbol such as Uxx_yy;
where yy is the value to identify
a particular
John Griessen wrote:
In your work flow, English words convey duties to hired layout persons.
In my example, I only hire the autorouter.
Sounds very useful. Especially for open hardware projects and hobbyists,
and bottom line oriented business folk.
Sounds like you suggest the autorouter
On Mon, 2010-08-16 at 11:23 +0200, Armin Faltl wrote:
John Griessen wrote:
In your work flow, English words convey duties to hired layout persons.
In my example, I only hire the autorouter.
Sounds very useful. Especially for open hardware projects and hobbyists,
and bottom line
On Fri, 2010-08-06 at 17:42 -0700, Andrew Poelstra wrote:
Layer groups as I proposed
separate the board into different workspaces to keep things organized.
I understand your goal, and support it. But I still have problems to
imagine how workspaces will work for layout process. At the end all
On Sat, 2010-08-07 at 12:58 -0700, Andrew Poelstra wrote:
I agree, but on a high level a net /is/ a relation between two pads/pins.
(Well, a net can have many pads/pins. A subnet would be restricted to two,
by definition.)
No. A subnet, in my mind, is not restricted to two nodes
On Mon, Aug 16, 2010 at 01:18:37PM +0200, Stefan Salewski wrote:
On Fri, 2010-08-06 at 17:42 -0700, Andrew Poelstra wrote:
Layer groups as I proposed
separate the board into different workspaces to keep things organized.
I understand your goal, and support it. But I still have problems
Stefan Salewski wrote:
On Sat, 2010-08-07 at 12:58 -0700, Andrew Poelstra wrote:
I agree, but on a high level a net /is/ a relation between two pads/pins.
(Well, a net can have many pads/pins. A subnet would be restricted to two,
by definition.)
No. A subnet, in my mind, is not
Armin Faltl wrote:
My very little experience with autorouters also makes me believe, that
an autorouter has even less understanding of EMI issues than I have ;-)
Sure, that's why I made the analogy to Rainman. Routers are autistic.
Have to be told what to do with many attribs and usually
Andrew Poelstra wrote:
No, that's pretty much it. There are two things I want beyond simply
workspaces to hold different tool settings for different functional
groups:
1. You can create a view based on anything, not just functional
groups, as will be the default. This includes opening
- John Griessen j...@ecosensory.com wrote:
Andrew Poelstra wrote:
No, that's pretty much it. There are two things I want beyond simply
workspaces to hold different tool settings for different functional
groups:
1. You can create a view based on anything, not just functional
Rick Collins wrote:
Why not start with what you
are trying to do in the layout, consider what the layout tool needs to
make that happen, then trace that back to what is needed in the
schematic to support the layout?
There are lots of different users of these programs, and they have different
Andrew Poelstra wrote:
When you click the new button beside the view tabs, you'll get a popup
asking if you want to create a:
o New functional block
o New component (footprint)
o Custom view
So are you thinking of reusing the layout editor to edit the footprint view?
Then we could
You're not going to show up and get your way in a FOSS development
community unless your suggestion is obvious and brilliant at the
same time.
or if you're willing to do the work yourself, of course :-)
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John Griessen wrote:
Rick Collins wrote:
Why not start with what you
are trying to do in the layout, consider what the layout tool needs
to make that happen, then trace that back to what is needed in the
schematic to support the layout?
There are lots of different users of these programs,
- John Griessen j...@ecosensory.com wrote:
Andrew Poelstra wrote:
When you click the new button beside the view tabs, you'll get a popup
asking if you want to create a:
o New functional block
o New component (footprint)
o Custom view
So are you thinking of reusing the
On Mon, 2010-08-16 at 12:00 -0400, Rick Collins wrote:
I think we should try to find a better name for the connection between
two nodes in a net, maybe segment?
In the layout program I use, a segment is a single section of a PWB
route between two points. That is, it is the shortest
Ok, if that is the way this group works. I have been told that these
tools can be useful and I assumed that would be the goal of
development. I see lot of comments going in all directions with no
clear indication of how any of it would be used. But I'm just a
practical sort of guy. If you
On Mon, 2010-08-16 at 18:54 +0200, Armin Faltl wrote:
JG, in my opinion Rick has a point, that without 100% clear definitions from
and for all of those talking here using subnet, the whole discussion
has a high
chance of getting nowhere
This is true -- but the point is not 100% clear
At 12:57 PM 8/16/2010, you wrote:
On Mon, 2010-08-16 at 12:00 -0400, Rick Collins wrote:
I think we should try to find a better name for the connection between
two nodes in a net, maybe segment?
In the layout program I use, a segment is a single section of a PWB
route between two points.
- Stefan Salewski m...@ssalewski.de wrote:
On Mon, 2010-08-16 at 18:54 +0200, Armin Faltl wrote:
This is true -- but the point is not 100% clear definitions but
skills and time and will to work and code.
Andrew Poelstra has shown at least some of the last mentioned. My fear
was, that
On Mon, 2010-08-16 at 13:55 -0400, Rick Collins wrote:
I guess I am not thinking that there is a problem with
implementation. My concern is value. How are these ideas to be used
by... well, the users? After all, this is the geda-user list,
no? If getting the work done is the hardest
I looked at your DSO project. That is pretty impressive. Are you
looking for any help? That is right up my alley!
Rick
At 02:56 PM 8/16/2010, you wrote:
On Mon, 2010-08-16 at 13:55 -0400, Rick Collins wrote:
I guess I am not thinking that there is a problem with
implementation. My
On Mon, 2010-08-16 at 15:27 -0400, Rick Collins wrote:
I looked at your DSO project. That is pretty impressive. Are you
looking for any help? That is right up my alley!
Rick
Indeed I was hoping for some support during the last two years, but
there was not much interest, some people
Stefan Salewski wrote:
But what people regard as important is very different. Here in Germany
most people related to electronics seems to give visible appearance a
very high priority.
On the other hand, the ugly duckling who calls itself eagle enjoys
quite some user base in Germany. Bartels
Stefan Salewski wrote:
I have to do next layout again myself. But
that layout will be more complicated, it will contain fast differential
signal pairs and BGA footprints. Should be more than 500 hours for me. I
think attributes can support my work, so I will need only 350 hours.
Maybe much less
Hi John Doty,
On Aug 14, 2010; 02:45pm; John Doty wrote:
No. It can happen whenever you have multiple
symbols with the same refdes, regardless of
the back end. Slotting is a particular case
of this, but not the only one. It's a pure
gnetlist problem, having nothing to do with
pcb.
That is
Stefan Salewski wrote:
On Sat, 2010-08-14 at 18:57 -0400, Paul Tan wrote:
On Aug 14, 2010; 10:34am, Andrew Poelstra wrote:
Otherwise, certain nets (such as power or ground nets), which often
have vastly different characteristics in different sections, would
be difficult to describe.
I think
DJ Delorie wrote:
Also, my proposal is to have the busses converted to multiple
independent nets in the common parts of gnetlist, so that you don't
have to tweak every single backend to add support for them. You can
still support magic net names that the backends understand, if you
want, but
Sure, and the big EDA code based on LISP/Guile also uses syntax for
names so a wire with such a name attrib seems to be all that's
necessary to define a bus. Putting the syntax netname[0:7] into
form netname[0], netname[1], for the backends is fine. Seems
to me the common code would
Paul Tan wrote:
That is the problem, whenever you have multiple
symbols with the same refdes, as I suspected
and mentioned in my previous post.
.
.
.
The final PCB netlist wants to see PACKAGE_refdes
instead of LOGICAL_SYBOL_refdes. So one of the
solution is (as I stated before and explain
One of the things we need for pin/gate swapping in pcb is a UUID for
each logical symbol in the schematic set. Refdes is not unique enough :-(
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Hello Paul,
On Aug 15, 2010, at 4:08 AM, Paul Tan wrote:
Hi John Doty,
On Aug 14, 2010; 02:45pm; John Doty wrote:
No. It can happen whenever you have multiple
symbols with the same refdes, regardless of
the back end. Slotting is a particular case
of this, but not the only one. It's a
And what will these subnets translate into in a layout tool? How
would that translation be handled in the net list? A net is a net in
my designs. If I have a subnet that I want handled differently
from the rest of the net, that is not something that is added to a
schematic because it is not
Rick Collins wrote:
And what will these subnets translate into in a layout tool? How would
that translation be handled in the net list? A net is a net in my
designs.
.
.
.
If I really want to designate portions of a net that need to be
separated by some PWB feature, I draw them as separate
Rick Collins wrote:
How would you make use of subnets that would be useful that you
can't do with just nets?
Of course you can do everything manually in the layout app. Just like you
can do any layout without a schematic in the first place. But the schematic
serves as a convenient way to
On Sun, 2010-08-15 at 12:36 -0400, Rick Collins wrote:
And what will these subnets translate into in a layout tool? How
would that translation be handled in the net list? A net is a net in
my designs. If I have a subnet that I want handled differently
from the rest of the net, that is
John Griessen wrote:
Rick Collins wrote:
How would you make use of subnets that would be useful that you
can't do with just nets?
After my last post, I saw you could argue, You can do that with just nets.,
and I see your point that from a schematic view a net is a net, and most
of the use of
Stefan Salewski wrote:
And I can not imagine that commercial EDA tools do not support the
layouter in a similar way as we now consider.
By the way, protel99SE did so more than 10 years ago...
---)kaimartin(---
--
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
Hi John Doty,
On Aug 15, 2010; 08:18am; John Doty wrote:
A front end function gnetlist:get-all-symbol-attributes
would make a pretty decent primitive factor here.
It could return a nested list like:
( ( ( refdes U1 )
( device 7400 ) )
( ( refdes U1 )
( device 14pwr )
Hello, Paul.
On Aug 15, 2010, at 3:34 PM, Paul Tan wrote:
Hi John Doty,
On Aug 15, 2010; 08:18am; John Doty wrote:
A front end function gnetlist:get-all-symbol-attributes
would make a pretty decent primitive factor here.
It could return a nested list like:
( ( ( refdes U1 )
(
,
Paul Tan
-Original Message-
From: John Doty j...@noqsi.com
To: gEDA user mailing list geda-user@moria.seul.org
Sent: Fri, Aug 13, 2010 5:09 pm
Subject: Re: gEDA-user: wishful UI
On Aug 13, 2010, at 5:49 PM, Stefan Salewski wrote:
On Fri, 2010-08-13 at 19:28 -0400, DJ Delorie wrote:
I
On Fri, 13 Aug 2010 18:09:08 -0600, John Doty j...@noqsi.com wrote:
Unfortunately, some of our
developers take the attitude that dumbing down the (almost supernaturally
productive) UI is the way to attract more developers.
Who?
This is especially problematic at the guile
scripting
Paul Tan wrote:
Hi All,
We can all agree that the current gEDA(Gschem/Gnetlist) need to
accomodate more
than just the netname attribute attached to a net. In fact, I would
like to
see that gEDA can process ANY attributes attached to a net in similar
fashion as it process ANY attributes
On Aug 14, 2010, at 1:17 AM, Paul Tan wrote:
Hi All,
We can all agree that the current gEDA(Gschem/Gnetlist) need to accomodate
more
than just the netname attribute attached to a net. In fact, I would like to
see that gEDA can process ANY attributes attached to a net in similar
fashion
On Sat, 14 Aug 2010 10:01:44 -0600, John Doty j...@noqsi.com wrote:
Not important. The quick fix (make the stack bigger) is known and should
be
incorporated in the distributed system-gnetlistrc. The problem is a
consequence of dropping a functional language into a procedural culture:
it
will
On Sat, Aug 14, 2010 at 03:17:42AM -0400, Paul Tan wrote:
...In fact, I would like to see that gEDA can process ANY attributes
attached to a net in similar fashion as it process ANY attributes
attached to a symbol currently.
I agree, but I'm not sure this would be useful until we find a way
On Aug 14, 2010, at 10:51 AM, Peter TB Brett wrote:
On Sat, 14 Aug 2010 10:01:44 -0600, John Doty j...@noqsi.com wrote:
Not important. The quick fix (make the stack bigger) is known and should
be
incorporated in the distributed system-gnetlistrc. The problem is a
consequence of dropping a
On Aug 14, 2010, at 11:34 AM, Andrew Poelstra wrote:
On Sat, Aug 14, 2010 at 03:17:42AM -0400, Paul Tan wrote:
...In fact, I would like to see that gEDA can process ANY attributes
attached to a net in similar fashion as it process ANY attributes
attached to a symbol currently.
I agree,
On Sat, Aug 14, 2010 at 12:14:58PM -0600, John Doty wrote:
On Aug 14, 2010, at 11:34 AM, Andrew Poelstra wrote:
On Sat, Aug 14, 2010 at 03:17:42AM -0400, Paul Tan wrote:
...In fact, I would like to see that gEDA can process ANY attributes
attached to a net in similar fashion as it
Hi John Doty,
On Aug 14, 2010; 08:49am, John Doty wrote:
Except that it's slightly broken in the symbol case. Symbols are
looked up by
refdes, but a component may be represented by multiple symbols with
the same
refdes. Also, there may be more than one attribute with the same
name, but
Well, as you suggest below, Groups are essentially a way of tagging
different parts, so they would be completely independent of the physical
layers - and the connectivity checker.
** Confusingly, PCB already has layer groups, which consist of
multiple layers. A layer group is what ends up
On Sat, Aug 14, 2010 at 10:28:09PM +0200, Armin Faltl wrote:
Well, as you suggest below, Groups are essentially a way of tagging
different parts, so they would be completely independent of the physical
layers - and the connectivity checker.
** Confusingly, PCB already has layer groups,
John Doty wrote:
On Aug 8, 2010, at 4:51 PM, kai-martin knaak wrote:
No it is not. Even simple things like footprint names have a pretty rigid
syntax to adhere to. The workflow breaks in cryptic ways if they are not
obeyed.
This is a pure pcb limitation, not a gEDA limitation in
On Aug 14, 2010, at 3:29 PM, Armin Faltl wrote:
John Doty wrote:
On Aug 8, 2010, at 4:51 PM, kai-martin knaak wrote:
No it is not. Even simple things like footprint names have a pretty rigid
syntax to adhere to. The workflow breaks in cryptic ways if they are not
obeyed.
On Sat, 2010-08-14 at 23:29 +0200, Armin Faltl wrote:
Isn't a chain as strong as it's weakest link ?
There is no chain!
gschem - ... - PCB
is one workflow, amongst multiple.
OK, maybe the one most people use currently.
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On Aug 14, 2010, at 2:18 PM, Paul Tan wrote:
Is the case you mentioned above relates to the problem of slotting in
PCB?
No. It can happen whenever you have multiple symbols with the same refdes,
regardless of the back end. Slotting is a particular case of this, but not the
only one. It's a
Oops, forgot the attachments!
barfoo.sch
Description: Binary data
foobar.sch
Description: Binary data
On Aug 14, 2010, at 3:45 PM, John Doty wrote:
On Aug 14, 2010, at 2:18 PM, Paul Tan wrote:
Is the case you mentioned above relates to the problem of slotting in
PCB?
No. It can
On Aug 13, 2010, at 7:51 PM, kai-martin knaak wrote:
The utter failure of early
efforts to base AI on classification of objects should surely have taught
that to us.
The success of mathematics and biology to conquer their vast fields with
hierarchical classification is telltale.
Hi Andrew Poelstra,
On Aug 14, 2010; 10:34am, Andrew Poelstra wrote:
On Sat, Aug 14, 2010 at 03:17:42AM -0400, Paul Tan wrote:
...In fact, I would like to see that gEDA can process ANY attributes
attached to a net in similar fashion as it process ANY attributes
attached to a symbol currently.
On Sat, 2010-08-14 at 18:57 -0400, Paul Tan wrote:
Hi Andrew Poelstra,
On Aug 14, 2010; 10:34am, Andrew Poelstra wrote:
Otherwise, certain nets (such as power or ground nets), which often
have vastly different characteristics in different sections, would
be difficult to describe.
If
On Aug 14, 2010, at 4:57 PM, Paul Tan wrote:
If the split nets means BUS, such as addrBus[63:0] which
can be split into addrBus[12:0], addrBus[15], etc; or even
the notion of Compound BUS such as addrBus[63:0],ALE,CTRL,
it can all be done with the backend scheme code. It really
depends on
On Aug 14, 2010, at 4:57 PM, Paul Tan wrote:
gnet-verilog.scm is the Verilog netlister, which already handle
merging and splitting busses, and hierarchy. An example schematic
files with generated Verilog netlist can be found in the attached
zip file at:
I just looked through Paul's examples, and it looks just like what I'm
proposing except for the GUI details and where in the flow they're
converted. Paul's examples even look like mine.
I reused the existing BUS graphic to represent a bus, so that the NET
graphic could remain a net, where Paul
Hi ALL,
On Aug 14, 2010; 04:33pm, DJ wrote:
While I applaud his results (yay!) I think it would be better if a
bus
were a bus and a net were a net, so that DRC and gnetlist could be a
little smarter about detecting errors and resolving conflicts. One
example: a single-signal net with two
On Mon, 2010-08-09 at 10:59 -0600, John Doty wrote:
Remember, pcb isn't the only layout path we support.
Yes. But I think the addition of net classes will not really break
something. Of course it will increase the code size, which is not really
nice. And it may decrease the working speed of
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Am 13.08.2010 23:23, schrieb Stefan Salewski:
On Mon, 2010-08-09 at 10:59 -0600, John Doty wrote:
Remember, pcb isn't the only layout path we support.
Yes. But I think the addition of net classes will not really break
something. Of course it
On Sat, 2010-08-14 at 00:48 +0200, Dietmar Schmunkamp wrote:
Stefan,
I looked at your suggestions about netclasses and I like them.
Indeed currently I am still looking for a good reason against that
proposal. My best candidates: It is not too useful for small projects,
and it is some work
I guess it would be no great deal for smart (but very busy) people
like Peter C. and DJ, to implement the basic concept. For people not
familiar with the internals of gschem and PCB like me it may take
very long...
I'm quite willing to teach people PCB internals, if it means having
more PCB
So why not just have properties, and sets of properties.
A set of properties *is* a class, if you apply the same set of
properties to many nets. Why not let the user pre-define such
classes, to make their work easier?
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On Aug 13, 2010, at 5:39 PM, DJ Delorie wrote:
So why not just have properties, and sets of properties.
A set of properties *is* a class, if you apply the same set of
properties to many nets. Why not let the user pre-define such
classes, to make their work easier?
I suggested that.
I
On Fri, 2010-08-13 at 19:28 -0400, DJ Delorie wrote:
I guess it would be no great deal for smart (but very busy) people
like Peter C. and DJ, to implement the basic concept. For people not
familiar with the internals of gschem and PCB like me it may take
very long...
I'm quite willing
Ben Jackson wrote:
I'll answer internals questions on geda-dev from anyone who wants to
ask.
Unfortunately, only approved developers are allowed to ask on geda-dev.
---)kaimartin(---
--
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53
On Fri, 2010-08-13 at 17:48 -0600, John Doty wrote:
On Aug 13, 2010, at 5:39 PM, DJ Delorie wrote:
So why not just have properties, and sets of properties.
A set of properties *is* a class, if you apply the same set of
properties to many nets. Why not let the user pre-define such
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Am 14.08.2010 01:13, schrieb Stefan Salewski:
Indeed currently I am still looking for a good reason against that
proposal. My best candidates: It is not too useful for small projects,
and it is some work to implement.
I don't think that this is a
On Aug 13, 2010, at 6:13 PM, Stefan Salewski wrote:
In my simple mind I consider a set of properties a class. But of course
we can call it again a property.
It's the difference between ending at class, or being able to compose
properties from properties without limit.
John Doty
John Doty wrote:
It's the difference between ending at class, or being able to compose
properties from properties without limit.
What do you think, the terms subclass and superclass refer to?
---)kaimartin(---
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Öffentlicher PGP-Schlüssel:
On Aug 13, 2010, at 6:54 PM, kai-martin knaak wrote:
What do you think, the terms subclass and superclass refer to?
Classes in OO aren't like classes in any other context.
The concept of class is superfluous and misleading here, since only one concept
is needed: property. Much simpler and
But property is such a nice, clean, simple building block. Why
pollute it by adding more functionality and making it more complex?
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John Doty wrote:
What do you think, the terms subclass and superclass refer to?
Classes in OO aren't like classes in any other context.
Biology, astronomy, algebra, set theory and database theory all use the
concept of subclasses.
---)kaimartin(---
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Öffentlicher
On Aug 13, 2010, at 7:04 PM, DJ Delorie wrote:
But property is such a nice, clean, simple building block. Why
pollute it by adding more functionality and making it more complex?
Because then you can extend the concept without limit. It's like function in
mathematics. You can construct
On Aug 13, 2010, at 7:07 PM, kai-martin knaak wrote:
John Doty wrote:
What do you think, the terms subclass and superclass refer to?
Classes in OO aren't like classes in any other context.
Biology, astronomy, algebra, set theory and database theory all use the
concept of subclasses.
But property is such a nice, clean, simple building block. Why
pollute it by adding more functionality and making it more complex?
Because then you can extend the concept without limit. It's like
function in mathematics. You can construct functions from
functions. But if such constructs
John Doty wrote:
Biology, astronomy, algebra, set theory and database theory all use the
concept of subclasses.
But I've worked in astronomy for decades without ever encountering the
term superclass. Nor are classes in astronomy associated with
methods.
read again: Did I write superclass?
On Aug 13, 2010, at 7:20 PM, DJ Delorie wrote:
But property is such a nice, clean, simple building block. Why
pollute it by adding more functionality and making it more complex?
Because then you can extend the concept without limit. It's like
function in mathematics. You can construct
On Aug 13, 2010, at 7:27 PM, kai-martin knaak wrote:
read again: Did I write superclass?
Your statement was, that classes do not contain classes anywhere but in OO.
Read again: did I write classes do not contain classes anywhere but in OO?
I wrote: Classes in OO aren't like classes in any
On Aug 13, 2010, at 7:27 PM, kai-martin knaak wrote:
read again: Did I write superclass?
Yes.
You wrote:
What do you think, the terms subclass and superclass refer to?
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com
A collection of constants is a structured constant and a class is not
(only) a constant - well at least to me a structured property sounds
less missleading than the name class. Why doesn't a class include
net topologies, parts etc.? - That's what a true analogon of a class
would be - actually a
On Fri, Aug 13, 2010 at 07:32:30PM -0600, John Doty wrote:
On Aug 13, 2010, at 7:20 PM, DJ Delorie wrote:
But property is such a nice, clean, simple building block. Why
pollute it by adding more functionality and making it more complex?
Because then you can extend the concept
John Doty wrote:
Class is a misleading term in this context. Nets (at best) have
properties: classification is sloppy thinking.
No, it is structured thinking.
The utter failure of early
efforts to base AI on classification of objects should surely have taught
that to us.
The success of
John Doty wrote:
I wrote: Classes in OO aren't like classes in any other context.
Your key point is that class is not an appropriate term, because classes
can't contain classes. If this is not, what you wanted to back-up with the
OO statement. Why did bring OO into play?
I gave five
On Friday 13 August 2010, John Doty wrote:
Developers who'd be attracted by a dumbed-down UI are exactly
the folks I do not want to see working on gEDA.
Just to clarify .. one example of a dumbed-down of the type
JD is referring to is LaTeX. After all, LaTeX is just a dumbed-
down interface
John,
It seems still to be unimplemented in 1.6.1. Or do I simply not understand
how it works? I don't use it: the file you saw was notes for documentation,
not a bug report.
The patch is from my private git repository and is not implemented in
any downloadable gnetlist version.
I know
On Aug 12, 2010, at 1:50 PM, Bas Gieltjes wrote:
John,
It seems still to be unimplemented in 1.6.1. Or do I simply not understand
how it works? I don't use it: the file you saw was notes for documentation,
not a bug report.
The patch is from my private git repository and is not
OK, core developers. How do we get this into 1.8?
Upload it to the sourceforge patch tracker to prevent that the
patch gets lost.
Bas
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On Fri, 06 Aug 2010 17:19:25 +0200
Stefan Salewski m...@ssalewski.de wrote:
Maybe your grouping concept should occur in an early stage in gschem?
One of the commercial PCB program I worked with had the feature of defining
color for nets. Such as D? is red, A? is blue. It was very good to work
John Doty j...@noqsi.com wrote:
but pcb is apparently almost completely =
dependent on gnetlist.
No, it isn't. PCB defines its netlist input format; the schematic
capture folks like gEDA then adapt to it, in gEDA's case by way of a
gnetlist back-end.
My OSDCU board through which the
On Sat, 2010-08-07 at 11:33 -0600, John Doty wrote:
On Aug 6, 2010, at 6:42 PM, Andrew Poelstra wrote:
On Sat, Aug 07, 2010 at 12:51:34AM +0200, Stefan Salewski wrote:
The current status of my mind:
Having net classes in gschem would make all much easier.
Nothing new needs to be
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