Yep, works to at least display them somewhat.
Getting some more warnings,
Found AD code with no following 'D' in file
In file ,aperture number out of bounds : -1
etc.
At least they're visible now.
Thanks
On Fri, Dec 18, 2009 at 5:34 PM, Ineiev ine...@gmail.com wrote:
On 12/18/09, timecop time
Ya, that one was obvious, I hand-copied those anyway and saw the bug.
By the way, cairo rendering frontend seems to be more maintained than
the GDK one - example, not supporting additional parameters in
apertures (i.e. circle inside circle, rectangle inside circle etc).
Any plans on making that
For example, polygon primitive drawing is not done in GDK.
When I tried to look at the code to add it, I noticed polygon WAS
handled in one place but not in another. In amacro it prints as circle
(and none of amacros handle p2/p3/p4/p5 parameters), but from prim(21?
i think, not in front of code
When I had to do that, I put the gerber layer as assembly layer on PCB
and traced it over.
No, you won't be able to 'directly' import it. No idea if you can do
this in pcb or not either, I've not used it.
On Wed, Dec 30, 2009 at 8:27 PM, Anthony Shanks yamazak...@gmail.com wrote:
I just screwed
i dont use geda and i looked at attached pdf. is this rly de3ault
behaviour for pours and cant be changed?
On 1/11/10, Ben Jackson b...@ben.com wrote:
On Sun, Jan 10, 2010 at 05:28:05PM -0800, David Griffith wrote:
This sounds like the solution. Do you have any sample code or pseudocode
on
I couldn't help but chuckle at your explanation of unconnected ground
pours after you said you were milling your boards presumable on a
hand-made-out-of-plywood-cnc. kinda like trying to kill a fly with a
jackhammer.
Seriously its 2010, even hardcore open-source hippies should be able
to afford a
At the very least, it seems that there should be a way to specify that any
pin with the same number satisfies the connection.
fairly ridiculous assumption especially with ICs, many of which
specifically say something like all GND/VCC pads must be connected.
The point of properly drawn symbols
I ran into the same thing four times within the last week, just tinkering
with some old projects:
* A common four-pin SPST momentary button with two pairs of electrically
connected pins,
* A DB25 connector had its metal metal shield/shell connected to the two
primary mounting holes,
* A
Official rule of how things work (on the other OS) is that
1) localized versions which use non-CJK alphabet will have localized
accelerators (ex. _New, Ne_u, etc)
2) CJK localized versions will put the english accelerator in ( )
after the original menu text - ex. ファイル(_F)
This seems to work and
Diptrace has a pair of ulp scripts to convert eagle project to ascii
schematic and pcb.
after some creative editing to make output format match geda, it
should be fairly feature compelte
On Tue, Feb 23, 2010 at 1:36 PM, al davis ad...@freeelectron.net wrote:
On Monday 22 February 2010, Dave N6NZ
...@arrl.net wrote:
On Feb 22, 2010, at 9:08 PM, timecop wrote:
Diptrace has a pair of ulp scripts to convert eagle project to ascii
schematic and pcb.
OK, although I don't know what either Diptrace or ulp are. Sounds like a
good place to start, though.
I'm wondering how the library issue would
Seriously?
gEDA can't draw circles?
I think the first thing before this discussion gets out of hand is to
asap add clicking x/y to set center and clicking again to set radius
or just popping up a dialogbox to set radius/correct XY after one
click in 'circle' tool mode.
Then you can spend the
It can't be that simple or else someone would have done it alreay.
On Fri, Feb 26, 2010 at 1:12 PM, DJ Delorie d...@delorie.com wrote:
I think the first thing before this discussion gets out of hand is
to asap add clicking x/y to set center and clicking again to set
radius or just popping up
standard parts library. And if you're making footprints and symbols,
text files generated by scripts are FAR superior to any GUI. I'd never
get 100-1000 pins right if I had to use a GUI.
lol, every altium user disagrees.
if you ever seen their IPC pattern / component wizard, you wouldn't be
Why woudl someone use to92 in 2010.
On Tue, Mar 2, 2010 at 12:18 PM, Windell H. Oskay wind...@oskay.net wrote:
On Mar 1, 2010, at 7:15 PM, Geoff Swan wrote:
What's considered Best Practices for TO-92 packages?
Redesign with SOT-23. Easier to solder, faster than stuffing TO-92.
+1
Please kindly use computers from this century.
On Tue, Mar 2, 2010 at 11:14 AM, Facundo Ferrer
facundo.j.fer...@gmail.com wrote:
Hi,
I have an Ubuntu distro:
facu...@uni-laptop:~$ uname -a
Linux uni-laptop 2.6.31-19-generic #56-Ubuntu SMP Thu Jan 28 02:39:34
UTC 2010 x86_64
um, you should have component refdes near the component on the silk level.
if you have some more complicated assembly-related instructions
(outline of big component, keep-out area, etc) they should go in
assembly layer.
why do you have refdes outside of the board from beginning?
On Tue, Mar 9,
is that really building a 'motif' based frontend lol.
On Thu, Mar 18, 2010 at 11:20 PM, Kovacs Levente leventel...@gmail.com wrote:
Hi,
I couldn't compile a fresh copy of PCB cloned from git.
It fails with:
hid/lesstif/menu.c: In function ‘lesstif_call_action’:
hid/lesstif/menu.c:856:
1. You have silkscreen printing going right through most of your
pads. How do you plan to solder to that?
The silk is not going to be printed, it is only for the assembly
drawing. I gave up on silk at this density. For a dense flight board I
once had the silk printed, but without the
Yep, look for example, at X2/C10 (at X=3426, Y=2381) it is so close to X2/R9
and X2/R5. How will you avoid solder bridges there? In fact, the solder
well, that particular area doesnt matter since they're actually
connected together anyway but yeah i agree placing pads THAT close
together is
lol. this is a 6 layer board? it could probably be hand-routed on 2
layer and if design actually needs 4 layer for whatever reason, but 6?
wtf.
Grounding. High speed. EMI see my long post where I explain what
this board shall do.
The preamp that shall drive the inputs to this board
I believe there are some fab's who run a DRC check with a web interface
as you upload the design files. I doubt this will be available until
you've committed to fabrication though.
freedfm from 4pcb is free but it sucks and they will spam you.
anyway, if you're at the point where you need to
You can have a gmail filter for the list and there's a checkbox to
never send these messages to spam. That should fix it.
On Tue, Mar 30, 2010 at 6:28 AM, Vanessa Ezekowitz
vanessaezekow...@gmail.com wrote:
On Mon, 29 Mar 2010 14:19:30 -0700
Steven Michalske smichal...@gmail.com wrote:
I
I would never trust pre-made symbols for any project, it takes very
little effort to make your own, and some projects would call for
something different that wasnt exactly in default pads anyway, such as
smaller width 0402 pads for a densely placed board etc.
But stuff like qfn/bga/etc, it better
Thats funny, i'd rather HAVE my vias covered with solder mask.
On Fri, Apr 16, 2010 at 7:51 PM, Richard de Rivaz rich...@mdr.co.uk wrote:
Hi
I have a similar problem. I am using pcb v20080202-2 on Ubuntu and have
found that certain pads do not appear in the solder mask when exported
I think you use it for, you know, schematic entry when you're actually
like, you know, designing a PCB.
-tc
On Thu, Apr 22, 2010 at 2:26 PM, Madhusudan Singh
singh.madhusu...@gmail.com wrote:
Hello,
I am not new (though a tad rusty) to spice, or the usual design
process. Years ago, I
just get used to typing
gtk_ridiculously_long_function_names_with_lots_of_underscores() and
wearing your keyboard out since not a single IDE under Lunix would
have code complete or any other code editor improvements us Windows
programmers have been taking for granted for years.
-tc
On Fri, Apr
im guessing something related to the geda is a collection of a bunch
of random command line scripts and...
anyway, i saw it there last time i bothered trying pcb on windows and
i was like lol professional.
On Thu, Apr 29, 2010 at 9:01 PM, Duncan Drennan
duncan.dren...@gmail.com wrote:
Hi,
Is
thats not the window he's talking about.
how about actually running the windows build.
On Thu, Apr 29, 2010 at 9:17 PM, Peter Clifton pc...@cam.ac.uk wrote:
On Thu, 2010-04-29 at 14:01 +0200, Duncan Drennan wrote:
Hi,
Is there a way to suppress the command prompt window in the Win32
builds?
How about fixing it then.
On Thu, Apr 29, 2010 at 9:57 PM, Peter Clifton pc...@cam.ac.uk wrote:
On Thu, 2010-04-29 at 21:23 +0900, timecop wrote:
thats not the window he's talking about.
Yes it is.
how about actually running the windows build.
I'm the one who built it!
--
Peter Clifton
yes. check archives
On 5/3/10, Dave McGuire mcgu...@neurotica.com wrote:
I've just succeeded in building 1.6.0 under OS X, along with its
dependencies. I used gtk+ v2.18.9, cairo v1.8.10, glib v2.22.5, and
pango v1.22.4. I had to use such an old release of Pango due to some
stupidity on
On May 3, 2010, at 12:02 AM, timecop wrote:
yes. check archives
On 5/3/10, Dave McGuire mcgu...@neurotica.com wrote:
I've just succeeded in building 1.6.0 under OS X, along with its
dependencies. I used gtk+ v2.18.9, cairo v1.8.10, glib v2.22.5, and
pango v1.22.4. I had to use such an old
uh.. theres no way to specify route/fill keepout area?
On 5/4/10, Tamas Szabo sza2k...@freemail.hu wrote:
John Luciani wrote:
On Mon, May 3, 2010 at 12:49 PM, Tamas Szabo sza2k...@freemail.hu wrote:
John Luciani wrote:
On Mon, May 3, 2010 at 12:12 PM, Tamas Szabo sza2k...@freemail.hu
wrote:
i'm pretty sure the guy is talking about a situation when
1) new user makes a board not knowing much about the tools involved
2) default via size is set smaller than default DRC check.
the #2 part is what needs to be fixing, because face it, nobody who
just started using this is gonna spend an
Same as with the lights. Either from a dynamo, or from batteries charged at
home.
For bonus points, make it charge by induction while sitting inside the
seat pole.
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Of course, we also have the problem of getting a decent GPS fix, since
if it's stolen, it will need to get enough signal to report its
position, and if it's being stored inside a building, that's going to be
very difficult, even before you take the possibility of a metal-framed
bike into
And maybe having pics 128pixels in width would help actually seeing
what things look like.
On Sun, May 16, 2010 at 5:43 AM, Stefan Salewski m...@ssalewski.de wrote:
On Mon, 2010-03-08 at 15:41 +, Kai-Martin Knaak wrote:
Moin.
The screenshot page on gpleda.org is a bit outdated
On Sun, May 16, 2010 at 10:10 AM, Ales Hvezda ahve...@moria.seul.org wrote:
And maybe having pics 128pixels in width would help actually seeing
what things look like.
All the thumbnails are actually 320x240 and there is a link right below
each one for a full sized pic.
I consider myself
I reorganized the image links so that a click on the preview brings you
directly to the full size version. In addition, I added captions to the
images with the advice to click for full size. Most browsers will render
this as pop-up help.
That looks much better, thanks.
---)kaimartin(---
protel library ascii output format is pretty straightforward.
i've used altium ipc pad designer to do qfn/bga/etc pads and export
them for import in other software. i think equivalent ascii outputs
exist for protel PCB as well.
start coding.
On Tue, May 25, 2010 at 8:42 AM, Nikos Arechiga
Anything not supporting c99 in 2010 shouldnt be used anyway.
On 5/27/10, Dave McGuire mcgu...@neurotica.com wrote:
On 5/26/10 6:16 PM, Robert Spanton wrote:
I started working on stuff in the PCB source, and found that it uses a
typedef called 'Boolean' rather than the c99 bool type. Please
This is the best news I've read on this list since subscribing.
I've complained about tear-off menus since at least year 2000.
Shit is annoying, gets in the way, prevents proper keyboard operation, yadayada.
Kill it with fire.
-tc
On Sun, May 30, 2010 at 2:57 AM, Paul Tan pt75...@aim.com wrote:
or
is it something specific to an application usage of
TearOffMenuItem ?
pt
-Original Message-
From: timecop time...@gmail.com
To: gEDA user mailing list geda-user@moria.seul.org
Sent: Sat, May 29, 2010 5:01 pm
Subject: Re: gEDA-user: On Deprecation of GtkTearoffMenuItem
This is the best
Because if you got any worthwhile changes to this stuff, you should
have committed them by now. If you haven't, then deal with it.
On Sat, Jun 5, 2010 at 8:30 PM, Peter Clifton pc...@cam.ac.uk wrote:
On Fri, 2010-06-04 at 23:38 -0400, DJ Delorie wrote:
On Fri, 2010-06-04 at 22:17 -0400, DJ
Maybe it's time to travel into 2010.
On Wed, Jun 16, 2010 at 10:51 AM, DJ Delorie d...@delorie.com wrote:
Ok, then. Let's take the key with the windows logo, or AltGr, or the key
with the menu to the right of the right windows key. :-)
My keyboard doesn't have any of those keys...
with a Windows key?
Are you for real?
-Dave
On 6/15/10 10:22 PM, timecop wrote:
Maybe it's time to travel into 2010.
On Wed, Jun 16, 2010 at 10:51 AM, DJ Delorie d...@delorie.com wrote:
Ok, then. Let's take the key with the windows logo, or AltGr, or the key
with the menu to the right
Sincerily, I thought that this are more usual, but there are very few
references on web and nothing in how to obtain in free world (at least, I
can't find it).
Wait a minute.
So you want to get something (presumably for your work) that a piece
of commercial software does, for free for what
sch2svg
On Tue, Jun 29, 2010 at 12:08 AM, Phil Frost ind...@bitglue.com wrote:
I'm looking for a way to export gschem drawings to a format that a
client might be able to edit. Probably they don't have gschem, but some
people do have Visio, or maybe Omnigraffle on a Mac. I think either of
i *thought* thats where i saw that.
On Tue, Jun 29, 2010 at 1:04 AM, Bob Paddock graceindustr...@gmail.com wrote:
I've found some evidence that SVG export might be possible, but not much
explanation how. Does anyone have some idea how it might be possible?
This script convert a .sch file from
I think that the proper place to resolve this issue is in the actual
*licenses,* which as with OSS may vary from permissive to restrictive. I'd
like to see the evolution of at least one OSHW license where a requirement is
that the design files for the project-- and its derivative works
Example: FPGA's. Verilog source isn't going to help if the FPGA fitter tool
proprietary
OK.
Please name a vendor for FPGA hardware + toolchain that fits into this
absolutely ridiculous requirement.
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, 2010, at 9:47 PM, timecop wrote:
Example: FPGA's. Verilog source isn't going to help if the FPGA fitter
tool proprietary
OK.
Please name a vendor for FPGA hardware + toolchain that fits into this
absolutely ridiculous requirement.
I don't understand your question. Can you clarify
to incorporate in proprietary tools?
Try snatch bits of wisdome to patent denying prior art?
timecop wrote:
I think that the proper place to resolve this issue is in the actual
*licenses,* which as with OSS may vary from permissive to restrictive. I'd
like to see the evolution of at least one OSHW
Just make regular pads and put them to the edge of PCB.
Then tell them you either want ENIG coating for entire board (you do
anyway if you're solderpasting) or ask to do gold fingers just for
the edge connector part.
You can also just leave them as bare copper, but that probably wont last long.
I remember seeing http://www.delorie.com/electronics/r8c-27-adapter/ a
while ago.
On Wed, Aug 4, 2010 at 5:29 PM, Svenn Are Bjerkem
svenn.bjer...@googlemail.com wrote:
Hi,
I am in the progress of making a DIP-64 carrier pcb for a QFP64 MCU
which also will carry voltage regulator, crystal and
Oh I thought you were asking how to rotate.
Didn't read all email.
On Wed, Aug 4, 2010 at 5:31 PM, timecop time...@gmail.com wrote:
I remember seeing http://www.delorie.com/electronics/r8c-27-adapter/ a
while ago.
On Wed, Aug 4, 2010 at 5:29 PM, Svenn Are Bjerkem
svenn.bjer...@googlemail.com
CAM350
On 10 Aug 2010 22:53, Stefan Tauner
[1]stefan.tau...@student.tuwien.ac.at wrote:
hi
i have different pcbs, that i want to submit to a manufacturer, that
allows nutzen/tiled pcbs.
dj wrote some scripts to do this (pcb2panel etc. see
IPC land pattern wizard in protel/altium is very nice as well.
So nice infact I've been using it for BGA and many-pin count packages
and then exporting to ascii format which my current EDA package can
import.
On Thu, Aug 12, 2010 at 9:43 AM, Bob Paddock bob.padd...@gmail.com wrote:
On Wed,
Given the choice between lisp (lol) and xml, the winner is absolutely clear.
There are even less lisp users than there are Linux users, and that's
a sad statistic.
-tc
On Sat, Sep 4, 2010 at 2:16 PM, Rick Collins gnuarm.2...@arius.com wrote:
At 12:11 AM 9/4/2010, you wrote:
On Fri, Sep 03,
iPAd is about as closedsores and proprietary as it gets; you sure you
want to support that?
On 5 Sep 2010 11:57, Steven Michalske [1]smichal...@gmail.com
wrote:
On Sep 4, 2010, at 8:49 AM, Andrew Poelstra [2]as...@sfu.ca wrote:
On Sat, Sep 04, 2010 at
On Mon, Sep 6, 2010 at 10:27 AM, Andrew Poelstra as...@sfu.ca wrote:
On Sun, Sep 05, 2010 at 09:18:01PM -0400, DJ Delorie wrote:
But when each parameter in the file has a name, than file size may
become really large, e.g. for files generated with the topological
router, with lot of arcs.
So gschem and gnetlist must obviously be constantly failing, suffer from
horrible inflexibility, and users must live in a fog of file format driven
error. Except they don't.
The REAL problem with opensource and contributors like you, is that
they're completely incapable of accepting any
Surely in 2010 there is a portable non-polling way to get file update
notification?
On 8 Sep 2010 09:46, Ethan Swint [1]eswint.r...@verizon.net wrote:
On 09/07/2010 08:28 PM, Mark Rages wrote:
* Ability to edit netlist in-situ (possibly by drawing on the rat
lines
layer) -
GTK isn't all that hard if you just read the header files
Amirite?
On 8 Sep 2010 19:35, Stefan Salewski [1]m...@ssalewski.de wrote:
On Tue, 2010-09-07 at 17:08 -0700, Andrew Poelstra wrote:
Plus, I don't have a clear understanding of what mapped and
allocated
Most places handle this with the assembly layer.
Of course, this wouldn't be part of DRC, but you'd have to be blind
put stuff overlapping assembly layers and not see it right away.
On Sun, Sep 12, 2010 at 2:40 PM, Jonathon Schrader
jlsch...@jlschrad.net wrote:
I apologize in advance if this
get a stencil, get solder paste, apply paste over stencil, heatgun, done.
super simple. dont even bother doing it manually pin to pin, it
probably wont work.
On Mon, Sep 13, 2010 at 10:46 AM, gene glick carzr...@optonline.net wrote:
does anyone have experience with this package? I want to know
Are you joking?
On 19 Sep 2010 09:58, John Griessen [1]j...@ecosensory.com wrote:
On 09/19/2010 11:34 AM, Chris Malton wrote:
Unzip it wherever you want, and run the launcher (needs .NET
framework - eurgh, but
most Windows people should have it by now).
I was
Yes, and you are still running lunix from 1999, right?
I'm sorry but anyone complaining about .net in 2010 is just asking to
be ridiculed.
On 19 Sep 2010 10:04, John Griessen [1]j...@ecosensory.com wrote:
On 09/19/2010 11:56 AM, John Griessen wrote:
Is the .NET framework
And this, friends, is why people just say fuckit and stop contributing.
Enjoy your GPL circlejerk.
On 19 Sep 2010 12:18, DJ Delorie [1...@delorie.com wrote:
Not quite; be sure that *anyone can get* the exact sources -- be
sure to identify and link to the sources that you
I was going to reply something about why are you linking to some
stupid flash website with a jpeg on it instead of .pdf off
manufacturer's website but then I thought audio jacks are serious
business and he's probably not allowed to disclose any more
information than this under a NDA.
-tc
On Thu,
I still have only one monitor, and I wonder how useful working with
Is it at least color?
multiple monitors really is. Prices are not really high in these days,
and power consumption is about 20W each, not too much compared with
other hardware. I think the greatest benefit is: If your boss
Then why should we worry about the remote possibility that a user will want
a PCB larger than 2 meters? Their problem could be solved by creating a 64
bit version. I just saw your later post that clearly states your position
so I guess I have my answer.
Ah, this is where opensource way of
, timecop wrote:
Ah, this is where opensource way of thinking fails it.
http://www.google.com/search?q=John+Lennonct=lennon10-hpoi=ddle
John Lennon
Advanced search
About 47,600,000 results (0.15 seconds)
http://www.google.com/#hl=enexpIds=17259,18168,25567,26614,26644,26997,27006,27015sugexp
Only slow on a 386.
Oh, I forgot. Most of Lunix enthusiasts are still using that.
On 9 Oct 2010 18:23, Levente Kovacs [1]leventel...@gmail.com wrote:
On Fri, 8 Oct 2010 14:55:10 -0400
DJ Delorie [2...@delorie.com wrote:
Yes, but there's a loss of performance if you do
?
On 9 Oct 2010 18:37, Armin Faltl [1]armin.fa...@aon.at wrote:
Hi timecop,
your first message I just deleted which is a rare exception on this
list. Since DJ did, I'll waste some seconds and joules on you:
a) 2010 - 16 = 1994
b) [2]http://en.wikipedia.org/wiki/Ext2
Does anyone on this list honestly believe that in 2010 a difference
between slow emulated 64bit and native 64bit integer on any
hardware made in the last decade is going to be even noticeable. Just
make it 64bit and be done with it. Those who still use PCB on 386 can
use the old version.
It seems
Probably KiCad.
On Sun, Oct 10, 2010 at 7:48 AM, Rick Collins gnuarm.2...@arius.com wrote:
I assume one is gEDA... what is the other?
Rick
At 01:56 AM 10/9/2010, you wrote:
Good on you. It really gripes me when open hardware projects use
something like Eagle for the schematic/pcb flow.
With TopoR having a freeware version for 2 layers and up to 256 nets
(or some other fairly high for 'hobby' use limitation), there's not
really any point on bothering improving built in autorouter...
Does PCB have Specctra DSN/SES export/import? Just use that (or
implement if it doesn't) and then
sed -e 's/^\tPin/# /' -e 's/^\t\(SymbolLine\|Line\)/# /' -e
's/^Via/# /'
In my windows PCB CAD, I click 'Export Gerber' and click a layer.
If I don't want vias or pins there, I uh,, click a checkbox.
GUIs exist for a reason. This is one of those good reasons.
--
1966 called, wants its
3D renderings of through-hole components is great and all, but this IS
2010, anyone still using through-hole stuff can just use Fritzing or
something. How about adding relevant features to PCB, like boolean
operations on copper pours that aren't a hack or ... hey, who am I
kidding.
-tc
On Sat,
Yes, if you were having difficulty with the END_LOOP macro, I can
understand why you didn't venture any deeper into the code.
I just saw the rest of the crap in the header file containing #define
END_LOOP }}
and I'm with Armin on that one, this is pretty ridiculous.
Fixing problems is not
5. retain the MYFREE() macro as its pointer clearing side effect is required
8. Instead of simply retaining MYFREE(p) (point 5), we could replace
each use of it with an explicit:
free(p);
p = NULL;
Is this MY prefix actually in the code?
Most sane places call the kind of free your'e
Another option, that may not be acceptable to all, is that in the UK
RS Farnell both recently acquired small PCB development
companies(DesignSpark eagle respectively). The intention being the
companies adopt the free tool which integrates easily with their
catalogue and then buy more from
Why do you bother to subscribe to this list? Its obvious that $0.02 is
worth more than your opinions.
Why do you bother replying?
Is it to show you agree or disagree?
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${EnvVarUpdate} $0 PATH A HKLM $INSTDIR\bin
It looks OK from a quick glance, but it depends what build settings
were used for the NSIS...
Warning this code will replace paths rather than append if the existing path
exceeds the
maximum string length in the NSIS build you are using.
Maybe he
Warning this code will replace paths rather than append if the existing
path exceeds the
maximum string length in the NSIS build you are using.
Maybe he tried installing it into some huge path and ended up trimming
the entire var set or something...
I think what could happen if im
Thanks for the reply. It is a bit hard to read here because all the lines
are run together. Kaimartin has indicated this is because of using transfer
encoding base64. Any chance you can resend this in a different format?
Funny you mention that, this email reads perfectly fine in my
Why dont you take headpics of DJDelorie and make a banner,
Please read: An urgent appeal from PCB maintainer DJ Delorie... :D
On Sat, Dec 18, 2010 at 10:40 PM, Levente Kovacs leventel...@gmail.com wrote:
On Thu, 9 Dec 2010 14:45:47 +1100
Stephen Ecob silicon.on.inspirat...@gmail.com wrote:
But why not a real book, that is written in LaTeX?
Because you just ruled out the remaining 1% of people who even wanted
to help with writing any kinda documentation.
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footprint = what the pads/holes/silk/wahtever on pcb for this
component look like.
On Fri, Dec 24, 2010 at 8:28 PM, Johnny Rosenberg
gurus.knu...@gmail.com wrote:
Den 2010-12-24 02:27:33 skrev kai-martin knaak k...@familieknaak.de:
You may take a look at the symbols in http://gedasymbols.org
snip
I think you guys are all missing the point.
The problem isn't 74239847 tools to write the docs in.
The problem is nobody wants to write them even if you have the best tools.
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