Given that the power supply connections for many of the logic symbols in
the gaf library are implicit (not shown, considered evil by some) whats
the way to mix different digital supply voltages in the same design and be
fairly certain of not having the wrong ones connected?
Also, is it possible
This isn't documented in the man page, but you need to create a file
called 'attribs' in which you list the attributes that you want to end up
in the bill of materials. For example, if you put:
refdes
device
value
you'll get those 3 attributes in the BOM.
-Dan
On Sun, 29 Dec 2002, Bob
Is there a way to print to a postscript file from a scheme script? I'm
looking for a way to generate postscript from the command line.
Thanks
-Dan
thanks! Seems that file doesn't actually get installed although its
included in the gschem distfile.
-Dan
On Fri, 14 Feb 2003, Charles Lepple wrote:
On Friday, February 14, 2003, at 06:01 PM, [EMAIL PROTECTED] wrote:
Is there a way to print to a postscript file from a scheme script?
Is there a way to specify geometry (size and position) from the command
line for gschem? I'm thinking of something like
gschem -geometry 500x500+10+5
Thanks
-Dan
You can try looking at:
http://www-mtl.mit.edu/~mcmahill/PCB/gEDA-PCB.html
although be warned that this document still shows the use of 'uref' which
should be changed to be 'refdes' now.
I can't claim that the document is complete, but its more than nothing.
-Dan
On Sun, 2 Mar 2003, Richard
I've updated the NetBSD packages to the 20030223 release. As always the
top level gEDA package is at
ftp://ftp.netbsd.org/pub/NetBSD/packages/pkgsrc/cad/geda/README.html
-Dan
the log window problem does not exist in the -current sources available
via anonymous CVS (see 'PCB in CVS' mail).
-Dan
On Fri, 14 Feb 2003, Leva wrote:
Hi,
I realised that the log window is not opened at startup. When I select Window
-- Message Log item, the program crashes and outputs
Is there a simple way to create an archive library for a schematic in
which all symbols are copied from the original locations to some archive
directory?
If not, are there any suggestions as to where such a tool would fit in?
Ie, a scheme program thats plugged into gschem (this has nice access
make a text file called 'attribs' listing the attributes you want in the
BOM, for example:
refdes
value
footprint
Then do
gnetlist -g bom -o bom.txt file1.sch [file2.sch file3.sch ...]
-Dan
On Thu, 20 Mar 2003, Pierre Carecchi wrote:
hi,
how could I generate a BOM (Bill of material)
cool stuff. I'll be checking it out tonight. One thing I've been
wondering about is how one might have some hooks for a technology file if
you wanted to use gEDA for IC type schematics. Where you care about this
is the following:
You're doing a MOS transistor design. For a given
As a more concrete example, suppose you have a standard CMOS process. You
may have only 2 models for transistors. One is NMOS and one is PMOS. If
you take a look at the line in a spice netlist for say the nmos
transistor, it looks something like:
M1 drain_node gate_node source_node bulk_node
I've created a set of symbols and a gnetlist backend for the SWITCAP
switched capacitor circuit simulator. You can grab the archive at:
http://www-mtl.mit.edu/~mcmahill/outgoing/geda-switcap-20030329.tar.gz
This includes the symbols, gnet-switcap.scm file and an example circuit.
You'll need
On Fri, 18 Jul 2003 16:36:42 -0400
DJ Delorie [EMAIL PROTECTED] wrote:
Ok, after a number of emails back and forth with the folks at Advanced
Circuits, I learned that the industry standard for solder masks is
to print them with positive polarity (i.e. dark where you want solder
to go) -
library being that unified library but
than tell me which library to use and whom to notify change requests
to.
Olof
- Original Message -
From: Dan McMahill [EMAIL PROTECTED]
To: [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED]
Sent: Saturday, August 09, 2003 11:40 AM
Subject: Re: gEDA
try library ~generic, and select QFP menu, generic. If I were you I'd
do some sanity checks on the result (I have no reason to think its
wrong, but you should anyway)
-Dan
On Sat, 9 Aug 2003 11:27:30 +0200
Olof Tångrot [EMAIL PROTECTED] wrote:
I miss a generic QFP64 pattern from the
Hi,
I've been going over a patch submitted to pcb by Wojciech Kazubski that
supplies several additions to the QFP family of footprints.
I would like to incorporate these changes, but would like to discuss
some naming conventions here first. One goal I have is to make sure
what ever decisions
On Mon, 1 Sep 2003 16:22:08 +0200
Leva [EMAIL PROTECTED] wrote:
On Fri, 29 Aug 2003 05:25:46 -0400
Dan McMahill [EMAIL PROTECTED] wrote:
you can use the refdes_renum script outside of gschem.
Where can I find that script?
Its part of gEDA. Don't recall which version it first
On Mon, Sep 22, 2003 at 12:14:27PM -0400, Stuart Brorson wrote:
Hi --
Well, I have decided to take the plunge and try doing a layout using
PCB. However, I am already flailing. :-(
I read Dan McMahill's HOWTO as well as the various PCB docs, and I
think I am following the instructions
On Fri, Sep 26, 2003 at 05:41:39PM -0500, Bill Wilson wrote:
On Fri, 26 Sep 2003 17:00:10 -0400 (EDT)
[EMAIL PROTECTED] (Stuart Brorson) wrote:
PKG_unknown(unknown,A4,gmin=1e-9)
and that means gsch2pcb could not find a package for A4. It
seems this will happen for the spice symbols
On Mon, Nov 03, 2003 at 08:40:26PM -0500, Bill Cox wrote:
Hi.
I think gdatabase will come into use out there in any significant volume
until at least one really cool application is built on it. I'm looking
for the right first tool. I'm hoping that if I spear-head development
of the
Hello,
At the prompting of Erwan Le Bras, I've done a small amount of work to PCB which seems
to have
made it go under cygwin. I didn't do much testing past seeing that I could place a
few components,
save the layout, and then open it back up again. Please note that you'll need Xfree86
Compiling by hand or with fink 0.6.1 works fine for
me. The pcb binary starts and I can see the pcb workspace and buttons.
[but the menus do nothing when selected and the line/via/etc tools
don't work]
This is the symptom of no app defaults file.
If not, then I think you tripped over
On Tue, Nov 18, 2003 at 02:47:42PM +0100, Ferenc M?rton wrote:
Hi everybody,
This is my first project with geda, and unfortunately I'm not allowed to make
the layout myself (would choose PCB, BTW), and I am demanded to produce a
futurenet netlist from my sch.
Could anyone tell me if it is
On Thu, Nov 20, 2003 at 09:28:30AM +1300, Arnim Littek wrote:
On Thu, 19 Nov 2003, John Griessen wrote:
What might be interesting to us on this list,
is a look at a sample of a futurenet pinlist. I've never heard of that tool.
Dash/Futurenet, from Data I/O in the late 80s/early 90s before
calls itself a 'pinlist' - I wonder if that's
significant?
Evan
well, you'll note that the 'pinlist' one is missing something fairly important,
the package/footprint name for each part.
I've written a NV2 netlister which I've placed at
http://www-mtl.mit.edu/~mcmahill/geda/gnet-futurenet2.scm
On Thu, Nov 27, 2003 at 06:39:34PM -0200, Xtian Xultz wrote:
Today, I compiled the tarball in my machine with stroke enabled. I
have a very simple serial mouse with three buttons, and the middle
button worked as expected, without any reference to strokes...
My question is, how and what the
On Mon, Dec 15, 2003 at 07:26:05PM -0500, DJ Delorie wrote:
Create a new pad for the part with a thickness of zero, setting the
x,y points and mask such that the resulting mask is the dimensions you
need. The gerber module will omit the flashes for the pad itself and
its paste, but will
anyone know if there is support for any sort of annotation layer
in PCB? I'm looking for something which could be used as, for
example, an alignment mark to help me get a connector the correct
distance from the board edge or to indicate a via keepout region
under a pad. I don't want to use the
anyone have any suggestions for good names for sot23 packages?
Currently the geda symbol library in PCB uses:
SOT23 for:
3
12
which matches drawings found on the Philips and Maxim web sites,
and
SOT23D for:
1
2 3
which I guess is for some diodes, didn't check
On Tue, Dec 30, 2003 at 11:21:43AM +1100, Terry Porter wrote:
Dan, your breadth of experience bodes really well for PCB I think, I'm using your
latest release right now and it's as smooth as silk, just like Gaf!
unfortunately my experience doesn't include much of the real core of PCB.
On Tue, Dec 30, 2003 at 10:19:04PM -0500, John Doty wrote:
If gnetlist can handle very large flat schematics without slowing down
painfully, I'll go ahead and write the dummy flat .sch files. Does
anyone know?
I have a 700 net flat schematic I'm working on. Gnetlist takes about 4.5
On Tue, Dec 30, 2003 at 10:19:04PM -0500, John Doty wrote:
If gnetlist can handle very large flat schematics without slowing down
painfully, I'll go ahead and write the dummy flat .sch files. Does
anyone know?
I have a 700 net flat schematic I'm working on. Gnetlist takes about 4.5
On Sun, Jan 04, 2004 at 05:57:03PM -0500, EATON,JOHN (HP-Vancouver,ex1) wrote:
Is there a list of known problems or bugs in
gSCHEM? Be nice to know if a bug has already been
found before reporting it.
There is a bug database available from http://www.geda.seul.org
-Dan
--
On Tue, Jan 06, 2004 at 09:56:41PM -0500, DJ Delorie wrote:
ok I give up. how does one change the width of the thermal spokes in PCB?
You don't. The finger width is the same as the actual thickness of
the pad's copper (i.e. (paddiam - drilldiam)/2).
ack! I suppose that prevents stubby
have you also recompiled iverilog after the gcc upgrade? I'm not sure
if you can use a 3.2.3 compiled shared object with a 2.95.3 compiled
program.
-Dan
On Wed, Jan 07, 2004 at 10:04:35AM +, michel.agoyan wrote:
Hi,
First, happy new year !
Few months ago, I have written a simple bus
On Sun, Jan 11, 2004 at 08:45:05AM -0500, Bob Paddock wrote:
I was trying to build todays CVS of PCB but I get this error:
XENVIRONMENT=./Xdefaults.tgif tgif -print -color -eps pad.obj
/bin/sh: line 1: tgif: command not found
make: *** [pad.eps] Error 127
Can you point me in the right
I'm trying to figure out how to change the background color of the main
drawing area in PCB. For some reason, its showing up as black (or some
dark color) and I'm having troubles seeing the traces and pads now.
I've looked through the app-defaults file but can't seem to find the
right one.
On Tue, Feb 03, 2004 at 03:49:40PM -0500, DJ Delorie wrote:
I've looked through the app-defaults file but can't seem to find the
right one.
Pcb.masterForm*output*background:gray95
hmm. Doesn't seem to do much.
http://www-mtl.mit.edu/~mcmahill/pcb_white.png
http://www
On Tue, Feb 03, 2004 at 03:54:02PM -0800, David Koski wrote:
I am new to gschem/pcb. What footprint is used for 1.27mm spacing smt chips? I
see no footprint examples or docs for it.
Thats 50 mils where I come from ;) I assume you mean the SOIC family?
See
On Tue, Feb 03, 2004 at 07:57:36PM -0500, DJ Delorie wrote:
Found it, it was a naive assumption on the part of the original
programmer.
*Now* Pcb.masterForm*output*background sets the board background.
(cvs update src/draw.c if appropriate)
Thanks! I haven't found any of my X
On Tue, Feb 03, 2004 at 11:54:44PM -0800, David Koski wrote:
On Tue, 3 Feb 2004 23:40:53 -0500
Dan McMahill [EMAIL PROTECTED] wrote:
On Tue, Feb 03, 2004 at 03:54:02PM -0800, David Koski wrote:
I am new to gschem/pcb. What footprint is used for 1.27mm spacing smt chips? I
see
On Fri, Feb 06, 2004 at 12:45:48PM -0500, John Doty wrote:
Installing gerbv-0.15 on MacOS 10.3 (Panther):
I'm using the following from Fink 0.6.2 (http://fink.sourceforge.net/):
libpng3 1.2.5-4
gdk-pixbuf0.18.0-2
The main problem is that gerbv doesn't look for libpng in
On Thu, Feb 12, 2004 at 11:50:13AM -0800, Matt Ettus wrote:
I just looked at ViewCVS and saw that change.c and print.c were changed since my
last update (3 days ago), so I updated and tried it. Now both ps and gerber
output are fine.
yep. Harry fixed that a day or two ago. It was a
Hi,
I'm pleased to announce the availability of a new PCB development
snapshot.
pcb-20040215 is the 3rd development snapshot release since moving to
SourceForge. This snapshot represents a big step forward in PCB.
Anyone following the CVS changes over the last month will have noticed
a very
On Sun, Feb 15, 2004 at 10:35:21AM -0500, Dan McMahill wrote:
Hi,
I'm pleased to announce the availability of a new PCB development
snapshot.
pcb-20040215 .
NetBSD package has been updated.
ftp://ftp.netbsd.org/pub/NetBSD/packages/pkgsrc/cad/pcb-current/README.html
may take a day
On the patches section of the PCB sourceforge project page, there
is a patch from harry which addresses the bug found by David Koski
regarding creating elements.
-Dan
Mail from harry eaton about elements follows:
-
David,
You found a bug! Converting Buffer contents to elements
On Tue, Mar 02, 2004 at 09:10:35AM +0100, Peter Kaiser wrote:
Hi,
does anyone know a program that converts GDSII to asci and backwards?
Try http://www.buchanan1.net/stream_utils.shtml
I've not used it though.
There is also a GDSII reader at http://home.netcom.com/~serbanp/
and a GDSII
just don't send me ?anything too proprietary.
I hope to enter it in the Circuit Cellar AVR contest, but if you win
with it, more power to you. ?:-)
it turns out I haven't even needed to view the schematic.
I was mislead by a bad assumption on my part earlier. I thought the
grep
On Mon, Apr 12, 2004 at 11:02:03PM +0200, Berni Joss wrote:
Thank your for your support in helping on this issue.
On Mon, Apr 12, 2004 at 07:14:04AM -0400, Ales Hvezda wrote:
Here's something to try. Run guile and type:
primitive-fork
at the guile prompt. On my machine
On Wed, May 12, 2004 at 11:40:43AM -0700, David Koski wrote:
On Tue, 11 May 2004 20:28:40 -0400
Dan McMahill [EMAIL PROTECTED] wrote:
On Tue, May 11, 2004 at 12:42:17PM -0700, David Koski wrote:
Hello,
In the following file:
http://kosmosisland.com/island/david/test_1.pcb
On Fri, May 14, 2004 at 01:44:00PM -0700, David Koski wrote:
On Fri, 14 May 2004 16:00:32 -0400
DJ Delorie [EMAIL PROTECTED] wrote:
Increasing the resolution when importing to gimp moves it off page to the right.
As you increase the resolution, you have to increase the pixel sizes
On Sat, May 01, 2004 at 06:20:31PM +0200, Albert Lederer wrote:
Compiling Geda on Solaris can be a nightmare, especially when you're
trying to find all the package dependencies. Linux systems take a lot
of packages for granted, and they may not be present on Solaris systems.
Maybe we
On Sun, May 02, 2004 at 11:33:57PM -0500, John Griessen wrote:
On Sat, 2004-05-01 at 15:44, harry eaton wrote:
Ok, but it would be nice if something gave the location of the short.
Change
color, or X/Y points.
Yes, but as I point out, that is a very hard problem
[jg]It is a hard
On Mon, Apr 26, 2004 at 03:00:24PM -0400, Dave McGuire wrote:
On Apr 26, 2004, at 5:19 AM, Levente KOVACS wrote:
I try to build gEDA on a machine (namely Sun ULTRA1)with SPARC
architecture. I get libgeda compiled, but gschem and geda does not.
Does anyone have experience with it? I use gcc3,
On Mon, Apr 26, 2004 at 10:40:37PM -0400, Dan McMahill wrote:
On Mon, Mar 15, 2004 at 09:40:49PM -0800, Matt Ettus wrote:
Is PCB capable of creating X-Y placement files for pick and place? The format
seems pretty simple.
Thanks,
Matt
Hi Matt,
I have mostly implemented
On Sun, May 16, 2004 at 02:12:02PM -0700, Thomas D. Dean wrote:
I did not see my reply. Sorry if this is a duplicate.
/usr/local/share/gEDA/system-gschemrc:
right after these couple of lines,
; Contains all paths needed for all programs
(define gedadata (getenv GEDADATA))
(define
I'm pleased to announce that there is a new PCB snapshot available
on the sourceforge project page. As with the other snapshots, this
release represents a work in progress. It is provided to make it
easier for users who do not use CVS for accessing the latest sources.
See http://pcb.sf.net for
On Mon, May 31, 2004 at 05:14:05PM -0700, David Koski wrote:
Thanks Dan!
On Mon, 31 May 2004 19:01:14 -0400
Dan McMahill [EMAIL PROTECTED] wrote:
- Ordering is preserved when writing output files so that diff
may be effectively used on pcb files.
Does that mean
On Tue, Jun 01, 2004 at 02:28:06PM -0400, Dave McGuire wrote:
Hey folks. I usually put my email address on a PCB layout, but the
default font that comes with PCB doesn't have an '@'. Is there a
low-pain way to add that symbol to the default font? How was the
default font generated in
On Tue, Jun 01, 2004 at 04:01:22PM +, Xtian Xultz wrote:
Hello folks!
I am new to debian, I am using a distro called Kurumin based on Knoppix
that is based on Debian :D
I am trying to compile PCB 20040530 but it gives me a lt of errors
like
gcc -DNDEBUG -g -O2
On Wed, Jun 09, 2004 at 10:36:47AM +0200, Levente KOVACS wrote:
Hi all,
I have a question about dead polygons. I call dead polygon, which is not
connected to any net. How can I remove them? They are not needed, just
incrase the capacity.
Furthermore, if I do lookup connection to object,
On Wed, Jun 09, 2004 at 12:51:07PM +, Karel Kulhav? wrote:
Hello
I am using CVS and every time I do a minor change, the data file is completely
different. It looks like the items get ordered in different order.
Would it be difficult to implement that after a minor change in the layout,
On Thu, Jun 10, 2004 at 07:13:33PM -0500, Randall Nortman wrote:
I apologize if asking questions related to pcb, which is not
technically part of gEDA, is inappropriate for this list. It just
seems to me that a lot of pcb-related discussion seems to happen here.
(More even than on the actual
Is anyone out there using gEDA, gnucap, or PCB in a classroom
environment? I'd like to hear about it if you are.
-Dan
--
On Tue, Jun 29, 2004 at 03:10:37AM +0200, Paul Surgeon wrote:
On Monday, 28 June 2004 21:32, Karel Kulhav? wrote:
On Sat, Jun 26, 2004 at 01:26:44AM +0200, Paul Surgeon wrote:
Is it possible to use XCircuit together with gEDA PCB?
One can use XCircuit as a schematic capture and netlist
On Thu, Jul 01, 2004 at 12:00:31PM -0400, [EMAIL PROTECTED] wrote:
Hi all,
I have some questions about my pcb install. The build completes without any errors
but as far as I can tell, it did not build everything. Not all of the part
libraries, examples, and docs are being built. The pcb
On Thu, Jul 01, 2004 at 12:00:31PM -0400, [EMAIL PROTECTED] wrote:
Hi all,
I have some questions about my pcb install. The build completes without any errors
but as far as I can tell, it did not build everything. Not all of the part
libraries, examples, and docs are being built. The pcb
Anyone know of a static timing analysis tool thats available as
free software?
-Dan
--
On Sun, Aug 22, 2004 at 01:14:09PM -0400, Dave McGuire wrote:
On Aug 22, 2004, at 12:53 PM, Samuel A. Falvo II wrote:
Where can I buy one piece of this one in Prague? I would be genuinely
interested :)
You may or may not be able to. I don't know. I know I can get them
from
On Sun, Aug 22, 2004 at 06:13:34PM +, Karel Kulhav? wrote:
Hello
MMI promises to compute distributed paramteres of copper strips on
PCB.
looks neat once it can be built. I've started and found some issues
with the build system. Haven't fixed them all yet...
I am lured by an idea of
On Sun, Aug 22, 2004 at 06:13:34PM +, Karel Kulhav? wrote:
Hello
MMI promises to compute distributed paramteres of copper strips on
PCB.
I chewed throught the latex2html stumbling block and hit another one
-- mmi (aka tnt - I don't know why there is a naming schizophreny)
installed
On Sun, Aug 15, 2004 at 09:41:49AM +, Karel Kulhav? wrote:
Hello
I have read PCB manpage and realized it's possible to define several UNIX
commands that are executed at various occassions. However didn't find any
place where PCB commands could be specified to be executed.
I would like
On Thu, Aug 26, 2004 at 06:26:21PM -0400, Dan McMahill wrote:
On Sun, Aug 15, 2004 at 09:41:49AM +, Karel Kulhav? wrote:
Hello
I have read PCB manpage and realized it's possible to define several UNIX
commands that are executed at various occassions. However didn't find any
place
On Sat, Aug 28, 2004 at 02:53:46PM -0700, John Luciani wrote:
I am using PCB version 1.99p and get the following
warnings after I choose Connects-optimize rats-nest
2: WARNING!! net unnamed_net6 is shorted to net
unnamed_net3
3: WARNING!! net unnamed_net3 is shorted to net
unnamed_net6
On Fri, Sep 03, 2004 at 08:18:35PM -0400, Dan McMahill wrote:
I am pleased to announce that a new pcb snapshot is available.
pcb-20040903 can be found on the PCB sourceforge site,
http://pcb.sf.net.
Summary of changes in pcb-20040903
On Fri, Sep 03, 2004 at 09:08:50PM -0400, DJ Delorie wrote:
Is there a log file or debug mode that I can use to help find this
problem?
Run it under gdb:
$ gdb pcb ...
make that
$ pcb -gdb
pcb is actually a wrapper script which sets some environment variables
and then calls the
On Mon, Sep 06, 2004 at 04:45:47PM +0200, Andreas Platschek wrote:
Am Montag, 6. September 2004 18:23 schrieb Stephen Meier:
Could you be a bit more specific?
When you activate the library window (menu - window - library) do you
see a list of directories in the left window and a list of
On Mon, Sep 06, 2004 at 04:52:59PM +0200, Andreas Platschek wrote:
Am Montag, 6. September 2004 18:24 schrieb Stephen Meier:
Where is PCB installed in your directory structure?
Are all the permissions along the path coducive to non root users?
Steve Meier
Andreas Platschek wrote:
On Tue, Sep 07, 2004 at 01:42:38PM -0700, John Luciani wrote:
I have found a condition that causes PCB to
Segment fault.
I created an element that has a mounting hole
but I forgot to change bit 3 in the pin flag. The
PCB layout below contains the element with the
incorrect pin flag.
On Thu, Sep 23, 2004 at 05:21:31PM -0500, Mark Rages wrote:
On Thu, Sep 23, 2004 at 05:00:39PM -0500, Mark Rages wrote:
Hi all,
Is there a summary of the avaiable pcb footprints in any of the gEDA
docs?
In particular, I'm looking for SMA (the diode footprint, not the RF
On Thu, Oct 14, 2004 at 10:08:18AM -0700, Stephen Williams wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Some of you have already noticed that Icarus Verilog 0.8 has
appeared on the FTP site. Start from the Icarus Verilog home
page: http://www.icarus.com/eda/verilog and follow the
On Mon, Sep 27, 2004 at 11:59:54PM -0400, Ales Hvezda wrote:
Embedded components aren't used too much (I think), so I would
be willing to change this behavior if it would make your life easier.
I always embed the title block so I get expansion of CVS keywords like
$Id$.
Other than
On Wed, Oct 20, 2004 at 09:07:48AM -0700, Steve Meier wrote:
First, you should always have a low pass filter which is well bellow 1/2
the sampling frequency just before your a/d converter.
Make that a band limiting filter whose bandwidth is less than
1/2 the sampling frequency. There is no
On Sun, Oct 24, 2004 at 06:20:47PM -0400, Stuart Brorson wrote:
Hi Guys (and any Gals who are lurking out there) --
This may be in the FAQ (although I didn't find it in the ten seconds
that I took to Google around), so please tell me to RTFM if it is.
I would like to know all the names of
On Wed, Oct 27, 2004 at 10:48:25PM -0400, Ales Hvezda wrote:
and setting MINGW to yes. You might have to fudge with the configure scripts
to get the right PATHSEP and OTHERPATHSEP set (since cygwin is more unix like
than win32 like).
for gtk/glib parts, there is G_DIR_SEPARATOR if you're
On Sat, Nov 06, 2004 at 05:42:12PM -0500, DJ Delorie wrote:
Areas the autorouter shouldn't put traces through.
I'd expand that to autorouter or human router.
What's the reason for such areas?
Mounting brackets, component contact, EMI, isolation, etc.
For example, on my furnace
On Sun, Nov 07, 2004 at 10:25:23AM -0500, Syed Faisal Akber wrote:
As far as the heat transfer stuff goes, a friend of mine tried out many
scenarios.
1 - Special Transfer paper -- Some of the paper that didn't have toner on
it got stuck to the copper clad.
2 - Regular what 20# paper -- Same
On Thu, Nov 11, 2004 at 10:44:19PM +0200, Florian Steiper wrote:
Hello
Did anybody try/heard of Kicad ? I stumbled across the program at
OpenCollector and it seems to be doing pretty much the same as the Geda
suite, only thing is that all the documentation is in french :)
Here is the
On Fri, Nov 19, 2004 at 06:35:11PM -0500, Daniel Nilsson wrote:
On Fri, Nov 19, 2004 at 06:12:58PM -0500, Dan McMahill wrote:
On Fri, Nov 19, 2004 at 03:25:07PM +, Karel Kulhavy wrote:
Bugzilla appears to be a shit to me. Responds to an upload of 4MB
attachment with invalid filename
On Tue, Nov 23, 2004 at 04:51:58PM -0800, Samuel A. Falvo II wrote:
It's a handy formula to have -- however, I'm curious though: where does
the factor of 0.35 come from?
from a 1st order system. BW (Hz) = 1/(2*pi*tau), step response =
1 - exp(-t/tau). Time to 10% is
t10 = -tau*log(0.9),
On Mon, Dec 06, 2004 at 04:32:01PM +0100, Shahab Sanjari wrote:
Dear list,
is there a possibility to list all different drill diameters (pads /
vias) and edit them after layout job is done, in order to reduce them to
those standard values that the board-house likes? This reduces
On Tue, Dec 14, 2004 at 01:19:08PM +, Daniel Nilsson wrote:
Karel Kulhavy ([EMAIL PROTECTED]) wrote*:
On Sun, Dec 12, 2004 at 09:29:10AM -0500, Daniel Nilsson wrote:
[...]
Here's a good collection of links (including fastcap):
http://www.fastfieldsolvers.com/links.htm
What
On Tue, Dec 14, 2004 at 09:56:37PM -0500, Daniel Nilsson wrote:
On Tue, Dec 14, 2004 at 09:21:28AM -0500, Dan McMahill wrote:
Agreed, you might care about these aspects. What I wanted to point out
it that there are were few real world problem where you actually can
use the trace capacitance
On Mon, Dec 13, 2004 at 02:08:54PM -0800, David Koski wrote:
I have some boards to produce that have components with about a 9 mil
pad spacing and my 15 mil solder is a little big. After searching on
line I gave up in frustration trying to find an online store that
sells ultra fine solder
On Wed, Dec 29, 2004 at 04:00:28PM -0800, Stephen Williams wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
John Doty wrote:
|Then, burn it to a CD and use the CD to
|install the entire gEDA Suite on any (Linux) computer you wish.
|
|
| Well, not just any Linux computer. Only Intel
On Mon, Jan 03, 2005 at 08:59:33PM +, Karel Kulhavy wrote:
Hello
I have a shielding box in PCB as an element (because the silk lines and holes
have to be kept in precise distances). Every time I run gsch2pcb, the box
gets removed.
What is the ideologically correct solution to this?
On Wed, Jan 05, 2005 at 06:20:06PM +, Karel Kulhavy wrote:
Why don't you make a symbol for gschem that represents the shield. Give
it one pin. In the schematic connect that one pin to ground. I do this
all the time to make holes for ground clips (to clip my oscilloscope
probe ground
On Wed, Jan 05, 2005 at 06:07:31PM -0500, DJ Delorie wrote:
How is this done in Orcad? In Eagle? In other tools?
Since it's an internals problem, and not a user interface problem, we
have no way of knowing.
In PCB you cannot draw a rectangle of missing soldermask.
Cna
On Mon, Jan 10, 2005 at 10:15:40PM -0500, Daniel Nilsson wrote:
On Sun, Jan 09, 2005 at 10:30:51AM -0500, Dave McGuire wrote:
On Jan 8, 2005, at 12:18 PM, Stuart Brorson wrote:
2. The biggest reason to not use XML is that we already have a
working file format with associated file reading
1 - 100 of 350 matches
Mail list logo
