[gem5-users] break event panic in PARSEC (is this a kernel panic) ?

Hi gem5, i was trying to figure out the reason behind this panic caused by simulation of 4 core using PARSEC benchmarks (prefetcher turned on ) system.switch_cpus0.break_event: break event panic triggered , panic: Halt not implemented! @ cycle 2297453665500

Re: [gem5-users] break event panic in PARSEC (is this a kernel panic) ?

In addition to that, for 2 core systems, i got something like this: 2289130341000: system.switch_cpus0.break_event: break event panic triggered panic: M5 panic instruction called at pc = 0xfc31add0. On Fri, Jun 10, 2011 at 9:07 AM, biswabandan panda biswa@gmail.comwrote: Hi gem5,